JPH0123074B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic watch equipped with a dot matrix display device capable of displaying arbitrary characters and pictures, and in particular to a miniaturized pattern storage device that stores patterns of characters and pictures. The present invention relates to an electronic watch with a dot matrix display device that can store and display a large number of patterns.

Most conventional digital display electronic watches have displayed numbers in a 7-segment format, but recently, along with improvements in liquid crystal manufacturing technology, dot matrix liquid crystal display devices have been used to display numbers and characters in a 7-segment format. Electronic clocks that can display any pattern are beginning to appear.

However, this electronic watch with a dot matrix display device has the disadvantage that the size of the pattern storage device that stores the complex patterns of numbers and letters is large, which increases the size of the entire electronic circuit, resulting in an expensive watch. There is.

Furthermore, although this dot matrix display device can display arbitrary patterns such as pictures in addition to numbers and letters, the types of patterns are limited for the above-mentioned reasons.

The present invention has been made in view of the above points, and when the display pattern is horizontally symmetrical or vertically symmetrical, the pattern of only one side is stored in the pattern storage device, and when the other side is displayed, the pattern storage device stores the pattern of only one side. The present invention provides an electronic timepiece with a dot matrix display device in which the scale of the pattern storage device is reduced by inverting and outputting the output line of the pattern storage device.

Embodiments of the present invention will be described below based on the drawings.

In Figure 1, 1 is a reference oscillator using a crystal oscillator, and the reference oscillator (CL) is used for hours, minutes,
The signal is input to a clock circuit 2 and a timing circuit 3 that measure seconds and the like.

Reference numeral 4 denotes a selection circuit which inputs the clock signal for each digit of the clock circuit 2, selects a specific digit, and outputs output signals _O1 to _O4 .

Reference numeral 5 denotes a mode switching circuit for switching the display mode, which outputs a switching signal K that is inverted depending on whether the switch 6 is turned on or off.

7 is a pattern storage device, and the selection circuit 4
output signals O ₁ to O ₄ and a switching signal K to output pattern output signals P ₁ to _{P 5} .

8 is an inverting circuit, and pattern output signal P ₁ ~
It inputs _P5 and outputs display signals _H1 to _H5 .

Numerals 9a to 9n are latch circuits each having a 5-bit configuration, which use display signals _H1 to _H5 as common inputs and output segment signal groups Sa to Sn.

10 is a segment drive circuit which inputs segment signal groups Sa to Sn and outputs a segment drive signal group X.

Reference numeral 11 denotes a dot matrix liquid crystal display device, which inputs the segment drive signal group X and the common drive signal group Y output from the common drive circuit 12;
It displays the time such as minutes and seconds and a picture pattern.

The timing circuit 3 outputs timing signals necessary for each circuit, and each timing signal will be explained below.

_T1 is a selection signal group that is input to the selection circuit 4 to select a specific clock signal.

_T2 is an inverted timing signal, which is input to the AND circuit 13 together with the switching signal K.

The AND circuit 13 outputs an inverted signal I obtained by ANDing the inverted timing signal T ₂ and the switching signal K, and this inverted signal I is input to the inverting circuit 8 .

Ta~Tn are latch signals and latch circuits 9a~9n
and each latch circuit 9a to 9n is
Display signals _H1 to _H5 are latched in accordance with each timing of the latch signals Ta to Tn.

_T3 is a common timing signal, which is input to the common drive circuit 12 and becomes a reference signal necessary for the common drive signal group Y.

Next, the operation of this circuit will be explained.

In a normal state where the time is displayed on the dot matrix liquid crystal display device 11, the selection signal group
Based on _T1 , the selection circuit 4 selects a specific digit from among the clock signals such as hours, minutes, seconds, etc. output from the clock circuit 2, and outputs output signals _O1 to _O4 to the pattern storage circuit 7. do.

FIG. 2 is a timing chart explaining this operation, and T ₁ a, T ₁ b to _{T 1} n are selection signal groups.

Here, when the selection signal T ₁ a becomes "H", the selection circuit 4 selects the 10 o'clock digit as shown in FIG. 2, and when the selection signal T ₁ b becomes "H" selects the 1 hour digit, and similarly selects the selected signal group T ₁
The selection operation is repeated according to the .

The pattern storage device 7 receives these output signals O ₁ to _{O 4}
is input, and pattern output signals P ₁ to _{P 5} are output in a time-division manner according to the clock information of each digit.

Next, the circuit configuration of the inverting circuit 8 which receives the pattern output signals _P1 to _P5 as input will be explained based on FIG.

14a to 14e are transmission gates (hereinafter abbreviated as TG); when the control terminal C is "L", the signal from the input terminal A is output to the output terminal Q; when the control terminal C is "H", the signal from the input terminal A is output to the output terminal Q; The signal at input terminal B is output to output terminal Q.

Here, the pattern output signal P ₁ is input to the input terminal A of TG14a, and the pattern output signal P ₂ is input to the input terminal A of TG14a.
The pattern output signal P ₃ is input to the input terminal A of TG14c and the input terminal B of TG14d, and the pattern output signal P ₄ is input to the input terminal A of TG14d and the input terminal B of TG14e.
The pattern output signal _P5 is input to input terminal A of TG14e and input terminal B of TG14b, and input terminal B of TG14a is input to input terminal B of TG14c.
Connect to Vss.

Furthermore, the output terminal Q of TG14a outputs display signal _H1 , the output terminal Q of TG14b outputs display signal _H2 , and the output terminals Q of TG14c to 14e output display signals _H3 to _H5 . , and the respective control terminals C commonly input the inverted signal I.

Here, in the normal state, the switching signal K is “L”
Therefore, the inverted signal I is always "L", and as a result, all the TGs 14a to 14e output the information at the input terminal A to the output terminal Q. That is, the relationship between the pattern output signals P ₁ to _{P 5} input to the inversion circuit 8 and the display signals H ₁ to _{H 5} output from the inversion circuit 8 is P ₁ =
H ₁ , P ₂ = H ₂ , P ₃ = H ₃ , P ₄ = H ₄ , P ₅ = H ₅ , and the pattern output signals P ₁ to P ₅ are output as they are as display signals H ₁ to H ₅ . . This display signal H ₁ ~
_H5 is commonly input to the latch circuits 9a to 9n, and as shown in FIG. 2, the selection signal group _T1 that controls the selection circuit 4 and the latch signals Ta to Tn that control the latch circuits 9a9n are synchronized. Therefore, latch circuit 9
The latch circuit a latches the display signals H 1 to H ₅ which are the pattern information of the 10 o'clock digit by the latch signal Ta, and the latch circuit 9b latches the display signals H ₁ to H ₅ which are the pattern information of the 1 o'clock digit by the latch signal Tb. _H5 is latched, and the latch circuits 9c to 9n latch pattern information of minutes and seconds digits in the same manner.

The latched pattern information of hours, minutes, and seconds is inputted in parallel to a segment drive circuit 10, converted into a segment drive signal group X necessary for driving the liquid crystal, and inputted to the dot matrix liquid crystal display device 11.

The dot matrix display device 11 uses the segment drive signal group X and the common drive signal group Y to
The hour, minute, and second digits are displayed as shown in FIG. 1 based on the pattern information.

Next, the operation when the display content is switched to picture mode will be explained.

In FIG. 1, when the switch 6 is turned on, the mode switching circuit operates and the switching signal K changes from "L" to "H", thereby causing the pattern storage device 7
The output content of is switched, and the pattern output signal P ₁ ~
_P5 outputs the pattern information of the picture pattern.

Figure 4 is a timing chart explaining the operation in picture mode, and here the inverted timing signal
As shown in the figure, _T2 is a signal that becomes "H" in synchronization with the selection signal _T1b , and the inverted signal I, which is the output of the AND circuit 13, is an inverted timing signal because the switching signal K is "H". The signal becomes equal to T ₂ .

Here, in the latch circuit 9a, since the timing of latching is when the inversion signal I is in the "L" state, the information of the pattern output signals _P1 to _P5 is latched as is through the inversion circuit 8, but the latch circuit At the timing when 9b latches, since the inversion signal I is "H", each TG1 of the inversion circuit 8
4a to 14e output information from input terminal B to output terminal Q.
Therefore, the contents of display signals H ₁ to _{H 5} are respectively H ₁ = “L”, H ₂ = P ₅ , H 3 = P ₄ , H ₄ = _{P 3 ,} H ₅
= P ₂ , and the latch circuit 9b outputs "L" information, that is, display erase information, for the display signal _H1 , and outputs the pattern output signal _P2 for the display signals _H2 to _H5 .
~Latch the information with each _P5 replaced.

FIG. 5 shows an example of a picture pattern in which the latched signals are displayed on the dot matrix liquid crystal display device 11 via the segment drive circuit 10.

In FIG. 5, the patterns in the five columns to the left of the center are based on the pattern output signals _P1 to _P5 latched in the latch circuit 9a, and the patterns in the five columns on the right are latched in the latch circuit 9b in order from the left. In addition, a signal obtained by inverting the pattern signals P ₅ to _{P 2}
P ₂ , P ₃ , P ₄ , P ₅ and an "L" signal indicating erasure is used in place of P ₁ .

As is clear here, if the pattern to be displayed is bilaterally symmetrical as shown in FIG. , and its scale can be greatly reduced.

Furthermore, in this embodiment, the pattern storage device was miniaturized only for picture patterns; however,
The number patterns are also symmetrical, for example,
For "0", "8", etc., the stored information in the putter storage device 7 can be halved by the same means.

Furthermore, the stored information can be reduced not only for horizontally symmetrical patterns but also for vertically symmetrical patterns by the same means.

As described above, according to the present invention, the scale of the pattern storage device can be greatly reduced, so that it is inexpensive and
It is possible to provide an electronic watch with a dot matrix display device that can display arbitrary patterns such as pictures.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the circuit configuration of the present invention.
Figure 2 is a timing chart in normal mode. FIG. 3 is a circuit diagram showing the configuration of an inversion circuit. Figure 4 is a timing chart in picture display mode. FIG. 5 is a plan view showing an example of a picture pattern in picture display mode. DESCRIPTION OF SYMBOLS 1... Reference oscillator, 2... Timing circuit, 7... Pattern storage device, 8... Inversion circuit, 9a-9n... Latch circuit, 11... Dot matrix liquid crystal display device, 14
a to 14e...Transmission gate.

Claims (1)

[Scope of Claims] 1. A clock circuit that creates information on each digit of time; a selection circuit that selects and outputs one of the information on each digit according to an input selection signal; A mode switching circuit that outputs a switching signal, and a number pattern consisting of dots and one side of a horizontally or vertically symmetrical figure pattern are memorized, and when each digit information is input, the number corresponding to the digit information is stored. a pattern memory circuit that outputs a pattern signal and outputs a pattern signal for one side of the symmetric figure when the switching signal is input; a plurality of latch circuits for latching pattern signals on one side and the other side; and a pattern on the other side that is inverted horizontally or vertically using the pattern signal as input and the inversion timing signal and the switching signal as control signals. an inversion circuit that outputs a signal; a timing control circuit that outputs the selection signal, the inversion timing signal, and the latch timing signal; a drive circuit and a dot matrix display device that display pattern information latched in the latch circuit. An electronic clock with a dot matrix display device, characterized by comprising: