JPH0127562B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a demagnetizing device that generates a demagnetizing magnetic field by passing a gradually decreasing alternating current through a coil by controlling the phase of a thyristor connected to an alternating voltage, especially a commercial power source. be.

Conventional devices of this type include those that automatically change the charging time constant of the capacitor in the ignition circuit using mechanical contacts such as rotary relays to vary the ignition angle, or semiconductor devices such as UJTs and PUTs. There was one using a relaxation oscillator circuit. However, with these circuits, it was not possible to stably set the firing angle, and it was also difficult to precisely adjust the alternating current magnetic field.

It is an object of the present invention to provide a demagnetizing device that can deform the pattern of an alternating magnetic field with high precision and in a variety of ways.

In order to achieve this object, the present invention provides a phase control circuit at the time of thyristor firing, which includes a clock generator that generates clock pulses with pulse intervals that subdivide a half cycle of the AC power supply, and a clock generator that counts input clock pulses to generate clock pulses. An ignition signal generation section that generates an ignition signal when the count value reaches a presettable predetermined number, and a predetermined number setting section that counts sequentially input pulses and sets an increase number from the start of operation to the predetermined number. , a first control section that causes the ignition signal generation section to repeatedly perform a counting operation in half-cycle units, and presets a predetermined number in accordance with the increased number; a first preset counter capable of presetting the number of ignition signals to be generated; and a second preset counter capable of counting the number of half cycles and presetting the number of half cycles at which current flow to the coil is stopped. , a second control section that causes both preset counters to perform counting operations alternately and inputs pulses to a predetermined number setting section every half period of the sum of the respective preset values; and a third control section that cuts off the firing signal during the counting operation and alternately supplies positive and reverse thyristor firing signals every half period of the sum.

Next, the present invention will be explained based on the illustrated embodiments.

In FIG. 1, the portions other than the dotted line portions are the basic portions of the circuit device according to this embodiment, and this portion will be explained first. That is, in the same figure, 1 is a clock generator, and its oscillation frequency is 256 (2 ⁸
It is set to be subdivided into sections (if the clock pulse interval is sufficiently short for 10 mS, it is not necessarily necessary to divide exactly).

2 is preset with the complement of the predetermined number of the calculated value of the 8-bit binary counter 7, and counts the input clock pulses C based on the preset value, until the count value reaches the maximum count value (predetermined number).
"255", that is, it is a preset counter that sets all 8-bit output lines to "1" when the counted number of clock pulses c reaches a preset predetermined number. 3 is a NAND gate which receives this 8-bit output signal as an input, and its output becomes the ignition signal d. 4 is a monostable multivibrator that is triggered by a half-cycle pulse a generated every half cycle of the power supply, and stops the oscillation of the clock generator 1 for the time set by RV1. A preset pulse b for presetting the binary counter 2 is generated at the trailing edge of the rectangular wave. 6 is an AND gate which receives the clock pulse c and the firing signal d as inputs. The circuit sections 2 and 3 described above constitute an ignition signal generating section according to the present invention, and the circuit sections 4 to 6 constitute a control section. The firing signal d is supplied to a thyristor circuit (not shown), which causes current to alternately flow in both directions through the demagnetizing coil depending on the voltage polarity of the AC power supply.

Numeral 7 is a binary counter that counts input pulses, and its count value sets the number by which the preset counter 2 increases over time after the start of operation, and an inverter 8 is connected to each of its 8-bit output lines. With this connection, the complement of the maximum count value can be preset in the preset counter 2. 9 is a NAND gate that receives the 8-bit output signal of the binary counter 7; when the output signal is all "1", that is, the count value is 255, the output becomes "0", and the AND gate 10 is turned off, and the gate is turned off for half a cycle. Cut off pulse a. The circuit portions 7 to 10 described above constitute a predetermined number setting section according to the present invention.

The operation of such a circuit configuration will be explained with reference to FIG. In addition, the time axis of the waveforms b to d and the amplitude changes of e in FIG. 2 are shown enlarged.
In addition, to simplify the explanation, it is assumed that the half-period pulse a is directly supplied to the binary counter 7 via the AND gate 10.

When a reset pulse is applied to the binary counter 7 at the start of operation, the output becomes all "0". For example, if the ignition start phase angle is set to 10° using the variable resistor RV1, the clock pulse c in the phase angle range of 10° from the zero crossing point of the power supply voltage waveform (0°, 180°, ...) is 14. (256×10/180) blanking is performed, and a preset pulse b is supplied to the preset counter 2 at a phase angle of 10°. During this period, the first half-cycle pulse a is detected by the binary counter 7.
This output becomes “10000000”, and the preset counter 2 receives the complement “01111111” from the preset pulse b.
(“254”). As a result, when the 15th clock pulse c is input to the preset counter 2 via the AND gate 6, the count value reaches "255", the output signal becomes all "1", and the NAND gate 3 receives the firing signal d. Occur. The trailing edge of this ignition pulse d becomes the ignition pulse. Incidentally, when the ignition signal d is generated, the AND gate 6 is closed and the subsequent clock pulse c is immediately cut off.

With the next half-cycle number pulse a, the count value of the binary counter 7 becomes "2", and the preset counter 2 is preset to "253" by the preset pulse b. Therefore, at the 16th clock pulse c, the output signal becomes all "1", and at this point, the ignition pulse d is generated. Therefore, the coil current e decreases by a change in the flow angle corresponding to the pulse interval of the clock pulse c.

In this way, each time the half-period pulse a is input to the binary counter 7 and counted up, the number of input clock pulses c required to generate the ignition signal d in the preset counter 2 increases. Then, the preset counter 2 repeatedly counts the clock pulses c in half-cycle units and generates the firing signal d each time, so that the coil current e gradually decreases. When the count value of binary counter 7 reaches “242”, preset counter 2
Then, the 242nd clock pulse c enters the next blanking period and is no longer supplied, and the coil current e no longer flows. Also, when the count value of binary counter 7 reaches “255”, the output signal is all “1”.
And gate 1 via NAND gate 9
The demagnetizing operation stops unless a reset signal is applied again to the binary counter 7 to close the zero.

In such a circuit, the initial value of the magnetic field can be adjusted by the variable resistor RV1 according to the coercive force of the object to be treated, etc., and current consumption can be saved. Furthermore, by making the generation interval of the clock pulse c adjustable, the rate of change of the coil current, that is, the slope of the envelope, can be adjusted. If the frequency of the clock pulse c is made higher, the maximum counts of the preset counter 2 and the binary counter 7 must be correspondingly increased.

According to the present invention, two preset counters 11, 12 and two control sections 13-16 and 17-19 are added to the circuit described above, as shown by dotted lines. As a result, it is possible to perform an arbitrary number of ignitions with the same flow angle in response to the build-up time of the AC magnetic field, and also to extend the thyristor's rest period to an arbitrary number of half cycles in response to the recovery time of the thyristor circuit. You can now set it to . In the same figure, 11 and 12 count half-period pulses a, and the counted values are set by setting switches 11' and 1.
This is a preset counter that generates an output signal "1" when the preset value set by 2' is reached. 13 is an RS flip-flop which is set by the output signal of the preset counter 11 and reset by the output signal of the preset counter 12. 14 and 15 are R-SFF1 respectively
This is an AND gate that is controlled by the output of 3 and the output of Q and causes the preset counters 11 and 12 to perform counting operations alternately. 16 is preset counter 12
R-SFF13 by the output signal or reset signal.
This is an OR gate that resets the . 17 is R-
This is an AND gate that cuts off the ignition signal d based on the output of the SFF13. 18 and 19 are each controlled by the LSB signal of the binary counter 7,
It is an AND gate that supplies the firing signal d to the positive and reverse thyristors alternately. The operation of the circuit configuration described above will be explained with reference to FIG. 3. Furthermore, the third
In the figure, changes in coil current are shown enlarged. The reset signal is applied to binary counter 7 and R-
When supplied to the SFF 13, they are each reset, and the output of the R-SFF 13 becomes "1", and the preset counter 11 starts counting. Assuming that the preset value is "3", the R-SFF 13 is set and cleared at the moment three half-period pulses a are input. As a result, the AND gate 14 cuts off the input of the half-cycle pulse a to the preset counter 11, the AND gate 17 cuts off the ignition pulse d, and conversely inputs the half-cycle pulse to the preset counter 12 via the AND gate 15. a begins to be supplied.
If this preset value is set to, for example, "2", an output signal "1" is generated by two inputs of the half-period pulse a. This causes the binary counter 7 to count one count, and the OR gate 16
The R-SFF 13 is reset again via the . Therefore, the preset counter 11 starts counting again, and the preset counter 2 receives the preset pulse b.
After the input of , the ignition signal d is generated with the first half-cycle pulse a. At this time, the LSB signal of the binary counter 7 causes the AND gate 18 to open and the AND gate 19 to close. As is clear from the above description, assuming that the thyristor constitutes a double-wave rectifier circuit, the coil current starts flowing when the thyristor starts operating in response to a reset signal and five half-cycle pulses a are input. After the preset signal b specified by the variable resistor RV1 is generated, the coil current of the same flow angle corresponding to the first clock pulse c flows three times. Thereafter, the AND gate 17 is closed by the output of the R-SFF 13, so the operation of the SCR is stopped for two half-cycle pulses a, that is, one cycle, and then the second output signal of the preset counter 12 stops the operation of the SCR for the interval of the clock pulse c. The flow angle becomes smaller, and the AND gate 19 opens due to the inversion of the LSB signal of the binary counter 7, the current direction is also reversed, and the coil current similarly flows three times. Thereafter, the coil current of the set number of times of conduction is decreased while alternating the current direction with a set rest period. When the binary counter 7 reaches the count value 255, the input of the half-period pulse a is immediately cut off by the AND gate 10, and the operation ends. The preset value of the preset counter 11 is set so as to obtain the desired maximum magnetic field, taking into consideration the delay time of the rise of the envelope of the alternating current magnetic field corresponding to the coil used. In addition, in the case of demagnetizing a magnetic chuck equipped with a coil of large inductance, the preset value can be set to several tens, for example, in response to a large delay in start-up. Furthermore, it is also possible to adjust the preset value to a larger value in case the shape of the object to be processed is large and affected by the skin effect. In a normal circuit, the preset value of the preset counter 12 is set to "1" or "2" so that a large transient current can be obtained at switch-in every time the current direction is switched. Conversely, preset counter 1
1 to "1" and the preset counter 12 to "0", it is possible to perform an operation similar to that in which the half-period pulse a is sequentially supplied to the binary counter 7 described at the beginning.

Incidentally, in the embodiment shown in FIG. 1, the preset counter 2 and the binary counter 7 can be replaced with a circuit using a shift register.

As is clear from the above description, by digitally controlling the phase of the thyristor, a stable gradually decreasing alternating current magnetic field can be obtained. Furthermore, it is possible to realize a flexible demagnetizing device that can highly accurately and variously deform the alternating current magnetic field pattern to suit the object to be processed.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the circuit configuration of a demagnetizing device according to the present invention, and FIGS. 2 and 3 show waveforms of each part thereof.

Claims (1)

[Claims] 1. A demagnetizing device in which a gradually decreasing alternating current is passed through a coil that generates a magnetic field for demagnetizing by controlling the phase of the firing point of a thyristor connected to an alternating current power source. , a phase control circuit includes a clock generator that generates clock pulses at pulse intervals that subdivide a half period of the AC power supply, and a clock pulse that counts the input clock pulses and generates an ignition signal when the counted value reaches a presettable predetermined number. an ignition signal generation section that generates an ignition signal; a predetermined number setting section that counts sequentially input pulses and sets an increase number from the start of the operation to the predetermined number;
a first control unit that causes the ignition signal generation unit to repeatedly perform the counting operation in units of the half cycle and presets the predetermined number in accordance with the increased number; and a first control unit that counts the number of half cycles. , and capable of presetting the number of occurrences of the ignition signals having the same phase angle.
a second preset counter capable of counting the number of half cycles and presetting the number of half cycles at which current flow to the coil is stopped; and the counting operation of both of the preset counters. a second control section that causes the pulses to be inputted to the predetermined number setting section every half period of the sum of the respective preset values; and during the counting operation of the second preset counter. and a third control section that cuts off the firing signal and supplies the firing signal to the thyristors in the forward and reverse directions alternately every half period of the sum. Magnetic device.