JPH0127593B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a buried channel charge-coupled semiconductor device, and more particularly to a high-performance meandering channel structure charge-coupled semiconductor device suitable for high density.

In recent years, attempts have been made to use charge-coupled devices (CCDs) to realize delay devices for signal processing in the television field, etc., but in this case, in order to obtain a high bandwidth, high-speed operation and a large number of elements are required. do. For example, one horizontal scanning period (1H) in the NTSC system
The number of CCD elements required to delay a video signal of 1 hour by 1H time (63.5μSec) is 682.5 elements when driven at a sampling frequency of 10.7MHz.
With a delay element that delays the 2H time, twice this
1365 elements are required. When converting a CCD delay element with such a large number of elements into an IC, a serpentine channel structure in which the channel is bent is adopted in order to increase yield and reduce size. Conventionally, the following two structures have been considered for such a meandering channel. One method is to use a highly concentrated conductive layer at the bent portion of the channel, allowing the minority carriers sent from the channel in the straight section to pass through the conductive layer in the form of majority carriers, and then to be transferred to the channel in the adjacent straight section. This is a configuration that allows The other type is a structure in which a so-called racetrack-like channel bending portion is formed to reverse the transfer direction. In either structure, a buried channel CCD structure in which the carrier runs inside the semiconductor substrate is used to avoid deterioration in transfer efficiency during high-speed operation. However, in the former case, the transfer efficiency deteriorates due to problems such as entering the BBD operation mode when the carrier is transferred through the conductive layer, and reducing channel capacity due to feedthrough caused by capacitive coupling with the clock pulse supply electrode. In addition, in the latter case, it is difficult to design when multiple electrodes are arranged in a racetrack-like channel bend, and the area of the field portion in which these electrodes run increases, resulting in an increase in electrode capacitance. There were some drawbacks such as: For this reason, the electrode capacitance seen from the driver of the clock pulse supply source applied to the transfer electrodes is large, resulting in a drawback that power consumption during high-speed driving becomes large. In particular, when patterning a device with a higher number of elements than a 1H delay line at high density, the design becomes complicated and the number of racetrack-like bends increases, making the device surrounded by racetrack channels. The area occupied by the field portion becomes larger, and the electrode capacitance becomes even larger. Thus, as the number of folds increases, chip densification is limited by the sum of the sizes of the folded channels, and the width of the channel stop region separating active channel regions in a straight transfer section. will have no choice but to widen the area. For this reason,
An increase in electrode capacity was unavoidable, making it difficult to design a high-density pattern.

SUMMARY OF THE INVENTION An object of the present invention is to provide a buried channel charge-coupled semiconductor device that eliminates the above-mentioned drawbacks of the prior art.

According to the present invention, in a buried channel charge-coupled semiconductor device having a bent channel part, the average length in the channel length direction of the gate electrode on the bent part active channel is made longer than that of a straight channel part. A buried channel charge-coupled semiconductor characterized in that the deterioration of transfer efficiency is set to a value that can be ignored, and the channel width of the bent part is formed to be approximately the same as that of the straight part. A device is obtained.

Hereinafter, the present invention will be explained in detail using the drawings.
FIG. 1 is a partially enlarged view showing an embodiment of a buried channel charge-coupled semiconductor device of the present invention. In this specification, for the sake of convenience, we will explain an example in which p-type conductivity of a Si semiconductor is used; however, any material that can be used to make a CCD can be used, and an example using a semiconductor substrate with n-type conductivity is also possible.
FIG. 1 is an enlarged view of the bent portion of the channel seen from the top surface of the semiconductor substrate on which the CCD is constructed.
The channel section 11 of the CCD is formed as a buried channel region doped with phosphorus (or As) on a p-type semiconductor substrate, and is separated by the field section 10 to prevent electrical coupling with the adjacent active channel region. ing. Field section 10
In this method, boron ions are dosed onto a p-type semiconductor substrate by thermal diffusion or ion implantation, and the thickness of the oxide film directly above it is approximately equal to the thickness of the gate oxide film in the active region.
This region is formed 10 times thicker and has a lower interfacial potential between Si and SiO ₂ . A series of transfer electrodes 12 to 16 and 17 to 21 are formed through a gate oxide film provided directly above the active region 11 to transfer charge within the channel of the CCD. These transfer electrodes are usually made of a conductive material such as polycrystalline Si, and are electrically connected to a bus line made of a material with higher conductivity, such as Al, at an appropriate location in the field section. Ru. This bus line has
Drive pulses for charge transfer are supplied from a driver provided outside the CCD step or from a driver integrated into an IC on the CCD step. As this driving pulse, pulses of any phase, such as 1-phase to 4-phase, may be supplied. In this specification, for convenience, a device that supplies two-phase 50% cross pulses will be described. As a structure suitable for this two-phase drive,
A barrier region is formed in the CCD channel to obtain unidirectional charge transfer. FIG. 2 is a cross-sectional view of the structure taken along the plane AA' shown in FIG. 1, and a diagram showing the channel potential distribution of each part. In the same figure, the same numbers as in FIG. 1 represent the same components.
The field section 10 has a thick field oxide film 40.
and a high concentration of the same conductivity as the substrate placed directly below it.
It consists of a P ⁺ layer 41. The channel region is composed of an accumulation portion 43 formed only with a dose of phosphorus, and a barrier region 44 formed by ion-implanting boron in addition to the dose of phosphorus. Therefore, the channel potential of each channel region is such that the potential of the barrier region is lower than that of the storage region, as shown at 50. Therefore, charge transfer can only occur in one direction from P to P'. In the case of two-phase drive, 12 and 17, 14 and 19, 16 and 21 are connected to the pulse P1 phase by a bus line, and 13, 18, 1
5 and 20 are connected to the other pulse P2 phase by a bus line. Here, electrodes 17 to 21 are first polycrystalline Si layers, and electrodes 12 to 16 are second polycrystalline Si layers. The potential distribution 50 represents the distribution in a potential state where P1 is at a high level (P2 is at a low level), and when P1 transitions to a low level (P2 is at a high level), the potential distribution changes to the potential distribution shown in 51. That is, when P1 is at a high level, the charge 52 stored in the channel under the gate electrode 20 is
The transition of P1 to a low level causes the adjacent 2
It is transferred to the storage section under the gate electrode of No. 1. Such one-way transfer is ensured by a similar operation from the straight channel to the bent section or from the bent section to the straight channel in FIG. The charge 53 shown in the potential distribution 51 is a carrier transferred from the channel under the 18 storage gate electrodes in the straight channel to the storage gate electrode 19 in the bent part through the barrier region 44. Such a transfer operation is also performed from under the storage gate electrode 21 to under the storage gate electrode 18. Since the channel bent portion is formed of a buried channel, it has high electron mobility and a large fringing electric field acts on the channel under the adjacent gate electrode.
Therefore, during such a transfer operation, it is unlikely that the transfer efficiency would deteriorate at the bent portion. The feature of the electrode structure shown in Figure 1 is that the average channel length (length in the active region) of one electrode in the bent channel part is set longer than the electrode length in the straight part, and this length is used to determine the transfer efficiency. The point is that the structure is limited to a size where deterioration can be ignored. Furthermore, by forming the bent portion into a U-shaped channel and forming the channel width of the bent portion to be approximately equal to the width of the straight channel portion, the electrode capacitance can be minimized. The point is that it has a good structure. Here, it goes without saying that the shape of the bent corner portion can take various shapes such as a circular arc shape and a rectangular shape. Such a folded structure
In CCDs, the number of elements in the folded channel can be designed to be extremely small (two elements in Figure 1), so the average dark current is lower than in the conventional racetrack structure, which widens the dynamic range of the device. It becomes possible to handle it. Furthermore, since the number of electrodes used in the bent channel portion is small, the width of the channel stop region for separating adjacent straight channel portions can be reduced. In FIG. 1, the width of the channel stop region can be set to about 30 μm. Furthermore, since there is almost no field region surrounded by the channel of the bent portion, the area of the field region over which the electrode runs is significantly reduced, and the electrode capacitance can be reduced.
In particular, in a device configuration with a large number of elements, this capacitance reduction effect is significant and is even more advantageous than a racetrack structure. Also, in such a structure,
The transfer efficiency is far superior to that of the conventional structure in which an N ⁺ conductive layer is placed at the bend, making it possible to create high-performance devices. In addition, since the structure is simple, there is an advantage that design such as patterning of electrode arrangement is facilitated. In this way, the structure is suitable for multiple elements and high density.

FIG. 3 is a partially enlarged view showing another embodiment of the buried channel charge-coupled semiconductor device according to the present invention. The same numbers as in FIG. 1 represent the same components. In this embodiment, electrodes 22 to 24 form a barrier region, electrodes 25 to 27 form an accumulation part, and the bent channel part is configured as one element. In addition, the channel lengths of the transfer electrodes 23 and 26 closest to the bent portion are made longer than those of the straight portion, so that the length of the polycrystalline Si wiring connecting the electrodes of the same phase in adjacent channels is minimized. ing. The channel width of the folded channel portion has the same structure as in FIG. 1. In such a structure, since the number of electrodes constituting the folded portion is only two, it is possible to make the width of the channel stop region for channel separation extremely small.
In this embodiment, the width can be reduced to about 15 μm or less. Therefore, the area occupied by the electrode section running on the field region formed between the linear channels becomes smaller, making it possible to further reduce the electrode capacitance. In this embodiment, the barrier part electrode 24 constituting the bent part
The average length in the transfer direction of the storage section electrode 27 and the average length in the transfer direction of the storage section electrode 27 are set to values such that a decrease in transfer efficiency at such a bent channel section can be ignored. To this end, the width of the gap region between the channels is configured to be as narrow as possible. The other advantages obtained with such a structure are quite similar to those of the structure shown in FIG.

FIG. 4 is a partially enlarged view showing still another embodiment of the buried channel charge-coupled semiconductor device according to the present invention. The same numbers as in FIGS. 1 and 2 represent the same components. In the same figure, 28~
30 is an electrode forming a barrier section, and 31 to 33 are electrodes forming an accumulation section. In this embodiment, the barrier part electrode 30 and the storage part electrode 3 of the bent channel part are
By extending the channel region in step 3 to the channel region in the straight section, a structure is created in which the wiring length of polycrystalline Si same-phase electrodes running in the field region is minimized while keeping the channel length in the straight section constant. It is. The effect obtained with this structure is the same as in the embodiment shown in FIG. Of course, the average length of the barrier part electrode 30 and the storage part electrode 33 in the transfer direction is set to a value such that a decrease in transfer efficiency at the bent channel part can be ignored.

As is clear from the above explanation, according to the present invention, there is no drop in transfer efficiency even during high-speed operation like a delay element used in a video band, and the field area surrounded by the bent portion is almost eliminated, thereby separating adjacent channels. Since the width of the channel stop region can be designed to be small, it is possible to reduce the electrode capacitance. Therefore, it is easy to implement an on-chip IC driver for driving the CCD. Additionally, because the number of elements in the bent portion is small, the average dark current can be kept low, making it possible to handle a wide CCD dynamic range. As the number of elements increases, the structure of the present invention exhibits its high-density feature even more than the conventional structure. That is, the structure is useful for realizing devices such as 2H delay lines and frame memories. Although the structure of a buried channel CCD has been described in this specification, a surface channel CCD in which the channel is not dosed may also be used.
Even if it is configured with CCD, there is no problem at all. Also,
Although we have explained an example in which impurity ions are doped into the channel region to implement a two-phase driven CCD, it goes without saying that it is also possible to obtain unidirectionality by changing the thickness of the gate oxide film. .

[Brief explanation of drawings]

FIG. 1 is a partially enlarged view showing an embodiment of a buried channel charge-coupled semiconductor device of the present invention, FIG. FIG. 3 is a partially enlarged view showing another embodiment of the buried channel charge-coupled semiconductor device of the present invention, and FIG. 4 is a partially enlarged view showing still another embodiment of the buried channel charge-coupled semiconductor device of the present invention. It is. In the figure, 10... field area, 11...
...Active channel region, 12-33...Gate electrode, 40...Oxide film, 41...P ⁺ conductive layer, 4
2... Semiconductor substrate, 43... Embedded channel storage section, 44... Embedded channel barrier section, 50, 5
1... Potential distribution, 52, 53... Minority carrier.

Claims (1)

[Claims] 1. In a buried channel charge-coupled semiconductor device having a bent channel portion, the average length of the gate electrode on the bent active channel in the channel length direction is longer than that of a straight channel portion, and the transfer efficiency is prevented from deteriorating. 1. A buried channel charge-coupled semiconductor device characterized in that the channel width is set to a negligible value and the channel width of the bent portion is formed to be approximately equal to that of the straight portion.