JPH0129266B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a method for testing circuit patterns on printed wiring boards and the like.

(2) Background of the Technology Conventionally, visual inspection and inspection of single-sided or double-sided printed wiring boards have been generally performed to check the conductivity and insulation of the conductor portions on the surface of printed wiring boards. However, as wiring becomes more complex and thinner, it requires a large amount of man-hours and increases human fatigue, and for this reason, an automatic pattern checker has been required. In particular, with the rapid increase in the density of semiconductors in recent years, it has become necessary to have multiple layers for printed wiring boards, and back wiring boards have also been adopted.
With increasing complexity, visual inspection was no longer possible. Therefore, there has been a growing reliance on automatic pattern checkers, as well as a need for their more efficient operation.

(3) Prior art and problems The following two methods are generally used in pattern checkers. One of them is the all-pin method.

FIG. 1 is a schematic perspective view of the main parts of an all-pin type chip adapter. Note that the same reference numerals in the figures from FIG. 1 to FIG. 7 indicate the same parts. The test pins 1 are arranged in a grid pattern so as to contact all the component insertion holes 2. This method measures all terminals at once and is highly efficient. However, the test pins 1 must be manufactured in accordance with the circuit pattern of the printed wiring board 3, and the chip adapter 4 is expensive, so it is only economically viable in mass production.

FIG. 2 is a schematic perspective view of the main parts of the adapter for checking using the moving pin method. The checking adapter 5 straddles the width direction of the printed wiring board (3) and runs in the direction of arrow A. A plurality of test pins 1 are arranged in the running direction, running tests are carried out on only limited circuit patterns, and judgment data is stored and accumulated. After running the entire length of the printed wiring board 3, the judgment results are integrated,
Determine pass/fail judgment. This method makes the chip adapter 5 cheaper than the all-pin method, so
Suitable for relatively high-mix, low-volume production. However, since it is a running test, it requires more testing time than the all-pin method.
Furthermore, in the case of a more complicated circuit pattern, the test cannot be completed in only one direction, and it is necessary to turn the printed wiring board 3 by 90 degrees and test from two orthogonal directions.
In such a case, a control method is required that minimizes the movement of the tick adapter 5, shortens the test time, and improves the operating rate of the pattern checker.

(4) Object of the invention The object of the invention is to improve the operating rate of a pattern checker by using a device having the structure and drive system of a check adapter.

(5) Structure of the invention When driving a pattern checker for a printed wiring board, the running direction and measurement section of the tick adapter are calculated in a pseudo manner based on pattern data stored and stored in advance, and the order of the shortest time is determined. The above object is achieved by a pattern checker control method characterized in that the pattern checker is further equipped with a calculation function for issuing operation commands.

(6) Embodiments of the Invention FIG. 3 is a system configuration diagram of a pattern checker control method according to the present invention. The pattern data 11 is stored in a magnetic storage device, which is stored at the time of design.
Extracted from CAD (computer aided design) data. This pattern data 11 is sent to a computer 12, which divides the given pattern data 11 in a pseudo manner and sets efficient test order division.
According to this result, an operation command for the checking adapter 14 is issued to the checker control section 13. The check adapter 14 sends a drive signal to a drive mechanism (not shown) to drive the check adapter 14. Test data is sent from the checking adapter 14 to a determination device (not shown).

FIG. 4 is an explanatory diagram of the test sequence (a) according to the present invention. For convenience of explanation, the circuit pattern is simplified and a simple example of vertical and horizontal directions is shown. Note that as a rule in designing the circuit pattern, conductors are not arranged diagonally, but only in the vertical and horizontal directions. The testing adapter 14 has only two rows of testing pins in the running direction. In the example of FIG. 4, the conduction in the B direction of the printed wiring board 3 is a-b, c-d, de, g-
f, h-i, l-m. Also printed wiring board 3
The conduction in the C direction is b-c, gh, ij, k-
It is l. This information is stored in the pattern data 11.

FIG. 5 is an explanatory diagram of the test sequence (b) according to the present invention. The check adapter 14 is the first one in the B direction.
The step is in X1. In this step a-
b, b-c, f-g, gh, k-l are subject to determination. Similarly, the intermediate step is omitted and step Xn is reached after n times. In this step, ji is the subject of determination. The test in the B direction ends at step Xn, and it is assumed that it ends after n times.

FIG. 6 is an explanatory diagram of the test sequence (c) according to the present invention. For the sake of explanation, the check adapter 14 is rotated 90 degrees (actually, the printed wiring board is rotated), and the printed wiring board 3 is moved in the C direction. The first step of the checking adapter 14 is at Y1.
In this step, a-b, b-c, c-d, d-
e is the subject of determination. Similarly, the intermediate step is omitted, and step Yp is reached after p times. In this step, k-l and l-m are the targets of determination. The test in the C direction ends at step Yp, and it is assumed that the test ends at p times.

In the above test order of A and B, the total test is n+P
It will be completed in one time.

FIG. 7 is an explanatory diagram of the second test order according to the present invention. The check adapter 14 is run in the C direction of the printed wiring board. The first step of the check adapter 14 is at Y1. In this step, ab, bc, cd, and de are to be determined. Similarly, in step Y2, f-g,
gh and hi are subject to judgment. further steps
In Y3, ij is the target of judgment. Finally, step Yq is reached after q times. In this step, k-
l, l-m are the targets of determination. In the above test order (c), it is assumed that the entire test is completed in q times.

As a result of the above, the computer 12 in FIG. 3 uses the pattern data 11 to determine in advance which test will be completed in the shortest time: n+p tests according to the test order in A and B, or q tests according to the test order in C. It makes a judgment based on a simulation and issues a command to the checker control unit.

The circuit pattern in Figure 4 is an example, and Figure 5,
Which of the running directions A and B in FIG. 6 or C in FIG. 7 is better depends on the circuit pattern, and cannot be uniformly determined.

(7) Effects of the Invention According to the present invention, it is possible to maintain the operation of the pattern checker in an optimal state and cope with the production of a wide variety of small quantities.

[Brief explanation of drawings]

FIG. 1 is a schematic perspective view of the main parts of an adapter for checking using the all-pin method, FIG. 2 is a schematic perspective view of the main parts of an adapter for checking using the moving pin method, and FIG. A system configuration diagram of the control method, FIG. 4 is an explanatory diagram of the test order of (a) according to the present invention, FIG. 5 is an explanatory diagram of the test order of (b) according to the present invention, and FIG. FIG. 7 is an explanatory diagram of the second test order according to the present invention. In the figure, 1 is a test pin, 2 is a component insertion hole,
3 is a printed wiring board, 5 and 15 are check adapters, 11 is pattern data, 12 is a computer,
13 is a checker control section.

Claims (1)

[Claims] 1. When driving a pattern checker for a printed wiring board, based on the pattern data stored in advance, the running direction and measurement section of the checking adapter are calculated in a pseudo manner, and after determining the order of the shortest time, the operation command is issued. A method for controlling a pattern checker, characterized in that the pattern checker is equipped with a calculation function.