JPH0132688B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse width demodulator, and in particular, it is an object to provide a pulse width demodulator that has a simple configuration, has few external components, and is suitable for integrated circuits.

According to the present invention, there is provided a means for extracting a positive-phase signal and a negative-phase signal of an input signal as currents, and a means for extracting an excess current or an undercurrent of a difference between the positive-phase signal current and the negative-phase signal current, respectively, compared with a predetermined constant current. Pulse width demodulation characterized by comprising a gate means for selectively taking out one of the signals, and passing the output of the gate means through a high input impedance amplifier circuit to obtain an output signal corresponding to the carrier width of the input signal. A circuit is obtained.

Next, the present invention will be described in detail according to examples and with reference to the drawings.

FIG. 1 is a circuit connection diagram showing an embodiment of a pulse width demodulator according to the present invention.

In FIG. 1, transistors Q ₃ and Q ₄ constitute a differential amplifier, and I ₁ is a constant current circuit that supplies a bias current to the differential amplifier. transistor Q ₃
A diode _D1 is connected to the collector of the diode, the base of the transistor _Q1 is connected to the cathode side of the diode, and the anode of the diode is connected to the power supply together with the emitter of the transistor _Q1 . Similarly, a diode D ₂ and a transistor Q ₂ are connected to the collector of the transistor Q ₄ . transistor
The collectors of Q ₂ and Q ₁ are diode D ₃ , respectively
The anode of D ₄ is connected and the cathode is connected in common to the base of transistor Q ₅ forming an emitter follower circuit. Also, the collectors of transistors Q ₁ and Q ₂ are each a constant current circuit.
A constant current is shunted to earth potential by I ₂ and I ₃ . Terminal a is an input signal terminal, and transistors Q ₃ and Q ₄ configuring the time differential amplifier to which no input signal is applied to terminal a have half the current set by the constant current circuit I ₁ (this is i ₁ /2) is flowing. Therefore, a current approximately equal to i ₁ /2 flows through transistors Q ₁ and Q ₂ . Here constant current circuit
Let the currents flowing through I ₂ and I ₃ be i ₂ and i ₃ respectively,
Since the settings are such that i ₁ /2<i ₂ , i ₃ , the collector potentials of transistors Q ₁ and Q ₂ remain at a low level. Therefore, the potential at terminal b is at a low level. When a signal is applied to terminal a, the currents of transistors Q ₃ and Q ₄ increase or decrease depending on the signal level. If a positive signal is now applied to terminal a, the base potential of transistor Q ₃ will rise, so the current flowing through transistor Q ₃ will increase, and therefore the current flowing through transistor Q ₁ will also increase. When the current of this transistor Q ₁ becomes larger than the current i ₂ set by the constant current circuit I ₂ , the collector potential of the transistor Q ₁ rises and passes through the diode D ₄ to the transistor.
Supply bias to the base of _Q5 and increase the potential of terminal b. Conversely, when a negative signal is applied to terminal a, the current in transistor Q ₃ decreases, but the current in transistor Q ₄ increases, the current in transistor Q ₂ increases, and the current flowing through transistor Q ₂ becomes smaller than current i ₃ . When the voltage increases, the collector potential of transistor _Q2 rises, and the potential at terminal b rises. In other words, terminal a
It is possible to configure a pulse width demodulator in which terminal b is at a high level when there is a signal input to terminal a, and terminal b is at a low level when there is no signal at terminal a.

In the circuit shown in Figure 1, diodes D ₃ and D ₄ are rectifying diodes, and the emitter follower circuit of transistor Q ₅ transfers the current rectified by the diodes D ₃ and D ₄ to the parasitic capacitance existing at the base of transistor Q ₅ . It is designed to have a high impedance in order to hold it in place. Therefore, it is suitable for integration into an integrated circuit, and in that case, external components and terminals for them are unnecessary, and cost and space can be saved in terms of system configuration.

FIG. 2 is a circuit connection diagram showing another embodiment of the present invention, in which parts having the same functions as those in FIG. 1 are given the same reference numerals. In FIG. 2, currents i ₂ and i ₃ set by constant current circuits I ₂ and I ₃ are set to a value less than half of i ₁ . Therefore, when there is no signal from terminal a, the transistors constituting the differential amplifier
Since a current of approximately i ₁ /2 flows through Q ₃ and Q ₄ , the collector potentials of transistors Q ₃ and Q ₄ are at a high voltage level. A signal is applied from terminal a and the transistor
When the currents of Q ₃ and Q ₄ increase or decrease according to the signal, and the current of transistor Q ₁ or Q ₂ becomes i ₂ or i ₃ or less, respectively, the collector potential of transistor Q ₁ or Q ₂ becomes a low level and the terminal b also becomes low level. In other words, as explained with reference to FIG. 1, a pulse signal corresponding to the carrier width can be taken out at terminal b.

Furthermore, although the differential amplifiers in both FIGS. 1 and 2 are constructed with NPN type transistors, it is clear that even if the differential amplifiers are constructed with PNP type transistors, the same effect can be obtained by changing the polarity of the phase inversion amplifier. Further, in FIGS. 1 and 2, the current ratio between the diode D ₁ and the transistor Q ₁ of the phase inversion amplifier is assumed to be 1:1, but it is not particularly necessary to set it to 1:1, and it may be, for example, 1:2. In any case, the transistor when there is no signal
For the currents of Q ₁ and Q ₂ , it is sufficient to select constant current values i ₂ and i ₃ that are large (or small), and this type of current setting can be easily done in the area where integrated circuits are best suited. Can be set.

FIG. 3 shows a circuit connection showing yet another embodiment of the invention, in which transistors are used instead of diodes D ₃ and D ₄ .
Q ₆ and Q ₇ are used, and although the explanation of the operation will be omitted, it goes without saying that the operation is similar to the embodiment shown in FIG.

Generally speaking, D ₃ and D ₄ may be elements having a rectifying function or a gate function.

As explained in detail above, the pulse width demodulator can be constructed with a simple configuration and utilizes parasitic capacitance, so it does not require any external capacitance and is suitable for integrated circuits with terminal restrictions. Since the input operating signal level can be set by the current ratio, it is also suitable for integrated circuits in that there is little variation in the offset voltage of the input differential transistor.

[Brief explanation of drawings]

FIG. 1, FIG. 2, and FIG. 3 are circuit connection diagrams each showing an embodiment of the present invention. In the figure, R ₁ , R ₂ , R ₃ ...resistance, D ₁ , D ₂ ,
...D ₄ ...Diode, Q ₁ , Q ₂ , ...Q ₇ ...Transistor, I ₁ , I ₂ , I ₃ ... Constant current circuit, C ₁ ...Capacitor, a ... Input terminal, b ... Output Terminal, c...
...Power terminal.

Claims (1)

[Claims] 1. An input terminal to which an input signal including a positive phase signal and a negative phase signal is applied, and the input electrode of one transistor is connected to the input terminal, and a current is set by a constant current circuit when no input signal is applied. A differential amplifier circuit through which half the current flows, and a positive-phase signal and a negative-phase signal extracted from the differential amplifier circuit are compared with a predetermined constant current, and either the excess current or the insufficient current is determined by the difference. It has a constant current load for selectively extracting the , and a high impedance amplifier circuit connected to the constant current load via a rectifying element,
A pulse width demodulation circuit characterized in that an output signal is obtained from the high impedance amplifier circuit according to a carrier width of the input signal.