JPH0137851B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing an insulating isolation substrate used in a semiconductor integrated circuit, particularly a monolithic semiconductor integrated circuit.

In general, a monolithic semiconductor integrated circuit consists of one chip or an insulating substrate (hereinafter referred to as
Abbreviated as board. ) contains a large number of various integrated circuit elements (transistors, diodes, thyristors,
(resistance, capacitance, etc.) are formed, so these must be electrically insulated and separated.

One method of this separation method is a dielectric insulation separation method. The substrate and manufacturing method of this method will be explained with reference to FIG.

First, as shown in FIG. 1A, an n-type silicon single crystal wafer 1 is prepared, and separation grooves 2 of a desired number and shape are formed on one side of the wafer by etching or the like.

An insulating film 3 such as a silicon oxide film is deposited on the surface on which the separation trench 2 is formed, and a silicon polycrystalline layer 4 as a support region is grown thereon by a vapor phase growth reaction or the like. Thereafter, the silicon polycrystalline support layer 4 is polished to form a flat surface using the surface of the silicon single crystal wafer 1 as a reference, and then the separation grooves are formed from the opposite silicon single crystal wafer surface with this flat surface as a reference. The silicon single crystal wafer 1 is removed by polishing or etching until the bottom of the silicon wafer 2 is reached. By completing the above steps, Figure 1b
A target substrate 5 as shown in FIG. 1 is obtained.

The substrate 5 thus obtained has a plurality of silicon single crystal island regions 6 electrically separated from each other by the insulating coating 3, and is supported as a whole by a silicon polycrystalline support layer 4. A desired integrated circuit element is formed by diffusing impurities into each of these silicon single crystal island regions 6 in a predetermined pattern.

However, in the substrate 5 as described above, (1) the silicon polycrystalline support layer 4 is formed on the silicon single crystal wafer 1 with the isolation groove formed thereon via the insulating film 3; (2) In the subsequent step of creating an integrated circuit element in the single crystal island region 6, the entire substrate 5 is curved in a direction in which the silicon polycrystalline support layer 4 becomes a convex surface. There is a serious problem.

That is, the curvature described in (1) above may cause a significant loss of precision in polishing unnecessary silicon single crystal wafers, or the curvature of the substrate 5 may cause crystal defects to be introduced into the silicon single crystal island region 6. This results in a decrease in product yield.

In addition, the curvature described in (2) above may impede the precision and uniformity of photoetching when forming integrated circuit elements, and, similar to the curvature described in (1) above, may hinder the introduction of crystal defects into the silicon single crystal island region 6. As a result, the product yield becomes worse.

As explained above, dielectric isolation type substrates in which different materials are stacked are exposed to high temperatures (approximately 800 to
The problem of bending during heat treatment (1300°C) is essential, and it is important to solve this problem.

In order to solve the above-mentioned problems (1) and (2), the present applicant has proposed Japanese Patent Application No. 50-54585
In manufacturing a dielectric insulation isolation substrate consisting of a large number of single-crystal semiconductor island regions in which circuit elements are formed, and a support region that supports the island regions while electrically insulating and separating them from each other, After forming the support region by alternately stacking polycrystalline semiconductor layers and at least one oxygen diffusion prevention film such that the outermost layer is the polycrystalline semiconductor layer, the outermost polycrystalline semiconductor layer is bonded to the substrate by a wedge action based on oxygen diffusion. He proposed polishing to a thickness that would not cause extreme curvature.

According to studies by the present inventors, if the substrate diameter is about 2 inches with this proposal, almost no curvature will occur; however, if the substrate diameter is increased to about 4 inches, the board will bend. The curvature could no longer be ignored.

That is, when a silicon polycrystalline semiconductor layer is grown in a vapor phase on a silicon single crystal wafer with isolation grooves formed through an insulating film, a curvature concave on the growth surface side occurs due to growth stress from the early stage of growth. ing. This curvature did not pose a problem as far as the growth of the silicon polycrystalline semiconductor layer was concerned as long as the substrate diameter was small, but as the diameter became larger, even if the substrate was curved with the same radius of curvature, The amount of lift of the substrate increases, causing a difference in how heat is received within the reactor, resulting in a temperature distribution in which the center of the substrate is hotter than the outer periphery. As a result of this temperature distribution, the curvature becomes even larger, and the temperature difference becomes larger, resulting in a vicious cycle, the temperature at the outer periphery of the substrate becomes extremely low, causing a serious problem in which the silicon polycrystalline semiconductor layer cannot grow in this area. .

As a result, as higher integration and larger diameter substrates progress, solving the problem of substrate curvature has become an increasingly important issue.

By the way, as a measure to prevent the curvature that occurs in the silicon polycrystalline support layer growth step shown in (1) above, H ₂ and SiHnXm, which are raw material gases for polycrystal growth,
(X is usually a halogen element, n and m are numerical values from 0 to 4) A technique for adding impurities to a mixture of polycrystalline silicon particles to give them a modified crystal structure
Introduced in Publication No. 32731. ).

It has been experimentally confirmed that this method is very effective, especially when impurities such as O ₂ , CO ₂ , and N ₂ O are added to the raw material gas.

However, even if such measures are taken to achieve a substrate with less curvature after the growth of a silicon polycrystalline support layer with a modified crystal structure, it will not be possible to obtain a substrate with less curvature in the subsequent heat treatment step for forming an integrated circuit element in the silicon single crystal island region. This time, the substrate curvature in which the silicon polycrystalline support layer side becomes a convex surface as described in (2) above occurs. This shows that the method of controlling the curvature by adding impurities in addition to the raw material gas during the formation of the silicon polycrystalline support layer alone is not a means to solve the problem of curvature of the dielectric isolation type substrate.

Regarding the above-mentioned (2) problem of curvature during the formation of integrated circuit elements, the present inventors investigated through experiments and found the following matters (a) to (e).

(a) The curvature caused by high-temperature heat treatment during the formation of integrated circuit elements is in the direction in which the silicon polycrystalline support layer side is a convex surface (the silicon single crystal island region side is a concave surface).

(b) Curving does not occur during heat treatment in a gas atmosphere such as N ₂ , Ar, H _{2 ,} etc., but occurs only by heat treatment in an oxygen gas atmosphere.

(c) The higher the heat treatment temperature (900°C) and the longer the heat treatment time, the greater the degree of curvature.

(d) When the surface of the silicon polycrystalline support layer of the substrate, which has been curved by heat treatment in an oxygen gas atmosphere, is removed by etching or the like by several μm to 50 μm, the curve returns to the state before the heat treatment.

(e) The surface of the silicon polycrystalline support layer is coated with INA (Ion
As a result of analysis using a Micro Analyzer, a large amount of oxygen was detected.

From the above experimental results, the cause of the curvature caused by high-temperature heat treatment in an oxygen gas atmosphere, such as when forming integrated circuit elements, is that the silicon polycrystalline grains on the surface of the silicon polycrystalline support layer of the substrate Wedge-shaped oxidation or significant high concentration oxygen diffusion or precipitation occurs along the boundary.
This is thought to be because expansion strain is present on the surface of the silicon polycrystalline support layer. Note that oxygen is less likely to enter the silicon single crystal wafer side surface compared to the polycrystalline side surface, so no expansion strain occurs.

As one effective measure against the curvature caused by such causes, the present applicant has developed a film that prevents oxygen from entering from the surface of the silicon polycrystalline support layer, as shown in FIG. 2a or b. For example, a film 7 such as a silicon oxide film (SiO ₂ ) or a silicon nitride film (Si ₃ N ₄ ) is applied to the surface of the silicon polycrystalline support layer or
We proposed a structure in which the support region is buried near the surface (Japanese Patent Application No. 1983-95824).

In other words, this proposal prevents the above-mentioned curvature (1) that occurs in the process of forming a silicon polycrystalline support layer by adding impurities to the raw material gas for vapor phase growth and making the polycrystalline fine particles have a modified crystal structure. At the same time, the curvature caused by the oxidation and diffusion heat treatment in the integrated circuit element forming process mentioned in (2) above is prevented by providing an oxygen intrusion prevention film 7 near the surface on the silicon polycrystalline support layer side, thereby improving the monolithic semiconductor integrated circuit manufacturing process. This provides a substrate with no curvature throughout.

The manufacturing process for the substrate shown in FIGS. 2a or 2b is similar to the manufacturing process for the substrate shown in FIG. 1, so a description thereof will be omitted.

And 8 is a silicon polycrystalline thin layer.

However, the inventors conducted more detailed experiments on the substrate having the above-mentioned proposed support region configuration and discovered the following.

(a) In the case of the structure shown in FIG. 2a, depending on the heat treatment conditions (temperature, time) in an oxygen atmosphere, the surface on the side of the silicon polycrystalline support layer 4 curves in a concave direction, contrary to the conventional case.

(b) In the case of the configuration shown in FIG. 2b, even if the same heat treatment conditions (temperature, time) are applied in an oxygen atmosphere, a thin silicon polycrystalline film remains on the surface side of the silicon polycrystalline support layer of the oxygen intrusion prevention film 7. The degree of curvature changes depending on the thickness of the layer 8.

(c) Even under the same heat treatment conditions, the degree of curvature changes depending on the thickness of the modified silicon polycrystal support layer 4 formed by adding impurities. This occurs in both structures a and b.

From the above experimental results, it is clear that the proposed substrate curvature shown in FIGS. 2a and 2b causes the silicon polycrystalline support layer 4 side surface to be concave, which is caused by shrinkage due to heat treatment of the silicon polycrystalline support layer 4 having a modified structure. Curvature and cancellation of the curvature in the opposite direction to the above, which causes the silicon polycrystalline support layer 4 side surface to be a convex surface due to expansion strain caused by oxygen infiltrating into the silicon polycrystalline thin layer 8 existing on the surface of the oxygen intrusion prevention film 7. It turns out that it depends on the relationship.

From the above, in order to reduce the curvature of the substrate proposed above, the heat treatment conditions for forming the integrated circuit element and the thickness of the silicon polycrystalline support layer should be considered (i) The curvature after the formation of the silicon polycrystalline support layer 4 should be determined as follows: (ii) It is important to accurately control the thickness of the silicon polycrystalline thin layer 8 existing on the oxygen intrusion prevention film 7 to the order of several μm. however,
Regarding (i), as shown in Figure 3, the curvature changes drastically depending on the amount of impurities added (e.g. CO ₂ flow rate).
Depending on the conditions, the direction may reverse, making it difficult to control the curvature. Regarding (ii), although the curvature after heat treatment varies depending on the thickness of the silicon polycrystalline thin layer 8, as shown in FIG. As mentioned above, it is difficult to precisely control the thickness of the silicon polycrystalline support layer 4 to be formed, taking into consideration the polishing precision, and this is becoming a bigger problem as the diameter of the substrate becomes larger. It was found that the proposed structure had many deficiencies.

The purpose of the present invention is to improve the problems of the above-mentioned conventional structure of dielectric isolation type substrates, to make it possible to freely control curvature during the manufacturing process, and to eliminate curvature as a result, greatly increasing product yield. An object of the present invention is to provide a method for manufacturing a substrate that can be improved.

The present invention is characterized by a silicon polycrystalline support layer in which the support region has a modified structure, an oxygen infiltration prevention film provided on the silicon polycrystalline support layer on the side that does not have the silicon single crystal island region, and a silicon polycrystalline support layer having a modified structure. It consists of a final multilayer consisting of alternating thin layers, and the curvature is greatly reduced by a silicon polycrystalline support layer with a modified structure, and the final multilayer is used to finely control the curvature.

The present invention will be explained in detail below with reference to FIG.

First, as shown in FIG. 5a, for example, an n-type silicon single crystal wafer 1 is used as a starting material, and after isolation grooves 2 are formed by etching or the like, an insulating film 3, for example, SiO ₂ is formed on the entire surface. The steps up to this point are exactly the same as the conventional method. Next, as shown in b, a support region is formed using, for example, a gas phase chemical reaction apparatus as shown in FIG. In the vapor phase chemical reaction apparatus, a source gas is regulated by a flow meter 15 and sent to a reactor 12, and a vapor phase chemical reaction is performed on a silicon single crystal wafer 1 maintained at a high temperature by a heating table 13. In this case, the source gas is selected by valve 16. Further, 14 is a heating body. _{First ,} a silicon single crystal wafer ₁ is heated ( ₈₀₀ yen ~
1300° C.) to form the silicon polycrystalline support layer 4 having the above-mentioned modified structure. Impurity gas Y
The flow rate may be determined experimentally by determining the flow rate at which the curvature becomes smaller, as shown in FIG. Next, the final multilayer is formed, but the H ₂ -
SiHnXm reaction gas and gas Z (e.g. O ₂ ,
Oxygen infiltration prevention film 7 is formed by heating in a mixed atmosphere with CO ₂ , N ₂ O, H ₂ O, NH _3, etc.) and by a gas phase chemical reaction.
(e.g. SiO ₂ , Si ₃ N ₄ etc.). According to experimental results, the thickness of this oxygen infiltration prevention film 7 is at most approximately
It is effective if the thickness is about 0.3 μm or more. Furthermore, in the same reactor 12, the reaction atmosphere is changed to the initial H ₂ −
A mixed gas of SiHnXm and impurity gas Y is used to form a silicon polycrystalline thin layer 8. In this case, addition of impurity gas Y may be omitted. According to the invention,
The oxygen infiltration prevention film 7 and the polycrystalline thin layer 8 are sequentially and repeatedly formed to form a final multilayer 9 as shown in FIG. 5b. In this case, the thickness of the silicon polycrystalline thin layer 8 of the final multilayer 9 is determined by the canceling relationship between the contraction of the silicon polycrystalline support layer 4 having a modified structure and the expansion strain due to oxygen intrusion, so that the curvature in the subsequent process is As shown in the figure, the value at which the curvature becomes smaller is determined experimentally by changing the thickness of the polycrystalline silicon support layer having a modified structure and the heat treatment conditions.

Further, the thickness of the final multilayer 9 is selected to be greater than or equal to a thickness such that all layers of the final multilayer will not be removed in the next polishing step. At the same time, the thickness of the final multilayer 9 is also determined from the following points. That is, FIG. 8 shows the relationship between the curvature after the formation of the final multilayer 9 and the number of layers of the final multilayer 9, and it shows a tendency that the curvature gradually decreases as the number of layers increases. As shown in Figure 3, the method of adding impurities into the silicon polycrystalline support layer described above has a large degree of change in the size of curvature, making precise control of the curvature difficult. After the curvature is reduced to some extent by the method, the curvature is accurately controlled by the number of layers of the final multilayer 9.

In other words, the number of layers in the final multilayer provides precise control of curvature. Of course, the number of layers is determined within a range in which the final multilayer has a thickness that will not be removed by polishing.

The substrate 11 on which the silicon polycrystalline support layer 4 having a modified structure and the final multilayer 9 are successively formed by the above vapor phase growth method and the support region 10 is provided thereon is then taken out from the reactor 12 and polished. First, unnecessary silicon single crystal wafers are polished to form a reference plane on the final multilayer 9 side for separating and forming silicon single crystal island regions 6. Normally, in the vapor phase growth method, thickness non-uniformity within a silicon single crystal wafer and between batches occurs by approximately ±10%, and in addition, the growth surface has depressions caused by separation grooves and unevenness peculiar to vapor phase reactions. , the reference plane is the fifth
As shown in FIG. b, the final multilayer 9 is polished to the position indicated by the broken line A. In this case, as described above, the thickness of the final multilayer 9 is determined in consideration of the amount of polishing, so that a portion of the final multilayer 9 always remains on the substrate surface.
Furthermore, since the silicon polycrystalline thin layers 8 of the final multilayer 9 are laminated at equal intervals, the thickness can be set to 0 to (silicon polycrystalline thin layer 8 thickness) regardless of the polishing precision.
can be kept within the range of Next, using the surface at the position indicated by broken line A as a new reference plane, the silicon single crystal wafer 1 is polished to the position indicated by broken line B, where each silicon single crystal island region 6 is separated and formed, as shown in FIG. 5c. A substrate 5 is obtained. This substrate 5 is subjected to heat treatment such as oxidation and diffusion to form semiconductor elements 17 and the like having a desired structure, thereby obtaining the substrate shown in FIG. 5d. After that, passivation, wiring, chip cutting, and packaging are performed to complete a monolithic semiconductor integrated circuit using dielectric isolation.

The substrate of the present invention described above has the following advantages compared to substrates with conventional structures.

(1) When forming the support layer, a significant reduction in curvature is achieved by using a polycrystalline silicon support layer with a modified structure, and fine control of curvature can be achieved by using the final multilayer. can be done easily and accurately.

(2) Curvature in the polycrystal growth process is controlled by a silicon polycrystalline support layer with a modified structure, and
The curvature that occurs during the heat treatment process during the formation of integrated circuit elements is controlled by the balance between the expansion strain caused by the intrusion of oxygen into the silicon polycrystalline thin layer of the final multilayer and the contraction of the silicon polycrystalline support layer having a modified structure. This process eliminates board curvature.

(3) Even if the thickness of the silicon polycrystalline support layer and the heat treatment conditions for forming the integrated circuit element are different, accurate curvature control is possible by selecting the thickness of the final multilayer silicon polycrystalline thin layer.

(4) By stacking a silicon polycrystalline thin layer, which determines the amount of curvature due to expansion strain, and an oxygen infiltration prevention film, each with a predetermined thickness, to form a multilayer structure, the inner surface of the substrate, which is noticeable in large diameter substrates, can be reduced. It is possible to eliminate variations in the thickness of the silicon polycrystalline thin layer after polishing due to thickness variations between substrates and polishing precision, and it is easy to control the curvature.

(5) It is easy to control the curvature after silicon polycrystal growth by selecting the number of layers in the final multilayer.

The present invention is applicable not only to substrates using the dielectric isolation method described above but also to substrates using other insulation separation methods.

FIG. 9 shows an example of application to a pn junction insulation isolation type substrate. In the figure, the same reference numerals as in FIG. 5 indicate the same or equivalent parts.

First, an n-type silicon single crystal wafer 1 is prepared, and an insulating film 3 is provided without creating a separation groove. Thereafter, according to the present invention, a polycrystalline silicon support layer 4 with a modified structure is formed, and furthermore, a final multilayer 9 having an alternate laminated structure of an oxygen intrusion prevention film 7 and thin polycrystalline silicon layers 8 is formed. After polishing the final multilayer 9,
A silicon single crystal wafer 1 is polished or etched to a predetermined thickness as shown in the figure. After that, in the silicon single crystal island region 6, p-type impurities are diffused into the silicon single crystal wafer 1 in a pattern of separation grooves,
It is formed by providing a p-type isolation region 18. Each silicon single crystal region 6 and p-type isolation region 18
The pn junction formed by the above insulates and isolates each silicon single crystal region 6.

FIG. 10 shows an example in which the present invention is applied to an air separation/insulation separation type substrate. In addition, in the figure, the same reference numerals as in FIG. 5 indicate the same parts.

This substrate 5 is manufactured using substantially the same process as the substrate 5 shown in FIG. The difference is that an isolation trench 2 is provided instead of a p-type isolation region 18. The isolation trench 2 may be formed by etching instead of the step of forming the p-type isolation region 18, but by diffusing p-type or n-type impurities into the portion corresponding to each silicon single crystal island region 6, the integrated circuit element is formed. If it is formed after forming the impurity, the photoetching operation, mask formation, etc. can be performed with high precision during the impurity diffusion.

FIG. 11 shows a substrate 8 of the same dielectric isolation type as the substrate 5 shown in FIG.

The difference from the one shown in FIG. 5 is that an n-type high impurity concentration region 19 is formed in the portion of each silicon single crystal island region 6 in contact with the insulating film 3.

This n-type high impurity concentration region 19 can be easily provided by forming the n-type impurity at a high concentration after forming the isolation trench 2, and then forming the insulating film 3, as shown in FIG. 5a. .

The n-type high impurity concentration region 19 is used as a channel stopper or the like.

Of course, it is easy to provide this n-type high impurity concentration region also in the embodiments shown in FIGS. 9 and 10.

In each of the embodiments shown in FIGS. 9 to 11, it is possible to accurately control the curvature of the substrate similarly to the substrate shown in FIG.

[Brief explanation of drawings]

Figures 1a and b are schematic sectional views showing a conventional board in the order of manufacturing steps, Figures 2a and b are schematic sectional views showing an improved conventional board, respectively, and Figure 3 is Figure 2a.
FIG. 4 is a characteristic diagram showing the relationship between the amount of impurity added and the magnitude of curvature in the substrate shown in FIG. 5a to 5b are schematic cross-sectional views showing a substrate according to an embodiment of the present invention in the order of manufacturing steps, and FIG. 6 is a schematic view showing a gas phase chemical reaction apparatus used when manufacturing the substrate shown in FIG. 5. , 7th
The figure is a characteristic diagram showing the relationship between the thickness of the silicon polycrystalline thin layer and the degree of curvature in the substrate shown in FIG. 5, and FIG. Characteristic diagrams showing the relationship and FIGS. 9 to 11 are schematic cross-sectional views of substrates showing different embodiments of the present invention, respectively. 1... Silicon single crystal wafer, 2... Separation groove,
3... Insulating film, 4... Silicon polycrystalline support layer,
5, 11...Substrate, 6...Silicon single crystal island region, 7...Oxygen infiltration prevention film, 8...Silicon polycrystalline thin layer, 9...Final multilayer, 10...Support region.

Claims (1)

[Scope of Claims] 1 Consists of a plurality of semiconductor single crystal island regions that are electrically insulated from each other and each having an integrated circuit element formed thereon, and a support region that supports each of these semiconductor single crystal island regions on one side. In the method for manufacturing an insulating isolation substrate, the support region is in contact with each of the semiconductor single crystal island regions, and the semiconductor polycrystal support layer has a modified crystal structure, and the semiconductor polycrystalline support layer has a modified crystal structure, and the semiconductor polycrystalline support layer has a support region that is in contact with each of the semiconductor single crystal island regions, and the semiconductor polycrystalline support layer has a modified crystal structure, and the semiconductor polycrystalline support layer has a support region that is in contact with each of the semiconductor single crystal island regions. As the final multi-layer structure consists of an alternating layer structure of an oxygen infiltration prevention film and a semiconductor polycrystalline thin layer in contact with the support layer, the semiconductor polycrystalline support layer with a modified crystal structure significantly reduces curvature and allows fine control of curvature. is a method for manufacturing an insulating isolation substrate, characterized in that the manufacturing method is performed depending on the number of final multilayer layers. 2. The method of manufacturing an insulating isolation substrate according to claim 1, wherein the semiconductor is silicon. 3. The method of manufacturing an insulating isolation substrate according to claim 1, wherein the oxygen intrusion prevention film is SiO ₂ or Si ₃ N ₄ . 4. The method of manufacturing an insulating isolation substrate according to claim 1, wherein the semiconductor polycrystalline thin layer has a modified crystal structure. 5. The method of manufacturing an insulating isolation substrate according to claim 1, wherein each semiconductor single crystal island region is electrically insulated from each other by any one of a pn junction, a dielectric, and air.