JPH0139117B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an automatic performance device that automatically plays rhythm instrument sounds such as drums and cymbals, or bass tones, chord tones, arpeggio tones, etc. based on tones specified by keys pressed on a keyboard. Conventionally, pattern memory stores multiple performance patterns (rhythm patterns,
A tempo counter driven by tempo pulses is used as an address generator to select a plurality of patterns corresponding to the specified rhythm from the pattern memory according to the rhythm specification signal from the rhythm selection switch. Performance pattern (pattern pulse)
and automatically plays rhythm tones, bass tones, chord tones, or arpeggio tones by controlling various rhythm sound source devices, automatic bass chord playing devices, or automatic arpegillo playing devices according to the read performance pattern. Performance devices are well known. By the way, in the above-mentioned conventional automatic performance device, the performance pattern read out from the pattern memory is uniquely determined by the rhythm designation signal from the rhythm selection switch, and the pattern memory has at most two spaces due to capacity issues. Since only measures are memorized, and it is difficult to change the rhythm designation signal by operating the rhythm selection switch during performance, once the rhythm is designated by the rhythm designation signal, the specified rhythm The performance pattern corresponding to the rhythm was simply repeated every two measures, making automatic performance extremely monotonous. The first to third inventions in this question were made in view of the above-mentioned circumstances, and their common purpose is to arbitrarily program the progression of rhythm patterns to enable rhythm performances rich in variety. be. A specific object of the first invention is to enable automatic transition to a musically preferable break state (emphasizing the beginning of a measure) for any performance section without requiring a break instruction operation during performance. It is. The automatic performance device according to the first invention includes: (a) a first storage means storing a plurality of mutually different rhythm patterns regarding the rhythm to be played, each rhythm pattern being a performance content of a certain section in the progression of the rhythm; (3 or 14 in FIG. 1); (b) a second storage means having a plurality of storage areas each corresponding to a sequential performance section whose section length is equal to the certain section; (7 in Figure 1); (c) break instruction means (15 in Figure 3) for instructing a break; and (d) a program for programming a rhythm pattern to be used for the sequential performance sections. means for selecting any one of the plurality of rhythm patterns for each performance section and storing pattern designation information for specifying the selected rhythm pattern in the second storage means corresponding to the performance section; the break information is written in the same storage area where the pattern designation information regarding the rhythm pattern is written when a break is instructed by the break instruction means in conjunction with the selection of a rhythm pattern; (1, 2, 6 in Figure 1); (e) means for generating a tempo clock signal (3 in Figure 1); and (f) synchronization to the beginning of each performance section based on the tempo clock signal. (g) signal generating means (4 in FIG. 1) for generating a timing signal generated by the signal generating means; Reading means (9 in FIG. 1) for sequentially reading stored information from the means
and (h) each time the pattern designation information is read from the second storage means, the rhythm pattern designated by the pattern designation information is read out from the first storage means in accordance with the tempo clock signal. Rhythm sound generation means (4, 5, and
(i) In response to the break information being read from the second storage means, rhythm sound is generated for a period of one beat from the beginning of the performance section corresponding to the storage area where the break information is stored. control means (A81, A82, DF81 in FIG. 4, 1 in FIG.
64). A specific object of the second invention is to enable confirmation of program contents by repeatedly playing a rhythm pattern for each desired performance section, in addition to rhythm performance based on a series of programmed pattern progressions. It is something. The automatic performance device according to the second aspect of the present invention includes: (a) a first storage means storing a plurality of rhythm patterns different from each other regarding the rhythm to be played, each rhythm pattern being a performance content of a certain section in the progression of the rhythm; (13 or 14 in Figure 1); and (b) a second memory having a plurality of storage areas each corresponding to a sequential performance section whose section length is equal to the certain section. (c) programming means for programming a rhythm pattern to be used for the successive performance sections, the program means for programming a rhythm pattern to be used for each of the performance sections, any one of the plurality of rhythm patterns for each performance section; (1, 2, 6 in FIG. 1) which selects and writes pattern designation information specifying the selected rhythm pattern into a storage area corresponding to the performance section in the second storage means; (d) mode designation means (17 in Figure 3) for designating a program check mode; (e) address change operation means for performing an address change operation to select a desired performance section; Those that send out address change control signals in response to change operations (11 to 13 in Figure 3,
(24 to 26); (f) means for generating a tempo clock signal (3 in Figure 1); and (g) a signal for generating a timing signal synchronized with the beginning of each performance section based on the tempo clock signal. generating means (4 in FIG. 1); (h) addressing a storage area corresponding to a selected performance section in response to an address change control signal from the address change operation means when the program check mode is designated; The plurality of storage areas are sequentially addressed based on a timing signal from the signal generating means in a state where the program check mode is not specified. reading means (9 in FIG. 1) for sequentially reading out pattern designation information from the storage area of the second memory; (i) the pattern designation information is read out from the second storage means in a state where the program check mode is designated; When the rhythm pattern designated by the pattern designation information is repeatedly read out from the first storage means in accordance with the tempo clock signal, a rhythm sound signal is repeatedly generated in accordance with the rhythm pattern; Each time pattern designation information is read from the second storage means in a state where the program check mode is not designated, a rhythm pattern designated by the pattern designation information is read from the first storage means in accordance with the tempo clock signal. Accordingly, the apparatus includes rhythm sound generating means (4, 5, 21 in FIG. 1) for generating rhythm sound signals in accordance with the rhythm pattern. A specific object of the third invention is to make it possible to reliably repeat the rhythm of the programmed performance sections no matter how many performance sections have pattern progressions programmed. An automatic performance device according to a third aspect of the present invention includes: (a) a first storage means storing a plurality of rhythm patterns different from each other regarding the rhythm to be played, each rhythm pattern being a performance content of a certain section in the progression of the rhythm; (13 or 14 in Figure 1); and (b) a second memory having a plurality of storage areas each corresponding to a sequential performance section whose section length is equal to the certain section. (c) programming means for programming a rhythm pattern to be used for the successive performance sections, the program means for programming a rhythm pattern to be used for each of the performance sections, any one of the plurality of rhythm patterns for each performance section; (1, 2, 6 in FIG. 1) which selects and writes pattern designation information specifying the selected rhythm pattern into a storage area corresponding to the performance section in the second storage means; (d) end instruction means (16 in FIG. 3) for instructing the end of the program; and (e) in response to the end instruction from the end instruction means, the number of performance sections programmed by the program means is Third storage means (111, 112 or 11 in FIG. 7) for storing the corresponding end state
3); (f) means for generating a tempo clock signal (3 in Figure 1); and (g) signal generating means for generating a timing signal synchronized with the beginning of each performance section based on the tempo clock signal. (4 in FIG. 1), and (h) sequentially reading pattern designation information from the second storage means by sequentially addressing the plurality of storage areas based on the timing signal from the signal generating means. (i) every time the pattern designation information is read out from the second storage means, the rhythm pattern designated by the pattern designation information is read out from the second storage means (9 in FIG. 1); Rhythm sound generating means (4, 5, and
(21); and (j) detecting a performance section of a rank corresponding to the number of programmed performance sections based on the end information stored in the third storage means and the specified address in the reading means; , end control means (first end control means) for controlling the reading means to return the designated address in the reading means to the address at the start of reading in synchronization with the timing signal from the signal generating means at the end of the detected performance section; 11) in the figure. The present invention will be described in detail below with reference to the accompanying drawings. FIG. 1 shows an embodiment of the automatic performance device of the present invention, and the device of this embodiment is controlled in accordance with the operation of various buttons (operators) arranged on the panel section 24 shown in FIG. be done. First, the functions of the various buttons and the display of the panel section 24 shown in FIG. 2 will be briefly explained. Description of Button Functions and Display Functions Each button in the button group 241 is constructed in an interlocking mechanical lock type in which when one button is pressed, it is held in the pressed state and the other buttons are automatically reset. The functions of each button in this button group 241 are as follows. Button (NOR.): Designates the normal performance mode, and when this button is pressed, a performance pattern that progresses according to the rhythm selection using the button group 244 and the variation selection using the button group 245, which will be described later, is obtained. Buttons (Var4) (Var8)...Specify the variation performance mode. When button Var4 is pressed, a performance pattern that changes from a normal pattern to a variation pattern every 4 measures is obtained, and button Var8 is pressed. When pressed, a performance pattern that changes from a normal pattern to a variation pattern every 8 measures is obtained. Buttons (SEQ1) (SEQ2) (SEQ3)...These are used to specify addresses when programming a pattern progression in sequence memory 7 (Fig. 1), which will be described later.
It is equipped with three memory parts of SEQ3, and three types of programs are possible. The button group 242 is a button CHECK and a button
It consists of two buttons, REC., and each button is a push-on-push-off type that is held in the pressed state when pressed and returns to its original state when pressed again. The functions of each button in this button group 242 are as follows. Button (REC.)……Sequence memory 7 (1st
This specifies the program mode for programming the pattern progression in Figure). Button (CHECK): Designates a check mode in which the pattern progression programmed in the sequence memory 7 (FIG. 1) is checked bar by bar. In addition, the light emitting diode LED 242a arranged near the button REC.
During writing of the pattern progression in the program (FIG. 1), it lights up continuously to notify that programming is in progress, and when the address of the sequence memory 7 (FIG. 1) overflows, it blinks to notify that writing is impossible. Each button in the button group 243 is configured to be a self-returning type that is pressed down when pressed, but automatically returns to its original state when the button is released. The functions of each button in this button group 243 are as follows. Button (FOWARD): Used in program mode or check mode. Advances the measure number (program number) by one step. Button (BACK)...Used in program mode or check mode, moves the measure number (program number) back one step. Button (RESET)...Returns the measure number (program number) to the first measure. Button (LOAD)...Pressed every step in the program mode, it instructs writing of pattern progression into the sequence memory 7 (FIG. 1). Button (BREAK): Used to specify a break (prohibition of pattern generation) in program mode. Button (END)... Commands the end of the program in program mode. Each button in the button group 244 is a rhythm selection button for selecting a rhythm type, and each button corresponds to 16 types of rhythms, such as march, waltz, jazz waltz, etc. Each button of this button group 244 is configured in an interlocking mechanical lock type similar to the button group 241 described above. Also, rhythm selection button group 2
Sixteen light emitting diodes (LEDs) 244a to 244p arranged near each of the 44 buttons indicate the selected rhythm. Each button in the button group 245 is a pattern designation button, which selects four types of patterns PT1, PT1, and Rhythm corresponding to the rhythm designated by the rhythm selection button group 244.
One of PT2, PT3, and Var. is specified. In other words, in the device of this embodiment, there are three types of normal patterns corresponding to each rhythm.
Four types of patterns are set: PT1, PT2, PT3 and one type of variation pattern Var. One of these buttons PT1 to PT3 and Var can be selected using each button in the pattern specification button group 245. select. In addition, 4 buttons arranged near each button of the pattern designation button group 245
The light emitting diodes LED245a to 245d indicate a designated pattern. The pattern designation button group 245 is constructed in an interlocking mechanical lock type in which when one button is pressed, the other buttons automatically return to normal. The button group 246 is fill-in or roll pattern designation buttons for designating a fill-in pattern or roll pattern. A fill-in pattern is a special pattern mainly used for drum solos.
The roll pattern is a special pattern consisting of repeated hits of the snare drum, and in the device of this embodiment, three types of fill-in patterns Fil.1 to Fil.3 and three types of roll patterns Roll1 to Roll3 can be specified. There is. In addition, light emitting diodes LED 2 are arranged near each button of the fill-in or roll pattern designation button group 246.
46a to 246f indicate designated fill-in patterns or roll patterns. Note that this fill-in or roll pattern selection switch group 246 is also constructed as an interlocking mechanical lock type. The Fil.Roll button 247 is a fill-in select button that is pressed to insert a fill-in pattern or roll pattern during rhythm running, before running, or during programming. This fill-in select button 247 is the button group 2 described above.
Like each of the 43 buttons, it is configured to be self-resetting. The Fil.ABC button 248 is an ABC fill-in select button for selecting whether or not to apply a special pattern generated in response to selection of a fill-in pattern or a roll pattern to automatic bass chord performance. This ABC fill-in select button is composed of a push-on-push-off type like the buttons of the button group 242 described above. The start switch ST249 and the synchro start switch SST250 perform rhythm running control. In other words, start switch 2
When you turn on 49, the rhythm starts, and when you turn it off, the rhythm stops. A synchro start switch 250 is used to control the start and stop of a rhythm in synchronization with key depressions on the keyboard 19 (FIG. 1). In addition, start switch 249
The synchronized start switch 250 is a seesaw-type on/off switch. ROM/RAM selection switch ROM/RAM2
Reference numeral 51 designates either the pattern memory ROM 13 that stores a plurality of performance patterns or the pattern memory RAM 14 (FIG. 1) in which patterns can be written.
When is selected, the pattern memory ROM13
The performance pattern is read out from the pattern memory.
When RAM14 is selected, the pattern memory
A performance pattern is read from RAM14. This ROM/RAM changeover switch 251 is comprised of a seesaw type changeover switch. Button SWS252 and button R/W253
is used to write the performance pattern set by the pattern setting switch matrix circuit 15 (FIG. 1) into the pattern memory RAM 14. That is, when the button 252 is pressed, the output of the pattern setting switch matrix circuit 15 is selected by the pattern pulse selector 16 (FIG. 1), and when the button 253 is pressed, the output of the pattern setting switch matrix circuit 15 is selected.
RMA14 becomes writable. Note that button 2
52 and button 253 are both configured in a push-on-push-off type. A start/stop foot switch select button FSS start/stop 254 and a fill-in foot switch select button FSS fill-in 255 are used to control the start or stop of a rhythm by a foot switch (not shown), and to control the start or stop of a rhythm by a foot switch (not shown). This is to control the insertion of fill-in patterns or roll patterns. That is, when the button 254 is pressed, the foot switch is used to control the start or stop of the rhythm, and the start or stop of the rhythm can be controlled by the foot switch, and when the button 255 is pressed, the foot switch is used to control the start or stop of the rhythm. It is used to control insertion, and the insertion of fill-in patterns or roll patterns can be controlled by a foot switch.
Note that the buttons 254 and 255 are both push-on-push-off types. The display 256 numerically displays the tempo or the number of bars/beats. In this embodiment, the display 256 is commonly used for three types of display: tempo display, bar number display, and beat number display, and before the rhythm starts, the display 256 displays the tempo numerically. However, after the rhythm starts, the display 256 simultaneously displays the number of bars and the number of beats, and during the program mode or check mode, the display 256 displays the number of bars numerically. . Note that the light emitting diode LED 256a is turned on to distinguish the number of measures and the number of beats when the display 256 displays the number of bars and beats at the same time. A light emitting diode LED 257 displays the tempo. That is, the light emitting diode 257 blinks in synchronization with the tempo to display the tempo. The tempo display select button 258 is used to display the tempo numerically on the display 256 during rhythm running. When the tempo display select button 258 is pressed while the rhythm is running, the display 256, which had been displaying the number of bars and beats, displays the tempo numerically. Note that this tempo display select button 258 is of a push-on-push-off type. The tempo adjustment volume 259 is for adjusting the tempo, and the speed of the tempo can be varied by rotating the tempo adjustment volume. The functions of each button and the function of the display have been described above, and the apparatus of this embodiment executes the following seven operation modes, which are roughly classified according to the operations of the various buttons on the panel section 24. 1 Normal performance mode 2 Variation performance mode 3 Program mode 4 Program check mode 5 Program performance mode 6 Pattern memory RAM write mode 7 Fill-in-roll performance mode Below, the overall block diagram shown in Fig. 1 and the following for each operation mode are shown below. This will be explained in detail with reference to a detailed circuit. General description of the overall configuration First, the overall configuration of this device will be explained according to FIG. In FIG. 1, the mode selection switch circuit 1 is a button group 241, 24 on the panel section 24 (FIG. 2).
2,243, button group 241,2
It includes a switch that is turned on and off according to the operation of each button 42 and 243. The operating mode of this device is determined according to the operating state of the mode selection switch circuit 1, and a mode control signal corresponding to the determined operating mode is generated in the mode control signal forming circuit 2. Details of the mode selection switch circuit 1 and the mode control signal forming circuit 2 are shown in FIG. The pattern selection switch circuit 6 is connected to the panel section 24.
It includes switches corresponding to a rhythm selection button group 244, a pattern specification button group 245, a fill-in or roll pattern specification button group 246, and a ROM/RAM changeover switch 251, according to the operating status of each switch. Generate pattern selection information specifying a predetermined performance pattern. The sequence memory RAM 7 is a writable memory in which pattern selection information from the pattern selection switch circuit 6 is sequentially written in the program mode to program pattern progression. The pattern selection information selector 8 selects either pattern selection information generated from the pattern selection switch circuit 6 or pattern selection information read out from the sequence memory RAM 7.
For example, in the normal performance mode, pattern selection information from the pattern selection switch circuit 6 is selected,
In the program performance mode, pattern selection information from the sequence memory RAM7 is selected. Details of the pattern selection switch circuit 6, sequence memory RAM 7 and pattern selection information selector 8 are shown in FIG. The beat counter unit 4 counts tempo pulses generated from the tempo oscillator 3 and generates address signals TC ₀ to TC ₄ that address a pattern memory ROM 13, a pattern memory RAM 14, and a pattern setting switch matrix circuit 15, which will be described later.
Further, the beat counter section 4 generates a beat pulse Ci ₂ for each beat, and a bar pulse Ci ₄ for each bar. In addition, the beat counter section uses a tempo signal that represents the tempo.
Generates TEMP. This tempo signal TEMP is a pulse signal that is generated every beat pulse Ci2 before the rhythm is running, provided that the synchro start switch 250 (Fig. 2) is on, and is a pulse signal that is generated every bar pulse Ci4 while the rhythm is running. becomes. The start/stop control circuit 5 includes a start switch 249 and a synchro start switch 250.
In response to the operation shown in FIG. 2 and the key-on signal KTR from the keyboard section 19 indicating a key press on the keyboard section 19,
It generates a control signal for controlling the operation of the beat counter section 4, and also generates a rhythm stop signal STOP indicating that the rhythm is stopped or a rhythm running signal RUN indicating that the rhythm is running. Details of the beat counter section 4 and start/stop control circuit 5 are shown in FIG. The measure counter section 9 counts the measure pulses Ci4 generated from the beat counter section 4, and generates a signal indicating the measure progression (the number of measures indicating which measure it is in).
Generate Q ₀ to Q ₄ . These signals Q ₀ to _{Q 4} are used as address signals to address the sequence memory RAM 7, and are added with "1" by the adder 10, and are used to display the tempo, bar, and beat as measure display signals Q ₀ ' to Q ₄ '. added to circuit 18. Further, the measure counter section 9 generates a signal 4n every four measures, and a signal 8n every eight measures. This signal 4
n or 8n is used in variation playing mode. Furthermore, the bar counter section 9 is configured so that the number of bars (count value) can be increased or decreased without operating the beat counter section 4 in the program mode or program check mode. Measure counter section 9
The signal outputted from the bar counter section 9 is a signal indicating that the count value of the bar counter section 9 is not "0", and is used as a confirmation signal when the count value of the bar counter section 9 is to be decreased. The end control circuit 11 mainly functions for the program performance mode. That is, the end control circuit 11 includes a storage section, and in the program mode, the sequence memory RAM 7 is stored in this storage section.
The final address of the program is stored in memory, and in the program performance mode, the final address of the stored program is compared with the output of the adder 10, and when the two match, a match signal A=B is output and the measure counter is activated. It is configured to initially reset the section 9. As a result, in the program performance mode, the contents programmed in the sequence memory RAM7 are repeatedly read out.
Program play is executed repeatedly. Details of the bar counter section 9, adder 10 and end control circuit 11 are shown in FIG. The pattern memory ROM 13 is composed of a read-only memory ROM, and has multiple performance patterns (for example, patterns PT1, PT) corresponding to each rhythm.
2, PT3, Var), and also stores three types of fill-in patterns and three types of roll patterns of two measures each. Each performance pattern (pattern pulse) stored in this pattern memory ROM 13 is generated by pattern selection information R ₀ to R ₃ , RV ₀ ,
Of the signals TC ₀ to TC 4 generated from RV ₁ , F ₀ to F ₂ , FILS and the beat counter section ₄ , and the signals Q ₀ to Q ₄ generated from the bar counter section 9, the signal Q ₀ is used as an addressing signal. Read out sequentially. Here, pattern selection information R ₀ to _{R 3} generated from the pattern selection information selector 8 indicates the selected rhythm type, and information RV ₀ and RV ₁ indicate specified patterns (patterns PT1 to TT3) of the selected rhythm type. and Var), information F ₀ to _{F 2} indicates the selected fill-in pattern or roll pattern, and information FILS indicates whether the fill-in roll performance mode is selected. Also, among the signals Q ₀ to _{Q 4} generated from the bar counter section 9, the signal Q ₀
The reason why is used as the address designation signal is related to the fact that the pattern memory ROM 13 stores performance patterns of two measures each. i.e. signal
When Q ₀ is "0", the performance pattern for the first bar is read out, and when the signal Q ₀ is "1", the performance pattern for the next bar is read out. The pattern memory RAM 14 is composed of a writable random access memory RAM and has the same address structure as the pattern memory ROM 13, and the stored performance patterns (pattern pulses) are read out in the same manner as the pattern memory ROM 13. The pattern setting switch matrix circuit 15 is for writing performance patterns into the pattern memory RAM 14. The pattern setting switch matrix circuit 15 is comprised of a switch circuit in which pattern setting switches are arranged in a matrix, and a predetermined performance pattern is set by appropriately turning on each switch. The pattern pulse selector 16 receives the signal ROM/RAM generated from the pattern selection information selector 8.
The pattern pulse or pattern memory RAM read out from the pattern memory ROM 13 according to
One of the pattern pulses read out from 14 is selected and applied to the musical tone forming circuit 20 and the rhythm sound source circuit 21. The pattern pulse selector 16 receives a signal from the pattern selection information selector 8 that specifies a break (prohibition of pattern generation).
When a BRCS is generated, all performance patterns are prohibited from being sent to the musical tone forming circuit 20 and the rhythm sound source circuit 21. Also, when the signal FILS indicating the fill-in/roll performance mode is being generated, pressing the ABC fill-in select switch (corresponding to button 248 (Fig. 2)) will cause a special function to be generated based on the fill-in pattern or roll pattern selection. Sending of the pattern to the tone forming circuit 20 can be prohibited. When the switch matrix selection switch (corresponding to button 252 (FIG. 2)) is pressed, the pattern pulse selector 16 selects the output of the pattern setting switch matrix circuit 15, adds it to the pattern memory RAM 14, and adds it to the pattern setting switch matrix circuit 15. The performance pattern set by the player is written into the pattern memory RAM 14. The details of the pattern pulse selector 16 are as follows: pattern memory ROM13, pattern memory RAM1
4 and pattern setting switch matrix circuit 1
9 in relation to 5. The musical tone forming circuit 20 forms musical tones based on the keys pressed on the keyboard section 19, and generates musical tones based on not only the musical tones of the pressed keys but also the bass pattern, chord pattern, and arpeggio pattern added from the pattern pulse selector 16. Forms musical tones that represent automatic bass notes, automatic chord notes, and automatic arpeggio notes, where the bass pattern indicates the pitch relative to the root note (detected based on the notes of keys pressed on the keyboard) in automatic bass performance, and its The generation timing represents the generation timing of the bass note, and based on this base pattern, the musical tone forming circuit 20 forms a musical tone signal indicating a root note and a subordinate note having a predetermined interval relationship with this root note, and uses this as the base pattern. Output at the timing of occurrence. Further, the chord pattern represents the chord tone generation timing and chord tone access, and the musical tone forming circuit 20 outputs a musical tone signal indicating the chord tone formed based on the key depression in accordance with this chord pattern. In addition, the arpeggio pattern indicates which key of the pressed keys will generate the sound, and the generation timing indicates the timing at which the arpeggio sound will be produced.
The musical tone forming circuit forms a musical tone indicated by an arpeggio pattern, and outputs this at the timing at which the arpeggio pattern is generated. Although the details of the musical tone forming circuit 20 are not shown, the device for forming automatic bass tones and automatic chord tones is similar to the device described in Japanese Patent Application No. 109750/1986, title of the invention ``Key code data generation device.'' Furthermore, as a device for forming an automatic arpeggio sound, a device having the same structure as the device described in Japanese Patent Application No. 52-124947, title of the invention "Electronic Musical Instrument" can be used. . The rhythm sound source circuit 21 mainly has a plurality of sound source circuits that generate percussion instrument sounds, receives a rhythm pattern among the performance patterns output from the pattern pulse selector 16, and controls each sound source circuit according to this rhythm pattern. Then, a musical sound signal indicating a rhythm sound (percussion instrument sound) corresponding to the rhythm pattern is formed. The musical tone signals indicative of pressed key tones, automatic bass tones, automatic chord tones, and automatic arpeggio tones formed by the musical tone forming circuit 20 and the musical tone signals indicative of automatic rhythm tones outputted from the rhythm sound source circuit 21 are resistively mixed and sent to an amplifier. 22, and after being amplified appropriately, the sound is output from the speaker 23. The lighting circuit 17 is connected to the button REC shown in FIG.
16 light emitting diodes 244a near each button of the rhythm selection button group 244, 4 light emitting diodes 2 near each button of the ~244P pattern designation button group 245
45a, 245d, six light emitting diodes 246a to 246f near each button of the fill-in or roll pattern designation button group 246, and the lighting of the tempo display light emitting diode 257. Details of this lighting circuit 17 are shown in FIG. The tempo/measure/beat display circuit 18 is a circuit for controlling the numerical display of the tempo, number of bars, and number of beats in the tempo/measure/beat table 256 shown in FIG. The details of this tempo/measure/beat display circuit 18 are shown in FIG. The fill-in control circuit 12 functions in the fill-in roll performance mode. When the fill-in selection switch (corresponding to button 247 in FIG. 2) is turned on, the fill-in control circuit 12 outputs a fill-in/roll performance designation signal Fis that rises in synchronization with the beat pulse Ci2 and falls in synchronization with the measure pulse Ci4. . Also, if the fill-in selection switch is turned on before the rhythm run, a signal is sent to the measure counter section 9.
It is configured to transmit the COTD and inhibit the bar pulse Ci4 applied to the bar counter section 9 at the same time as the rhythm starts running. Details of this fill-in control circuit 12 are shown in FIG. Next, each operation mode will be explained with reference to each detailed circuit. Normal performance mode In the normal performance mode, the performance pattern specified by the rhythm selection button group 244 and the pattern specification button group 245 is repeatedly generated in units of two measures, and this causes rhythm tones, bass tones, and chord tones. Alternatively, the arpeggio sound is automatically played repeatedly in units of two measures. Button operations in normal performance mode are as follows. Press the button NOR. One button from the rhythm selection button group 244 and one button from the pattern designation button group 245 are selected and pressed. Switch the ROM/RAM selector switch 251 to the ROM side or RAM side. Turn on the start switch 249 or synchro start switch 250. Button group 24 in panel section 24 (Fig. 2)
1 is configured with an interlocking mechanical lock type in which when one button is pressed, the other buttons automatically return, so when button NOR. is pressed, button Var4,
Var8, SEQ1 to SEQ3 are forcibly returned to the return state, which causes mode selection switch circuit 1 (third
Switches 19 to 23 corresponding to buttons Var4, Var8, and SEQ1 to SEQ3 in the figure) are turned off. In addition, the button group 24 of the panel section 24 (Fig. 2)
Since none of the buttons in the mode selection switch circuit 1 and the buttons in the button group 242 are pressed, the switches 11 to 18 of the mode selection switch circuit 1 are also all off. Therefore, the signal output from the mode control signal forming circuit 2 is the signal from the switch 17 corresponding to the button CHECK and the signal from the switch 1 corresponding to the button RECORD.
OR circuit OR with OR condition with the signal from 8
Record or check processing signal from 2 R+C
Only the inverted signal + becomes "1", and all other signals become "0". Press one button in the rhythm selection button group 244 and one button in the pattern designation button group 245 on the panel section 24 (FIG. 2), and press the ROM/
Set the RAM selection switch 251 to the ROM side or
When switching to the RAM side, rhythm selection information R ₀ to _{R 3} indicating the rhythm selected from the pattern selection switch circuit 6 (Fig. 4), pattern specification information RV ₀ , RV ₁ and
A ROM/RAM switching signal ROM/RAM is generated. That is, the pattern selection switch circuit 6 (FIG. 4) is connected to the rhythm selection button group 244, the pattern designation button group 245, and the fill-in or roll pattern designation button group 24 on the panel section 24 (FIG. 2).
Rhythm selection switch 61, pattern designation switch 62, fill-in or roll pattern designation switch 63, and ROM/ROM selection switch 61 consisting of 16, 4, 6, and 1 switches corresponding to each button of 6 and RAM/ROM changeover switch 251.
It is equipped with a RAM selection switch 251, and when one button of the rhythm selection button group 244 is pressed, one switch of the rhythm selection switch 61 corresponding to this button is turned on, and the selected rhythm selection switch 6 is turned on. A signal indicative of the rhythm is generated. This signal is encoded into 4-bit rhythm selection information _R0 to _R3 by an encoder 65 and output. An example of encoding by the encoder 65 is shown in Table 1. In other words, this device
Although 16 types of rhythms are set, the rhythm selection information R ₀ to _{R 3} indicates one of them.

【table】

[Table] Also, when one button in the pattern designation button group 245 is pressed, one of the pattern designation switches 62 corresponding to this button is turned on, and a signal indicating the designated pattern is output from the pattern designation switch 62. Ru. This signal is converted into 2-bit pattern designation information RV ₀ and RV ₁ by the encoder 66.
encoded into OR circuit OR61, OR62
Output via . An example of an encoder using the encoder 66 is shown in Table 2. That is, in this device, four types of patterns PT1, PT2, PT3, and Var are set corresponding to each rhythm, and the pattern designation information RV ₀ and RV ₁ indicate one of the patterns.

[Table] Also, the ROM/RAM selection switch 251 is
Pattern memory switched to ROM side
Outputs a signal “1” indicating selection of ROM13,
Pattern memory switched to RAM side
A signal "0" indicating selection of RAM 14 is output. At this time, press the fill-in or roll pattern designation button group 2 on the panel section 24 (Fig. 2).
When a button 46 is pressed, one of the fill-in or roll pattern designation switches 63 corresponding to the pressed button is turned on, and the fill-in or roll pattern designation switch 63 outputs the designated fill-in or roll pattern. This signal is encoded by an encoder 67 into 3-bit fill-in or roll pattern designation information F ₀ -F _{2 and} output. An example of an encoder using this encoder 67 is shown in Table 3.

【table】 However, in normal performance mode, the fill-in
Select button 247 (Figure 2) is not pressed.
Therefore, the fill-in control circuit 12 (13th
), the fill-in signal Fis does not occur, and this
From the mode control signal forming circuit 2 (Fig. 3)
This is because the fill-in processing signal FILS is not generated.
Fill-in or roll pattern specification information F₀
~F₂is not used here. The reset generated from the pattern selection switch circuit 6
rhythm selection information R₀~R₃, pattern specification information RV₀，
RV₁, fill-in or roll pattern specification information
F₁~F₂and ROM/RAM switching signal ROM/RAM
The RAM is added to the pattern selection information selector 8.
Ru. Pattern selection information selector 8 is rhythm selection information
R₀~R₃, pattern specification information RV₀, RV₁, film
In or roll pattern specification information F₀~F₂,centre
Ill-in processing signal FILS and ROM/RAM off
5 signals corresponding to ROM/RAM respectively
It is equipped with selectors 81 to 85, and each selector
Pattern selection switch times for A input of 81 to 85
The information from route 6 is added, and the sequence is added to the B input.
Information from the memory RAM7 is added.
These selectors 81 to 85 form mode control signals.
Sequence memo generated from circuit 2 (Figure 3)
Switching is controlled by a reselection signal SEQS. and
By the way, in normal performance mode, sequence memo
As mentioned above, the reselection signal SEQS is “0”.
Each selector 81 to 85 is a pattern selection switch.
Select the information from circuit 6 and enter the pattern selection information section.
Rector 8 receives information from pattern selection switch circuit 6.
output information. Note that the signal is generated from the pattern selection switch circuit 6.
Information R₀~R₃, RV₀, RV₁,F₀~F₂, FILS and
and ROM/RAM is also used as sequence memory RAM7.
In this case, a mode control signal forming circuit is added.
Load pulse signal generated from 2 (Figure 3)
Since LDP is “0”, sequence memory RAM
7 is not ready for writing and the pattern
The information added from the selection switch circuit 6 is
is not written to the performance memory 7. In the panel section 24 (Fig. 2), the synchro star
Start switch 250 or start switch 24
When 9 is turned on, the beat of the beat counter section 4 (Figure 5)
The child counter 41 starts operating. First, operate the synchro start switch 250.
I will explain the case. Star in Figure 5
Synchro start switch of start/stop control circuit 5
The switch 250 and the start switch 249 are both
Synchro start switch 250 is off when
The synchro start signal SST and
and the star generated from the start switch 249.
Both signals ST are “0”, so that
Since the output of NOR circuit NR51 is “1”, it is free.
The top flop 51 is in the reset state and also
The circuit NR52 outputs a signal “1” and this signal
“1” is the value of the beat counter 41 of the beat counter section 4.
Added to the load input, all bits of the beat counter 41
"1" is forcibly loaded into the TS. this
state, the synchro start switch 250
is turned on and the synchro start signal SST is “1”
Then, the output of NOR circuit NR52 becomes “0”.
The beat counter 41 is generated from the tempo oscillator 3.
Start counting the tempo pulse TCL. child
To explain a little about tempo oscillator 3, the tempo oscillator 3
The tempo oscillator 3 controls the tempo during automatic performance of this device.
This determines the oscillation frequency and changes the oscillation frequency.
It consists of an oscillator capable of
Rotation volume 259 of panel section 24 (Fig. 2)
It is designed to be variably controlled by The beat counter 41 is generated from the tempo oscillator 3.
By counting the tempo pulse TCL,
Each parallel bit output signal TC₀~TC_FourWhen you change
Both signal TC₂Outputs pulse pulse Ci2 at the falling edge of
Then, at the falling edge of signal TC4, measure pulse Ci4 is applied.
Output. In addition, synchro start switch 25
0 is turned on, but the key-on signal is still not coming from the keyboard section 19.
If the No. KTR has not arrived, start/stop
AND circuit A51 of step control circuit 5 remains inactive.
, the flip-flop 51 is not set.
stomach. Here, the key-on signal generated from the keyboard section 19 is
The number KTR rises in synchronization with the key pressed on keyboard section 19.
It's a signal. synchro start switch 250
is turned on and the flip-flop 51 is in the reset state.
If the start/stop control circuit 5 is in
The AND condition of the code circuit A52 is satisfied, and this AND condition is satisfied.
The beat counter section is activated by the output “1” of circuit A52.
4 AND circuit A41 becomes operational. However,
Beat pulse Ci generated from the beat counter 41
2 is OR circuit OR41, AND circuit A41, OR
Output as tempo signal TEMP via circuit OR43.
Powered. This tempo signal TEMP will be explained in detail later.
In the lighting circuit 17, a light emitting diode for tempo display is installed.
Used to control the lighting of the code 257 (Figure 2).
I can stay. Also output from the beat counter 41
Bar pulse Ci4 also uses OR circuits OR42 and OR43.
It is output as a tempo signal TEMP via
This signal is a tempo signal based on beat pulse Ci2
TEMP and weight do not appear in their own unique form. In this case, the start/stop control circuit 5
Since the lip-flop 51 has been reset, it is turned off.
The output of the circuit OR51 is “0”, and the rhythm running
The row signal RUN is not generated and the rhythm stop signal STOP is generated.
It is occurring. Automatic play is now stopped.
Ru. In other words, turn on the synchro start switch 250.
After the key-on signal KTR is activated, the beat count is performed before the key-on signal KTR is generated.
The tempo used to display the tempo is used to operate the data section 4.
This is to generate the power signal TEMP. When a key is pressed on the keyboard section 19, a key-on signal is generated.
KTR is added to the start/stop control circuit 5.
, the AND of the start/stop control circuit 5
Circuit A51 becomes operational, which causes the fritz to
Pflop 51 is set. flipflops
The set output Q of pull-up 51 is passed through the OR circuit OR51.
and is output as the rhythm running signal RUN. Also
The output of the OR circuit OR51 is determined by the differentiating circuit 52.
The rising differential is taken, and the output of this differentiating circuit 52 is
Therefore, the contents of the beat counter 41 are all bits “0”.
and tempo oscillator 3 is also reset to its initial state.
is set. Also, the output of the differentiating circuit 52 is an OR circuit.
Added to road OR41 and OR42, rhythmic running
Synchronize with the start, beat pulse Ci2 and measure pulse Ci4
generate. This is the beginning of the rhythmic run.
The output signals TC2 and TC4 of the beat counter 41 are
If “0”, beat pulse Ci2 and measure pulse Ci
4 will not occur, so this
This is to remove it. Flip flow of start/stop control circuit 5
When flip-flop 51 is set, flip-flop 5
The inverted output of 1 becomes "0". Therefore Anne
The code circuits A52 and A41 are inactive and the tempo signal is
As TEMP, bar pulse Ci4 is OR circuit OR4
2, Appears via OR43. Figure 6 shows a tie-up of the above operations with respect to the signals of each part.
This is shown in Mingchaat. In other words,
Turn on the black start switch 250 to turn on the synchronizer.
When the cross-start signal SST becomes “1”, the beat starts.
The counter 41 starts operating and outputs each bit.
signal TC₀~TC_Fourchanges as shown in the figure. stop
signal TC₂Beat pulse Ci2 occurs at the falling edge of the signal
T.C._FourA bar pulse Ci4 is generated at the falling edge of . Also Te
The pulse pulse Ci2 appears as the temperature signal TEMP.
Ru. When a key is pressed on the keyboard section 19, a key-on signal is generated.
When KTR becomes “1”, the beat counter 41 is reset.
and each bit output signal TC₀~TC_Fouris everything
becomes “0” and at the same time the rhythm running signal RUN
It rises to “1”. Also at this time, the pulse pulse Ci2 and
and measure pulse Ci4 are generated by the output of the differentiating circuit 52.
generated. The beat counter 41 starts counting again.
However, the tempo signal TEMP is set to beat pulse Ci2.
Instead, a bar pulse Ci4 appears. When the start switch 249 is turned on,
Start signal ST is output from start switch 249.
This signal is sent to the rhythm via the OR circuit OR51.
Output as the system running signal RUN. rhythm running
When the signal RUN is output, the output of the differentiating circuit 52
Therefore, the beat counter 41 and the tempo oscillator 3 are
The beat counter 41 is reset to its initial state.
Counting starts from the initial state of . The following operations
synchro start switch 250 is turned on.
It is the same as when Switch 53 of start/stop control circuit 5
is the start stop of the panel section 24 (Fig. 2).
Tsuto Switch Select (FSS Start/Stotsu
) Turn on the switch 53 with the one that corresponds to 254.
Rhythm by foot switch FS
The start or stop of is controlled. Sunawa
The output of the switch 53 is the output of the flip-flop 51.
It is added to the T input and is added to the foot switch FS.
Therefore, the signal at the T input is controlled, which causes the free
flop flop 51 is set or reset
The start or stop of the rhythm is controlled. In FIG. 7, the measure counter section 9 is a 6-bit
A bar counter 91 is provided. This bar counter
The start/stop control circuit 5 (fifth
When the rhythm stop signal STOP is generated from (Fig.)
has an AND circuit that can be operated by the signal +.
All bits are loaded to “1” by the output of path A93.
has been done. Bar pulse Ci generated from the beat counter section 4
4 is an AND circuit that can be operated by the signal +.
Route A91, OR circuit OR91, invert signal COTD
AND circuit A9 that can be operated by the signal
2 to the count input Ci of the bar counter 91.
Added. Here, the signal COTD is a function described later.
Output from the control circuit 12 (Fig. 13)
In this case, it is "0". Another measure
To the up/down control terminal U/D of the counter 91
is generated from the mode control signal forming circuit 2 (Fig. 3)
A back processing pulse signal BCP is added to
Is this back processing pulse signal BCS
In this case, it is “0”, and the measure counter 91 is
It is in a loaded state. Therefore, the measure counter 91 is a beat counter section.
Count according to measure pulse Ci4 added from 4.
Top up. From this measure counter 91, parallel
Bit output signal Q₀~Q_Fiveis output. Also, the output signal Q of the measure counter 91₀,Q₁Gato
When both become “1”, that is, every 4th measure
The AND condition of AND circuit A94 is satisfied, and signal 4
n and output signal Q₀,Q₁,Q₃together
When it becomes “1”, that is, every 8th measure, the
The AND condition of the code circuit A95 is satisfied, and the signal 8n is
Output. These signals 4n and 8n are variable as described below.
Used in the Ation performance mode. Note that the other circuit parts in Figure 7 are based on this normal operation.
It is not directly related to performance mode, so it will not be explained here.
do not have. Signal TC generated from beat counter section 4₀~
T.C._Fourand the signal generated from the bar counter section 9
Q₀is a pattern mem- ber as a dynamic addressing signal.
memory ROM13, pattern memory RAM14 and
and pattern setting switch matrix circuit 15.
and output from the pattern selection information selector 8.
Pattern selection information R₀~R₃, RV₀, RV₁,F₀
~F₂, the address statically specified by FILS
The performance patterns are sequentially read out. Furthermore, the pattern
The memory ROM 13 contains pattern selection information R₀~R₃，
RV₀, RV₁,F₀~F₂, specified by FILP
Signal TC for each address₀~TC_Fourand signal Q₀dynamic ad
Performance patterns related to accompaniment sounds (bass)
Patterns, chord patterns, arpeggio putters
performance patterns (rhythm) and rhythm notes (rhythm)
pattern) is stored in units of two measures.
ing. In addition, the pattern memory RAM14 is a pattern memo.
It has the same address structure as the ROM13, and
A certain performance pattern is written in advance. child
of the performance pattern to the pattern memory RAM14.
Writing is pattern setting switch matrix circuit
Pattern memory writing detailed later by 15
This is done in watch mode. The performance read out from the pattern memory ROM13
From performance patterns and pattern memory RAM14
The read performance pattern is selected from the pattern pulse selector.
pattern selection information selector
According to the signal ROM/RAM generated from 8.
One of the two is selected. The pattern pulse selector 16 shown in FIG.
selectors 161 and 162 are pattern memo
Output of ROM13 and pattern memory RAM
Selects one of 14 outputs
The selector 161 selects performance patterns related to accompaniment sounds.
The selector 162, which selects the turn, is the rhythm
This is for selecting a performance pattern related to sound. The performance read out from the pattern memory ROM13
Performance patterns are performance patterns related to accompaniment sounds and
It is divided into performance patterns related to rhythm sounds.
are added to the A inputs of selectors 161 and 162, respectively.
Ru. Also read from pattern memory RAM14.
The performance pattern that was created is also a performance pattern related to accompaniment sounds.
and performance patterns related to rhythm sounds.
and to the B input of selectors 161 and 162, respectively.
Added. Now, the ROM/RAM switching signal ROM/RAM is
If it is “1”, selectors 161 and 162 are
Signal applied to A input (pattern memory ROM
13).
Ru. Also, if the signal ROM/RAM is “0”, the
Rectors 161 and 162 are the signals applied to the B input.
(The performance read out from the pattern memory RAM 14)
pattern). Selector 161, 16
2 outputs are A of selectors 163 and 164, respectively.
added to the input. Selectors 163 and 164 are switch matrices
Pattern according to on/off of selection switch 165
Memory ROM13 or pattern memory RAM1
4 output and pattern setting switch matrix circuit
This selects one of the 15 outputs.
Pattern setting switch matrix circuit for B input
The performance pattern set in step 15 is related to the accompaniment sound.
It is divided into those related to rhythmic sounds and those related to rhythmic sounds.
Each has been added. By the way, in normal performance mode, the switch
Trix selection switch 165 is off, so the switch
The matrix selection signal SWS becomes “0” and the
The vectors 163 and 164 are pattern memory ROM1
3 or read from pattern memory RAM14
Performance patterns and rhythm sounds related to accompaniment sounds
Select a performance pattern for each. Also, selectors 163 and 164 stop selection operation.
It has a function to prohibit output by
Ru. In other words, the selector 163 is pattern selection information.
Break processing signal BRCS is generated from selector 8.
and fill-in processing signal FILS occurs when
And ABC fill-in select switch 166
Output is prohibited when turned on. Also
Rector 164 receives break processing signal BRCS.
Prohibits output when The outputs of selectors 163 and 164 are musical tones, respectively.
It is guided to the formation circuit 20 and the rhythm sound source circuit 21.
Accompaniment sounds (automatic bass sound, automatic chord sound, automatic altruistic sound)
Pejiyo sounds) and rhythm sounds are formed. Thus, bass notes, chord notes, arpeggio notes, and
Rhythm sound is selected by rhythm selection button group 244, putter
The performance pattern specified by the button designation button group 245
Repeated automatic play in units of 2 measures based on the turn.
A moving performance is performed. Next, the display function will be explained. pattern selection
Pattern selection information output from information selector 8
R₀~R₃, RV₀, RV₁,F₀~F₂are each lit times
Decoders 171, 172 of path 17 (FIG. 10),
Added to 173. Decoder 171 is added
Information R₀~R₃into 16 signals representing each rhythm.
The decoder 172 encodes the information RV₀, RV₁each
Decodes into 4 signals showing the specified pattern and decodes it.
Coder 173 is information F₀~F₂fill in putter
Decorate the six signals that indicate the roll or roll pattern.
code. However, decoders 172 and 173 are
File output from turn selection information selector 8
Its operation is controlled by the input processing signal FILS.
Ru. In other words, the fill-in processing signal FILS is “0”
If so, the decoder 172 becomes operational, but the decoder 172
The carder 173 becomes inoperative. On the other hand, fill-in
When the physical signal FILS is “1”, the decoder 172
becomes inoperable, and the decoder 173 becomes operational.
Ru. In normal performance mode, the fill-in processing signal
Since FILS is “0”, the decoder 172 operates.
becomes possible, and the decoder 173 becomes inactive.
Ru. Therefore, decoder 171 and decoder 1
An output signal is generated from 72, which signal is used to drive the lighting means.
The light emitting diodes 244a through the dynamic circuit 175
244p and light emitting diodes 245a to 245
d and corresponds to the pressed rhythm selection button.
corresponding light emitting diode and pressed pattern
Lights up the light emitting diode corresponding to the specified button.
Ru. Tempo signal generated from beat counter section 4
TEMP is the lighting means of the lighting circuit 17 (Figure 10)
A light emitting diode for tempo display is connected via the drive circuit 175.
is added to the code 257. By the way, the tempo signal
TEMP is the synchro start switch as mentioned above.
Tsuchi 250 and start switch 249 are missing.
When both are off, the direct current is “0”,
I turned on the synchro start switch 250, but
Before the rhythm run, a beat pulse Ci2 appears,
During rhythm running, measure pulse Ci4 appears. death
Point of light emitting diode 257 for displaying tempo
The light operation is as follows. Synchro start switch 250 and starter
The light switch 249 is off...the light goes out Synchro start switch 250 is on and restarts.
Before rhythm run...Lights turn on every beat Rhythm running...Lights on every measure Tempo pulse generated from tempo oscillator 3
TCL and beat counter 4 of beat counter section 4
1 parallel bit output signal TC₀~TC_Fouris tempo/small
It is added to the node/beat display circuit 18 (FIG. 11).
In addition, the bar counters 91 of the bar counter section 9 are arranged in parallel.
Bit output signal Q₀~Q_Fouris "1" in adder 10
Added signal Q₀′〜Q_Four’ as tempo, measure, and beat table
is added to the display circuit 18. Here, the adder 10
Parallel bit output signal Q of bar counter 91₀
~Q_FourIt is the measure counter 91 that adds "1" to
Because the count value does not directly correspond to the number of measures.
It is. In other words, as mentioned above, the bar counter 9
1 is a measure with all bits “1” as the initial state.
Measure counter 9 starts counting pulse Ci4.
A count value of 1 is a value smaller by 1 than the actual number of measures.
shows. Therefore, the count value of the bar counter 91 is
To match the actual number of bars, use the bar counter.
It is necessary to add "1" to the count value of 91.
That's why. For example, in the first measure, the measure counter
The count value of the counter 91 is 0 in decimal notation, and
Adding “1” represents the first measure.
It becomes "1". In the tempo/measure/beat display circuit 18, the tempo pulse
STCL, signal TC₀~TC_Fourand signal Q₀′〜Q_Four′ based on
Zuki tempo, number of measures (how many measures), number of beats (how many beats)
(eyes) using the display 256 (Fig. 2).
Ru. First, the tempo numerical display will be explained. ten
The numerical value of the point is displayed before the rhythm runs or the tempo is displayed.
Select switch 186 (tempo display set in Figure 2)
(corresponding to rect button 258) is turned on.
Displayed as a 3-digit number using the indicator 256.
Ru. In FIG. 11, the clock oscillator 181 is
A faster oscillator compared to oscillator 3 (Figure 1)
A clock pulse of a predetermined frequency is generated. nine
The clock pulse oscillated from the lock oscillator 181
The times are added to counter 182 and counted. cow
The parallel bit output of the converter 182 is applied to the latch 183.
reset terminal R of the counter 182 and
The load control terminal L of latch 183 has a tempo pulse.
Added STCL. Therefore the counter
182 is the count for each occurrence of tempo pulse TCL
You can reset the value, repeat the count, and set the tempo pulse.
Contents of counter 182 when TCL occurs
is applied to latch 183 every time a tempo pulse TCL occurs.
be transferred. The numerical value transferred to latch 183 in this way is
The value is inversely proportional to the tempo. Latch 183
Output is inversely proportional binary/decimal as addressing signal
Added to conversion memory 184. Inverse proportional binary/10
The decimal conversion memory 184 accepts binary numbers as addresses.
The value obtained by converting the reciprocal of the binary number to a decimal number is stored.
It consists of a read-only memory ROM with
Inverse proportional conversion and binary/decimal conversion of the obtained binary number
Convert and output. Therefore, the inverse proportional binary/decimal conversion memory 184
A signal indicating a decimal value corresponding to the tempo is output from
be done. This signal is applied to multiplex circuit 185,
Multiplexed signal T from multiplexed signal generation circuit 193₁,T₂，
T₃is time-division multiplexed and selected for each digit by
is applied to the B input of the data input terminal 190. Mode control signal is generated in normal performance mode
The record generated from circuit 2 (Fig. 3) or
Since the check processing signal R+C is “0”, the
When the output of the code circuit A181 becomes “0”,
That is, when the rhythm running signal RUN is “0” or
When tempo display select switch 186 is on
The output of the OR circuit OR81 becomes “0” and is selected.
190 selects the signal applied to the B input.
Time division multiplexing selected by selector 190
Decimal signal is number light emitting diode driver 191
is applied to display 256 via. For numbers
Added to the light emitting diode driver 191
Signal T₁indicates that the highest value (100's place) of the displayed value is 0.
This is used to prohibit the display when
Ru. Also signal T₃and the AND condition of signal R+C.
The output of the AND circuit A182 is processed by the program described later.
In system mode or check mode, the lowest
value (as will become clear from the discussion below)
In RAM mode or Check mode, the number of beats
used to prohibit the display of
Ru. Is the display 256 a 3-digit light emitting diode display?
and multiplex the added signal T₁,T₂,T₃
The light emitting diode that displays each digit number by
Displays the assigned tempo numerically. The display 256
An example of numerical display of tempo is shown in Figure 12a.
It becomes like this. In Figure 12a, the number 125 is an example.
represents ♪=125. The performer should check the display 256 before starting the rhythm run.
Adjust the tempo volume 25 while watching the tempo display.
9 (Figure 2) to set the tempo oscillator 3 (first
By varying the oscillation frequency of
It can be adjusted to the position. Also while running the rhythm
Press the tempo display select button 258
Then the tempo will be displayed numerically and you can check the tempo.
be able to. Next, the bar number and beat number display will be explained.
The number of measures and beats are displayed while the rhythm is running.
The number of measures is displayed using the upper two digits of the display 256.
The number of beats is displayed using the last digit. beat
Signal TC output from counter section 4₀~TC_Fourand
Signal Q output from measure counter section 9₀~Q_Fourto
Signal Q with “1” added₀′〜Q_Four’ is binary/10, respectively.
Added to decimal conversion circuits 187 and 188 to convert decimal numbers
After being converted into a signal shown in FIG.
It will be done. The multiplex circuit 189 includes a multiplex signal generation circuit 19
The multiplexed signal T generated from 3₁~T₃is added
Signal T₃Binary/decimal conversion circuit 1 in synchronization with
Assign the output of 87 and send the signal T₂and T₃synchronized to
one of the outputs of the binary/decimal conversion circuit 188.
Assign signals to indicate the digit and tens digit values, respectively.
By doing so, binary/decimal conversion circuits 187, 188
time-division multiplexing of the output. By multiplex circuit 189
The time-division multiplexed signal is sent to the selector 190.
Added to A input. As mentioned above, in normal performance mode, the record
The code or check processing signal R+C is “0”.
Therefore, if the rhythm running signal RUN is “1” and ten
If the port display select switch 186 is off and the
OR circuit when the output of the code circuit A181 is “1”
The output of OR181 becomes “1”, which causes the
Rector 190 selects the signal to be applied to the A input. The signal selected by selector 190 is a number
Display device via light emitting diode driver 191 for
256 and the signal T₁~T₃of each digit by
Lights up the light emitting diode for displaying numbers. However,
The display 256 displays the number of beats by the lower 1 digit.
The number of measures will be displayed using the first two digits.
Ru. Also, if the output of the AND circuit A181 is “1”,
Then, the decimal point light emitting driver 192 becomes operational.
As a result, the first and second lower digits of the display 256
Decimal point light emitting diode 256a between digits
(Figure 2) lights up. This decimal point is a normal 10
It does not have the meaning of a decimal point in a base number.
It simply shows the distinction between the number of measures and the number of beats. this
An example of the display on the display 256 in the case of
The result will be as shown in Figure 12b. In Figure 12b, the number
The number 13 indicates the number of bars, and the number 2 indicates the number of beats. Variation performance mode Normal performance in variation performance mode.
The performance pattern running in mode is every 4 measures.
Or automatically play variation patter every 8th measure.
mode, and changes are made to the automatic performance.
Ru. Button operations in variation performance mode
is the button NOR. of the button group 241 (Fig. 2).
Press button Var4 or button Var8 instead
The rest is the same as the normal performance mode. i.e. Press button Var4 or Var8. Liz
Press one of the program selection buttons 244.
and one of the pattern designation button group 245
Select and press. Set the ROM/RAM selector switch 251 to ROM
or RAM side. Start switch 249 or synchronizer
Turn on the light switch 250. In the panel section 24 (Fig. 2), the button group 241 is
When you press the button Var4, button group 241
The other buttons will automatically return to their original state, so you can
In the mode selection switch circuit 1 (Figure 3), the button Var
Only the switch 19 corresponding to switch 4 is turned on. vinegar
When switch 19 is turned on, the mode selection switch is turned on.
A signal Var4 is generated from path 1, and this signal Var
4 is an AND circuit A2 of the mode control signal forming circuit 2
Added to 3. AND circuit A23 is connected to other inputs.
4 bars generated from the bar counter section 9 (Fig. 7)
The signal 4n is “1” for only one measure at each milestone.
and start/stop control circuit 5 (Fig. 5).
Rhythm running signal RUN and mode output from
Output from switches 21 to 23 of selection switch circuit 1
Performs the OR condition of the input signals SEQ1 to SEQ3.
A signal obtained by inverting the output signal SEQ of the OR circuit OR1
SEQ is added and its logical condition is expressed as
If it is shown as 4n・RUN・・Var4 becomes. Therefore, the AND circuit A23 receives the signal 4n.
When it becomes “1”, that is, for one measure at each measure.
Only then, the AND condition is satisfied and the signal “1” is output.
do. The output of this AND circuit A23 is an OR circuit
Variation processing signal VRS via OR21
is output. Variation output from mode control signal forming circuit 2
Ation processing signal VRS is pattern selection switch
OR circuits OR61 and OR6 of circuit 6 (Figure 4)
Added to 2. Therefore, variation processing
While the signal VRS is “1”, the encoder 66
Output (pattern specification information RV₀, RV₁is forced
Converted to “11”. Pattern specification information RV₀，
RV₁is “11” as shown in Table 2 above.
Street, variation pattern Var₀is specified
This corresponds to the case where That is, the panel section 24
4 measures if button Var4 is pressed in
Pattern specification information for each RV₀, RV₁It looks like a burr
Same as if the ation pattern Var.
can be changed into a state. Therefore, for example, the normal patterns PT1 to PT3
Considering that you are choosing one of the
This pattern has a variation patter every 4th measure.
1 bar every 4th bar.
Only Setsubun is mixed with variation pattern Var.
Tata pattern specification information RV₀, RV₁is pattern selection
It is output from the switch circuit 6. Also, press button Var8 on the panel section 24 (Fig. 2).
When pressed, mode selection switch circuit 1 (Figure 3)
switch 20 is turned on, which causes the signal Var8
is generated, and this signal Var8 is the mode control signal type.
It is added to the AND circuit A22 of the configuration circuit 2. Ann
The code circuit A22 has other inputs with signals 8n, RUN,
SEQ is added and its logical condition is expressed as a logical expression.
To show 8n−RUN−・Var8 becomes. Here, the signal 8n is the measure number as mentioned above.
The signal generated from the counter section 9 (Fig. 7)
This is a signal that remains “1” for only one measure at each point.
Ru. Therefore, the AND circuit A22 receives the signal 8n.
When it becomes “1”, that is, 1 measure every 8th measure
The AND condition is satisfied only during this period, and the signal “1” is output.
Output. This signal is passed through the OR circuit RO21.
Output as variation processed signal VRS,
Same as when the button Var4 mentioned above is pressed.
Processing takes place. Therefore, the button Var8 is pressed on the panel section 24.
If the
Dynamically changes to variation pattern Var.
Pattern specification information RV₀, RV₁is the pattern selection switch.
It is output from the tsuchi circuit 6. The pattern output from the pattern selection switch circuit 6
Turn designation information RV₀, RV₁is the pattern selection information set.
The pattern memories 13 and 14 are accessed via the director 8.
This is a address specification signal, but the following operation is
This is exactly the same as in the normal performance mode. However, in variation performance mode,
Normal pattern PT1 with turn designation button group 245
~Even if you press the button corresponding to PT3, the pattern will not work.
Pattern output from tone selection switch circuit 6
Specification information RV₀, RV₁is every 4th measure or 8th measure
Automatically shows variation pattern Var.
The pattern specification information changes to “11”.
Information RV₀, RV₁During the one measure where the number changes to “11”,
If so, the lighting circuit 17 is activated near the pressed button.
Variation pattern instead of light emitting diode
Light emitting diode 245 near the button to specify
Turn on d. program mode Program mode programs pattern progression
This is an operation mode in which the pattern
progress is written to sequence memory RAM7.
Then, preparations are made for the program performance to be described later.
Programs in program mode can run up to 32 steps.
Steps (32 measures) can be programmed.
Ru. The button operations in program mode are as follows.
I'm going to growl. Press the button REC. One of the buttons SEQ1 to SEQ3
Select and press. 1 When programming the main pattern One of the rhythm selection button group 244
button and pattern specification button group 245
Press one of the buttons, then press the button
Press LOAD. 2 Program fill-in or roll pattern
If you ram Fill-in or roll pattern specification button
Press one button from button group 246,
Then press the fill-in select button 247.
With the button down, press the LOAD button. 3 When programming a break pattern While pressing the button BREAK, press the button
Press LOAD. Any one of the above three operations is executed in sequence. Press the END button at the end of the program. In addition, in the above operation, ROM/RAM switching
Switch 251 switches to ROM side or RAM side
However, ROM/RAM is required for programming.
Programming can be done by turning on the changeover switch 251.
Both are possible. In this case, for each read operation
Switch the ROM/RAM selector switch 251
Add operations. Press the button REC. on the panel section 24 (Figure 2)
Then, the pair of mode selection switch circuit 1 (Fig. 3)
The corresponding switch 18 is turned on and the mode selection switch is turned on.
A signal REC is generated from the switch circuit 1. child
The signal REC is the mode control signal forming circuit 2 (third
The record processing signal is sent via the AND circuit A26 in the figure).
It is output as the number RES. Also, the record processing signal RES is supplied to the lighting circuit 17.
(FIG. 10) is added to the AND circuit A171.
The other input of the AND circuit A171 is a low frequency oscillator.
174 inverted output signals are added, and this
In this case, the signal is “1”, so AND circuit A17
1 becomes operational and the signal “1” drives the lighting means.
It is connected to the light emitting diode 242a via the circuit 175.
Yes, the light emitting diode 242a is turned on. In addition, mode selection switch circuit 1 (Fig. 3)
The rising differential circuit 30 differentiates the rising edge of the signal REC.
Ivy signal REC^*“1” when pressing (button REC.)
) is the mode control signal forming circuit 2
Through AND circuit A31 and OR circuit OR22
Output as reset pulse signal REP. child
The signal REP is output from the bar counter section 9 (Fig. 7).
The measure counter 91 is reset via the circuit OR93.
All of the bar counters 91 are added to the
Resets the contents of the bit to "0". measure
Output signal Q of counter 91₀~Q_FiveOf which signal Q₀~Q_Four
is the address of sequence memory RAM7 (Figure 4).
It is used as a sequence specification signal.
Address 0 of the memory RAM 7 is specified. Also, on the panel section 24 (Fig. 2), press the button SEQ1.
~Press any of SEQ3 to switch circuit
1 (Fig. 3) corresponding switches 21 to 23
One of the switches is turned on and the corresponding switch is turned on.
The signals SEQ1 to SEQ3 are “1” only when
Output. These signals SEQ1 to SQE3 are
is added to process memory RAM7 (Figure 4).
Specifies the address of the storage area used for the program.
Ru. Also, these signals SEQ1 to SEQ3 are end control
The inputs of latches 111-113 of circuit 11 (FIG. 7)
Added to enable terminal E, signals SEQ1 to SEQ
Only the latches corresponding to 3 are operable. Then program (sequence memory RAM)
Write pattern selection information to 7)
However, 1 When programming the main pattern 2 Program the fill-in or roll pattern.
If you want to 3 When programming a break pattern Each operates slightly differently. When programming the main pattern, first
One button in the rhythm selection button group 244
and one of the pattern specification button group 245
When the button is pressed, the pattern selection switch
Rhythm selection information R from circuit 6 (Figure 4)₀~R₃oh
and pattern specification information RV₀, RV₁occurs, and this
Information R₀~R₃and RV₀~RV₁is a sequence
Added to memory RAM7. Also output from the pattern selection switch circuit 6.
Information R₀~R₃and RV₀, RV₁is pattern selection
It is added to the information selector 8. By the way, the program
In rhythm mode, the rhythm running signal RUN is “0”
Therefore, the signal generated from the mode control signal forming circuit 2
The sequence memory selection signal SEQS to be set is “0”
Therefore, the pattern selection information selector 8
(Figure 4) is the A input (pattern selection switch circuit)
6) is selected. Therefore pata
Information R added to tone selection information selector 8₀~
R₃, RV₀, RV₁is selected and output to the lighting circuit 17
added to. This will cause the rhythm selection button you pressed to
Light emitting diodes 244a to 244 corresponding to the tongues
One of p and the pressed pattern specification button
Light emitting diodes 245a to 245d corresponding to the
One of them lights up. If the button LOAD is subsequently pressed, the mode
The switch 14 of the selection switch circuit 1 (Fig. 3)
The signal generated from this switch 14 is turned on.
The differentiation circuit 27 takes the differentiation of the rising edge, and the signal LOA^*
It is added to the AND circuit A28 as and times
Route A28 has signals SEQ and REC added to the other inputs.
The logical condition is expressed as a logical formula. SEQ−REC−LOA^* becomes. Therefore, AND circuit A28 is a signal
LOA^*occurs, i.e. when the button LOAD is pressed.
The AND condition is met and the roll is made.
Outputs pulse signal LDP. This load pulse
The signal LDP is inverted and sent to the sequence memory RAM7.
(Figure 4) Read/write control terminal R/W
is added to the sequence memory RAM7.
state. Therefore sequence memory
The RAM7 has a signal from the pattern selection switch circuit 6.
Generated rhythm selection information R₀~R₃and pattern
Specification information RV₀, RV₁is determined by signals SEQ1 to SEQ3.
is written to address 0 of the storage area specified by
be programmed. Also, the output signal LOA of the differentiator circuit 27 (Fig. 3)^*
is added to AND circuit A35. AND circuit A
35 has signals SEQ and R+C added to other inputs.
The logical condition is SEQ…(R+C)…LOA^* It is becoming. Therefore, AND circuit A35 is
In this case, it becomes operational and outputs a signal “1”.
The signal is OR circuit OR23, 2-bit time delay
If flip-flop DF21, OR circuit OR24
As bar counter driving pulse signal CDP via
Output. The measure counter drive pulse signal CDP is the measure counter drive pulse signal CDP.
In addition to the AND circuit A97 of the printer section 9 (Fig. 7),
It will be done. AND circuit A97 provides mode control to other inputs.
The record generated from the control signal forming circuit 2 (Fig. 3)
The top level of the code processing signal RES and the bar counter 91
Bit output signal Q_FiveAND taking condition with and
Inverted output and mode control signal formation of circuit A96
The record generated from circuit 2 (Fig. 3) or
A check processing signal R+C is added, and this
In this case, the AND circuit A97 is enabled.
Therefore, the measure counter drive pulse signal CDP is
This AND circuit A97, OR circuit OR91 and
Counting of measure counter 91 via circuit A92
is added to the input Ci and moves the measure counter 91 by one step.
step forward. This allows sequence memory
The following address is specified for RAM7 (Figure 4),
Preparations are made for writing the next step. Program fill-in or roll patterns
If so, first use a fill-in or roll putter.
Pressing one of the button designation button group 246
From the pattern selection switch circuit 6 to the bottom
In or roll pattern specification information F₀~F₂comes out
and this information F₀~F₂is sequence memory
Added to RAM7. Also this information F₀~F₂is the pattern selection information selection
is led to the lighting circuit 17 via the controller 8 and is pressed down.
button to specify fill-in or roll pattern.
Corresponding light emitting diodes 246a to 246f
Turn on one of the lights. Next, press the fill-in select button 247.
When lowered, the fill-in control circuit 12 (Fig. 13)
Fill-in select switch 121 is on.
, the signal “1” is OR circuit OR121, OR12
Delay flip-flop DF121 through 2
added to. Daylay flip-flop DF1
The output of 21 is applied to AND circuit A125.
AND circuit A125 has a mode control signal on the other input.
Record processing generated from the formation circuit 2 (Fig. 3)
The logical signal RES is added via the OR circuit OR123.
and is operational. Therefore, Canada
The obtained day-lay flip-flop DF121
The output is output as is, OR circuit OR124,
Delay flip-flop DF122, OR circuit
Fill-in roll mode finger via OR126
It is sent out as a constant signal Fis. Signal sent from fill-in control circuit 12
Fis is the address of the mode control signal forming circuit 2 (Fig. 3).
is applied to the command circuit A24. AND circuit A24
indicates that other inputs are not in check mode
signal is applied and can work in this case
Then, the fill-in processing signal FILS is output.
This fill-in processing signal FILS is the pattern selection switch.
Sequence memo via circuit 6 (Figure 4)
Added to RAM7. If the button LOAD is pressed in this state, the above
The low signal is output from the mode control signal forming circuit 2 as follows.
A pulse signal LDP is output, and this signal LDP is
Therefore, sequence memory RAM7 is in writing state.
be made into Therefore, sequence memory RAM7
Fill-in or roll pattern specification information
F₀~F₂and fill-in processing signal FILS writes
rare and programmed. Also, the sequence is based on pressing the button LOAD.
After writing to memory RAM7, the above-mentioned
In this way, the mode control signal forming circuit 2 (Fig. 3)
Measure counter drive pulse signal CDP is output from
This signal CDP causes the bar counter 91 (No.
Figure 7) is increased by 1 step (1 count).
Ru. When programming a break pattern, first
Mode selection switch is activated by pressing the BREK button.
Switch 15 of circuit 1 (Fig. 3) is turned on,
Signal BRE is the mode control signal forming circuit 2 (Figure 3)
is added to the AND circuit A25. AND circuit A
25 has signals SEQ and REC added to other inputs.
The logical condition for this can be expressed as a logical formula. SEQ−REC−BRE becomes. Therefore, in this case, the AND circuit A25
The AND condition is satisfied, and a break occurs from the AND circuit A25.
The output processing signal BRCS is output. This break processing signal BRCS is the pattern selection switch.
Sequence memo via circuit 6 (Figure 4)
Added to RAM7. If the button LDAD is pressed in this state, the above-mentioned
The low signal is output from the mode control signal forming circuit 2 as follows.
A pulse signal LDP is output, and this signal LDP is
Therefore, sequence memory RAM7 is in the writing state.
Then, the break processing signal BRCS is written,
programmed. Also in this case, data to sequence memory RAM7 is
After writing, mode control signal forming circuit 2
Measure counter drive pulse signal CDP is output from
This signal causes the bar counter 91 to complete one step.
It gets pushed up. In addition, in this device, the break pattern is
It has the highest priority and the break processing signal BRCS is
Output from turn selection information selector 8
The pattern pulse selector is controlled by this signal BRCS.
Prohibiting the performance pattern output from the controller 16
Since the sequence memory is configured as
Writing break processing signal BRCS to RAM7
At the same time, rhythm selection information R₀~R₃,putter
Specification information RV₀, RV₁, or fill-in or
Roll pattern specification information F₀~F₂or filli
Even if the processing signal FILS is written, there is no support.
There are no obstacles. i.e. program a break pattern.
If you want to play rhythm, press the rhythm selection button group 244, pattern
button selection button group 245 and fill-in or
The buttons in the roll pattern designation button group 246 are pressed.
You can leave it down. In addition to the break pattern, you can also select the desired rhythm pattern.
If you program a turn, you can use the program described below.
In rhythm performance mode, one beat of the rhythm pattern is played.
After the rhythm is played based on the pattern information 2
The rhythm shifts to a break state from the beat.
become. Also, pattern memory ROM13 and pattern
In the memory RAM 14, fill-in pattern
and roll pattern is fill-in processing signal
It is configured so that it will not be read unless FILS is added.
When programming the main pattern,
Fill-in or roll pattern specification for
Buttons in button group 246 are problematic even if they are held down
There is no. By repeating any of the above operations,
Although it is to advance the program, the program
The step (number of measures) is determined by the measure counter 91 (7th
Signal Q output from₀~Q_FourIndicator based on
256 (FIG. 2). measure cow
Signal Q output from the printer 91₀~Q_Fouris adder 1
Tempo/measure/beat display times after adding "1" at 0
Binary/decimal conversion circuit 188 of path 18 (FIG. 11)
After being added to and converted to decimal, the multiplex circuit 1
89 to the A input of the selector 190.
Ru. In this case, the selector 190 is a mode control signal type
Record or check generated from configuration circuit 2
A input is selected by processing signal R+C.
The signal added to the A input above is expressed as a number.
Display unit 2 via light emitting diode driver 191
56, use the upper two digits of the display 256 to
Show the number of verses. In this case, record or chi
Signal T is generated by processing signal R+C.₃The timing of
enable the AND circuit A182 and display
Display of the lower 1 digit in the instrument 256 (corresponding to the number of beats)
It also prohibits the decimal point for the light emitting diode driver
The light emitting diode indicates the decimal point by disabling the
The lighting of the code 256a is prohibited. program
An example of the display on the display 256 in the mode is shown.
and as shown in Figure 12c. The program ends and the button END is pressed.
Then, the switch of mode selection switch circuit 1 (Fig. 3)
The switch 16 turns on and the signal is generated from the switch 16.
The signal is a signal whose rising edge is differentiated by the differentiating circuit 28.
END^*as mode control signal forming circuit 2 (third
(Figure) is added to the AND circuit A29. and times
Route A29 has signals SEQ and REC added to the other inputs.
The logical condition is expressed by a logical formula. SEQ-REC-END^* becomes. Therefore, at this time, the AND circuit A29 is
The AND condition is met and the end pulse signal ENP
Output. End pulse signal ENP is end controlled.
The latches 111 to 113 of the control circuit 11 (FIG. 7)
It is applied to the load control terminal L. By the way the end
The latches 111 to 113 of the control circuit 11 are as described above.
One depending on the street signal SEQ1 to SEQ3
Only the latch is operable. I want to
This latch is then connected to the end pulse signal ENP.
Count value Q of measure counter 91 at the time of lever₀~Q_Four
is loaded. Here, the measure counter 91 counts
The value is set by the mode control signal after the final program is finished.
Measure counter drive pattern generated from signal generation circuit 2
is stepped up by one step by the pulse signal CDP.
It shows the address next to the final address,
This value corresponds to the number of measures. i.e. end
The latches 111 to 113 of the control circuit 11 have a program
A value equal to the last number of bars loaded is read.
Ru. In addition, a program of 32 steps (32 measures) is
The bar counter 91 output signal Q_Fiveis “1”
Then this signal Q_Fiveis in addition to AND circuit A96
and enables the AND circuit A96, and
Then, the AND circuit A97 is disabled and the measure count is started.
91 is prohibited from advancing. Also, AND circuit A96
The output is output as a signal LAMP, and the lighting circuit
17 (Figure 10) Resetting the low frequency oscillator 174
is applied to terminal R via an inverter. low frequency
The wave oscillator 174 then starts operating. low
When the frequency oscillator 174 starts operating, the AND circuit
A171 repeats operation and non-operation, “1”,
Outputs a signal that repeats “0”, which causes the recorder to
The code display light emitting diode 242a has a dot reduction screen.
- The program pace is stored in the memory RAM7.
Let me know what's wrong. Also, the program for the 32nd step (32nd measure)
, the content Q of the measure counter 91_Five…Q₀teeth
“011111”, and the adder 10 is the measure counter 9.
0th bit Q of 1₀4th bit Q_Fourcontents of
Since “1” is added to “11111”, from adder 10
The value “00000” is output. This value is measure 32
It represents. By the way, Latch 111-113
stores the final measure number of the previous program.
and this value indicates measures smaller than 32 measures.
or 32 measures. However, it is
Memory contents of latches 111 to 113 and adder 10
A match signal is output from the comparator 114 which compares the output of
A=B or the output of the adder 10 is the latch 11
Signal indicating that it is larger than the memory contents of 1 to 113
A<B is output. Note that in the comparator 114
The value “00000” indicating the 32nd measure is “100000”.
be treated. Signal A output from comparator 114=
B or A<B is output via OR circuit OR95.
is added to the code circuit A114. AND circuit A11
4 is the mode control signal forming circuit 2 (third
The load pulse signal LDP output from
The 32nd step has been programmed.
When you press the LOAD button to
The condition holds true. The output of AND circuit A114 is
and through the lay flip-flop DF111.
It is added to circuits A111 to A113. and times
The other inputs of paths A111 to A113 each have a signal.
Numbers SEQ1 to SEQ3 have been added. I want to
AND circuits A111 to A113 are programmed.
For the address of sequence memory RAM7
The AND condition is satisfied only if the
The output of the circuit is connected to the reset terminal R of the corresponding latch.
added and reset its memory contents
(Set as “00000”). This reset value
“00000” represents the 32nd measure as mentioned above.
Ru. In other words, if you have programmed up to the 32nd step,
If the END button is pressed, the button will be automatically
The state will be the same as when you press the button END.
It is composed of In addition, in the above program modes, the beat counter
The pattern memory 41 (Fig. 5) does not operate and the pattern memory
ROM13 and pattern memory RAM14 have
Dynamic addressing signal TC₀~TC_Fouris not added
The performance pattern will not be read out (automatic performance is not performed).
). Next, we will explain about program modifications and additions.
do. Write to sequence memory RAM7
button operations when partially modifying a program.
The work is as follows. button FOWARD, button BACK or button
while operating RESET and looking at display 256.
Find the correction measure. Perform the same operations as when programming.
conduct. Press the FOWARD button on the panel section 24 (Figure 2).
When pressed, mode selection switch circuit 1 (Figure 3)
switch 11 is turned on, and the rising differential circuit 24
signal FOW^*is output. This signal FOW^*hamo
AND circuit of the code control signal forming circuit 2 (Fig. 3)
Added to A34. AND circuit A34 is
Signals SEQ and R+C are added to the input,
If we express the logical condition using a logical formula, SEQ-(R+C)-FOW^* becomes. Therefore, in this case, the AND circuit A34
The AND condition is satisfied and a signal "1" is output.
This signal is the OR circuit OR32, 2-bit time data.
Erase flip-flop DF21, OR circuit OR2
4 through bar counter drive pulse signal CDP and
is output, and the measure counter 91 (Fig. 7) is set to 1.
Step up. Also, if you press the BACK button, the mode selection screen will appear.
Switch 12 of switch circuit 1 (Figure 3) is on
Then, the signal BAC is output from the rising differentiation circuit 25.^*is output
This signal BAC^*is mode control signal forming circuit 2
(FIG. 3) is added to the AND circuit A36. a
The control circuit A36 inputs the signal, SEQ and
and R+C are added, and the logical conditions are discussed.
Shown in a scientific formula -SEQ-(R+C)-BAC^* becomes. Here, the signal is sent to the bar counter section 9 (7th
The measure counter is output from the OR circuit OR92 in the figure).
Each bit output Q of 91₀~Q_Fiveone of them
If it is “1”, it becomes “1” and the measure counter 91
Indicates that the count value of is not 0. Therefore this
In this case, the AND circuit A36 counts the bar counter 91.
The AND condition is true provided that the value is not 0.
and outputs a signal “1”. This signal is
output as physical pulse signal BCP. Also this
The signal BCP is passed through the OR circuit OR24 to measure the bar count.
output as a data drive pulse signal CDP. X
The clock processing pulse signal BCP is supplied to the bar counter section 9 (the
Up/down control of measure counter 91 in Figure 7)
is added to terminal U/D and downloads measure counter 91.
turn on state. Therefore, the measure counter 91 is small.
One step is controlled by the node counter drive pulse signal CDP.
Make it fall down. In addition, back processing pulse signal
The signal used as the BCP generation condition is the measure.
Step down when the count value of counter 91 is 0
Then, the counted value becomes strange and an inconvenience occurs.
This is because that. Also, the back processing pulse signal BCP is inverted,
The bar counter section 9 (Fig. 7) is used as a prohibition signal.
It was added to the second circuit A98, but this was later added to the
In the detailed program check mode, the final
This is to ensure step-down from the address.
be. Note that in this program mode, the button
The mode control signal type is
AND circuit A27 of component circuit 2 (Fig. 3) is inoperative.
The sequence processing signal SES is “0”.
Therefore, this signal BCP is not relevant. Also, if you press the button RESET, the mode selection switch will be displayed.
Switch 13 of switch circuit 1 (Figure 3) is on.
Then, the signal RESE is output from the rising differentiation circuit 26.^*is the output
be done. This signal RESE^*is mode control signal formation
The output is output via the AND circuit A33 of circuit 2 (Fig. 3).
Added to OR circuit OR22, OR circuit OR22
Then, a reset pulse signal REP is generated. This resource
The set pulse signal REP is sent to the measure counter section 9 (the
Measure counter via OR circuit OR93 in Figure 7)
91 reset terminal R, and the measure counter
Reset 91. In other words, when you press the FOWARD button, the measure number
The count value of the counter 91 increases by one step, and the button
Press the button BACK to count the measure counter 91.
The value is decreased by one step and the button RESET is pressed.
Then, the count value of the measure counter 91 is reset to the initial state.
Set. Therefore, for example, first the button
Press RESET and then press FOWARD button multiple times
Press the button twice and select the correction measure while looking at the display 256.
button if it exceeds the correction measure.
If you press BACK, the count value of bar counter 91 will be displayed.
can be set to the value corresponding to the modified measure. The count value of the measure counter 91 corresponds to the corrected measure.
If it is changed to
However, this operation is the same as when programming above.
It's like that. That is, the rhythm selection button group 244,
Pattern specification button group 245 or fill-in button
or roll pattern specification button group 246,
Inselect button 247 or button
Modified program by BREAK and button LOAD
RAM to a predetermined address in sequence memory RAM7.
write to After you finish writing the program,
The button operations when adding a program to
It becomes like this. button FOWARD, button BACK or button
while operating RESET and looking at display 256.
Set the measure number to the measure after the last measure of the program.
Ru. Operations similar to those during programming
I do. The operation of each circuit of the device during the above operation is
The operation is the same as when modifying the gram.
Ru. However, when modifying the program, the operation is in measures.
Correct the count value of counter 91 (Figure 7) to the modified measure.
when adding a program.
If so, set the count value of measure counter 91 to the program maximum.
The difference is that it corresponds to the measure following the last measure.
Ru. In other words, in operation, the button
FOWARD, button BACK or button RESET
By pressing down on the measure counter 91 as appropriate,
Step up or down the count value.
or reset the measure counter 91 count value.
set to correspond to the measure following the last measure of the program.
Set. Next, rhythm selection button group 244, pattern finger
Fixed button group 245 or fill in or roll
Pattern specification button group 246, fill-in select
by button 247 or button BREAK, etc.
Select the 1st step pattern of the additional program
Then press the LOAD button to output the mode control signal.
Load pulse signal from forming circuit 2 (Figure 3)
LDP is generated and this load pulse signal LDP
The information indicating the selected pattern is displayed in the sequence.
Next to the final address of the program in memory RAM7
is written to the address of Also, the load pulse signal
No. LDP is the AND circuit A1 of the end control circuit 11
Added to 14. By the way, at this time Latch 11
Stored in one corresponding latch from 1 to 113
The output value of adder 10 is larger than the value
Then, the signal A<B is output from the comparator 114.
The AND circuit A114 is now operational.
Ru. Therefore, the AND circuit A114 outputs a signal “1”.
This outputs the stored value of the corresponding latch.
will be reset. The following operations are exactly the same as during programming. Please note that the program, program modification or addition
When finished and press the button REC. again, the button
REC. returns, and the mode selection switch
Switch 18 of circuit 1 (Fig. 3) is turned off,
Signal (R+C) from falling differentiation circuit 31^*is output
It will be done. This signal (R+C)^*is mode control signal formation
The output is output via the AND circuit A32 of circuit 2 (Fig. 3).
Joins OR circuit OR22, and from OR circuit OR22
Generates reset pulse signal REP. However,
The measure counter 91 is then reset to its initial state.
Ru. Also, other programs in sequence memory RAM7
Press buttons SEQ1 to SEQ3 to write the program.
In other words, this change corresponds to the signal SEQ shown in Figure 7.
1, SEQ2 and SEQ3, and this signal SEQ1,
SEQ2 and SEQ3 are delayed flip-flop
DF91, DF92 and DF93 respectively
Exclude with signal delayed by 1 bit time
Inclusive order with each condition
It is detected by the circuits EX91 to EX93. stomach
Each output of exclusive OR circuit EX91 to EX93
The power is applied to the measure through OR circuits OR94 and OR93.
It is applied to the reset terminal R of the counter 91. did
When you press buttons SEQ1 to SEQ3,
The measure counter 91 is automatically reset and initialized.
It is configured to be in a state. Program check mode In program check mode, the program
The programmed pattern is generated repeatedly for each measure,
Check the program. Button operations in program check mode
becomes as follows. Press the button CHECK. Select one of the buttons SEQ1 to SEQ3.
Press Select. button FOWARD, button BACK or button
operate RESET, and the information displayed on display 256 is displayed.
Find the desired measure while checking the number of measures. Turn on the start switch 249. The button CHECK is pressed on the panel section 24 (Fig. 2).
When the mode selection switch circuit 1 is
switch 17 is turned on, which causes mode control.
Signal R generated from signal forming circuit 2 (Fig. 3)
+C becomes “1” and signal + becomes “0”.
Ru. The signal + is from the bar counter section 9 (Fig. 7).
Added to AND circuit A91, AND circuit A91
is disabled, and the signal R+C is output to the AND circuit A9.
7 and enables the AND circuit A97 to operate.
Ru. Also, switch 17 of mode selection switch circuit 1
When turned on, a pulse signal is sent from the rising differential circuit 29.
No. CHE^*is output and this signal CHE^*is mode based
AND circuit A30 of control signal forming circuit 2 (Fig. 3)
added to. AND circuit A30 receives signals from other inputs.
A signal that is an inversion of the No. REC is added,
Expressing the logical condition as a logical expression, −CHE^* becomes. Therefore, in this case, the AND circuit A30 is
The AND condition is met, and the OR circuit OR22 is passed.
and outputs the reset pulse signal REP. this
The measure counter 91 (Fig. 7) is returned to its initial state.
It will be reset. In addition, by pressing the selection of buttons SEQ1 to SEQ3
The address of sequence memory RAM7 is specified.
Ru. Then press the button FOWARD, BACK or
Operate RESET to select the desired measure (the measure you want to check).
section), but the operation at this time is the same as the one described above.
The operation is similar to the operation when modifying the gram.
Ru. However, in program check mode,
The count value of bar counter 91 is the final address of the program.
Check the step-down when specifying the dress.
Measures have been taken to ensure that i.e. measure cow
is inverted to the AND circuit A98 of the printer section 9 (Fig. 7).
The back processing pulse signal BCP added to
That's it. For example, this signal is applied to AND circuit A98.
is added, the bar counter 91
The count value specifies the final address of the program and
The signal A=B from the comparator 114 of the control circuit 11
If you press the BACK button when
Mode control by pressing button BACK
Measure counter drive pulse generated from signal forming circuit 2
The output of the OR circuit OR91 is
“1” and the button REC is not pressed again.
The signal generated from the Ikara mode control signal forming circuit 2
Since the signal processing signal SES is “1”, the
The AND condition of the AND circuit A98 is satisfied, and as a result,
Otherwise, the bar counter 91 will be reset. Two
To return to the address one address before the final address.
Even though I pressed the BACK button to
91 has the inconvenience of being reset to 0.
arise. However, if the back processing pulse signal BCP is inverted,
When added to the AND circuit A98, the
The operation of the code circuit A98 is prohibited and the above problem occurs.
do not have. Then turn on the start switch 249
Set the time signature in the same way as in the normal performance mode described above.
The beat counter 41 of the counter section 4 (Fig. 5) is activated.
Start making. However, the bar counter section 9 (7th
The AND circuit A91 in the figure) is inoperative as described above.
Therefore, the measure pulse is calculated from the beat counter section 4.
Measure counter 91 does not operate even if step Ci4 occurs.
stomach. In other words, the count value of the bar counter 91 is
The value set by Also, when the start switch 249 is turned on, the
Start/stop control circuit 5 (Fig. 5)
The system run signal RUN is generated. This rhythm run
The signal RUN is the mode control signal forming circuit 2 (Figure 3)
is added to the AND circuit A21. AND circuit A
21 has the signal SEQ, added to the other input.
and the logical condition is expressed as a logical formula, RUN・SEQ・ becomes. Therefore, in this case, the AND circuit A21
The AND condition is satisfied, and the
Outputs sequence memory selection signal SEQS. Na
The other input of the AND circuit A37 is a fill-in motor.
A signal that is an inversion of the signal FILS that becomes “1” when the
In this case, AND circuit A37 is added.
is operational. The pattern selection information selector 8 (Fig. 4)
Sequence from control signal forming circuit 2 (Figure 3)
When the memory selection signal SEQS is output, it is added to the B input.
information (read from sequence memory RAM7)
information). However, sequence memo
Break processing signal BRCS is read from RAM7.
When the signal BRCS is
It is enabled to operate by the memory selection signal SEQS.
Ru. Delay flip via AND circuit A81
Added to flop DF81, this day lay free
The output of flip-flop DF81 is AND circuit A82
The output of the AND circuit A81 and the AND condition are determined by
The items are taken and output. Daylay flip here
The flop DF81 has a beat counter as a driving pulse.
Pulse pulse Ci2 generated from the printer unit 4 (Fig. 5)
is added and the added break processing signal
Delays BRCS by one beat. Therefore, the blur
The output processing signal BRCS is the pattern selection information selector
8, it is prohibited only during the first beat, and during this time, the block is prohibited.
The rake processing signal BRCS is not generated. this is musical
A break pattern is selected for processing based on the request.
If the break occurs only on the first beat (playing pattern
(prohibition of turn output)
Ru. Signal TC output from beat counter 41₀~
T.C._Fourand the signal output from the bar counter 91
Q₀pattern memo as a dynamic addressing signal
to ROM13 and pattern memory RAM14.
Added. However, as mentioned above, measure counter 9
1 has a fixed count value, so the signal Q₀teeth
Either “1” or “0”, Q₀is “1”
When , it indicates an odd numbered measure, and when it is “0” it indicates an even numbered measure.
Was. This allows the pattern memory ROM13 and
One measure of performance is stored in turn memory (RAM) 14.
The playing pattern is read out repeatedly. At this time, the lighting circuit 17 (Fig. 10) is
Sequence selected by turn selection information selector 8
Pattern selection information R from memory RAM7₀~
R₃, RV₀, RV₁,F₀~F₂, FILS and beat cow
The signal TEMP generated from the printer section 4 is added.
ing. Therefore, program the measure to be checked.
Lambed pattern selection information R₀~R₃, RV₀，
RV₁,F₀~F₂light emitting diode 244 corresponding to
a~244p, 245a~245d, 246a~
246f lights up. Also a light emitting diode for tempo display.
Ord 257 blinks in synchronization with bar pulse Ci4
Ru. In addition, the tempo/measure/beat display circuit 18 (11th
), the selector 190 is the mode control signal forming circuit.
A input side by the signal R+C generated from path 2.
is selected, and AND circuit A is selected by signal R+C.
182 is enabled and the first digit is displayed (beat display).
(corresponding to) and the OR circuit OR182
Light emitting diode driver for decimal point by output of
192 is disabled and decimal point light emitting diode 2
56a lighting is prohibited. Therefore, the indicator
256 only displays the number of measures being checked.
It will be done. Program play mode In program play mode, the sequence menu
The pattern progression programmed in Mori RAM7
Therefore, automatic performance is repeatedly performed. The button operations in program play mode are as follows.
become that way. Press one of the buttons SEQ1 to SEQ3
Ru. Synchro start switch 250 or starter
Turn on the power switch 249. On the panel section 24 (Fig. 2), press the button SEQ1~
Mode control signal when any of SEQ3 is pressed
Signals SEQ1 to SEQ3 from the formation circuit 2 (Figure 3)
is output, which allows the sequence memory
Static address (storage area) of RAM7 (Figure 4)
is specified. Next, synchro start switch 250 or
Key presses are synchronized when the start switch 249 is turned on.
or asynchronous start/stop control circuit 5
The rhythm running signal RUN is generated from (Fig. 5),
This allows the beat counter section 4 (Fig. 4) to read the measure.
Pulse Ci4 is generated and the measure counter section 9 (Fig. 7)
The measure counter 91 of is driven. The above operation is before
This is exactly the same as in the normal performance mode described above.
Output from the measure counter 91 of the measure counter section 9
signal Q₀~Q_Fouris sequence memory RAM7 (No.
Figure 9) is added to the sequence memory RAM7.
This is a dynamic addressing signal. From the start/stop control circuit 5 (Fig. 5)
Mode control when rhythm running signal RUN is generated
AND circuit A37 of signal forming circuit 2 (Fig. 3)
The sequence memory selection signal SEQS is generated via
It will be done. This sequence memory selection signal SEQS is
It is added to the turn selection information selector 8 and added to the B input.
information (read from sequence memory RAM7)
information). Therefore, pattern selection
From the selection information selector 8, the sequence memory RAM
Pattern selection information read out for each measure from 7
R₀~R₃, RV₀, RV₁,F₀~F₂, FILS, ROM/
RAM and BRCS are output. Blur from memory 7
If the output processing signal BRCS is output, this signal
BRCS is the AND circuit A81, A as mentioned above.
82 and flip-flop DF81.
It is sent out from the selector 8 with a delay of one beat. child
Therefore, in rhythm performance, performance for one beat is allowed.
After that, it is prohibited from the second beat and goes into a break state.
Ru. Measure counter 9 of measure counter section 9 (Fig. 7)
1 is the measure pulse output from the beat counter section 4
Count Ci4 and add "1" to the counted value
The output value of the device 10 is sent to the end control circuit 11 (Fig. 7).
The latches 111 to 113 are added to the comparator 114 of
The final bar number of the program stored in
Ru. Here, the enable end of latches 111-113
Signals SEQ1 to SEQ3 are added to child E.
Therefore, only latches that support addressing can be operated.
, and this latch is operable.
is compared with the stored value. Therefore, the count value of the bar counter 91 is
The value corresponding to the final address of the RAM (program's
Compare when the value is 1 less than the final measure number)
The signal A=B is output from the device 114. this signal
A=B is the AND turn of the bar counter section 9 (Figure 7)
added to road A98. AND circuit A98 is other
The mode control signal forming circuit 2 (Fig. 3) is connected to the input.
The generated sequence processing signal SES, back processing signal
Signal that is the inversion of the pulse signal BCP and OR circuit OR
91 outputs are added, in this case an OR circuit
When the output of OR91 becomes “1” (next measure
When pulse Ci4 occurs) the AND condition is met
Then, the signal “1” is sent to the delay flip-flop DF.
94, measure counter 9 via OR circuit OR93
In addition to the reset terminal R of 1, the bar counter 91 is
Reset. As a result, the measure counter 91 starts counting from 0 again.
Start. FIG. 8 shows the final version of the program in the end control circuit 11.
If 12 is stored as the number of ending measures in decimal
Timing check the operation of the bar counter 91 in
It is shown in yats. That is, the measure cow
The count value of the printer 91 is calculated before running the rhythm (RUN=0
and the signal STOP=1), the signal STOP and
AND circuit A93 that takes the AND condition of signal +
All bits “1” are low by the output of (Figure 7).
and the rhythm running signal RUN is “1”.
Then, the measure pulse generated from the beat counter section 4
Start counting of Ci4, and count value Q_Four…
Q₀End control that becomes “01011” (11 in decimal)
The signal A=B is output from the comparator 114 of the circuit 11.
After this, the 11th measure starts according to the next measure pulse Ci4.
At the end of the 12th measure (beginning of the 12th measure), the measure counter 91 is counted.
The numbers will be reset and counting will start again from 0.
Repeat this. In other words, sequence memory RAM7 is a measure counter.
The address is repeatedly specified by the printer 91. The following operations are exactly the same as in normal performance mode.
It is. In other words, the pattern memory ROM13,
The turn memory RAM 14 is a pattern selection information selector.
Pattern selection information R output from Kuta 8₀~R₃，
RV₀, RV₁,F₀~F₂, FILS, and time signature counter
Signal TC output from data section 4₀~TC_Fourand measures
Signal Q output from counter section 9₀the address
Read out a predetermined performance pattern as a specified signal and use this
This is selected as appropriate by the pattern pulse selector 16.
Select the musical tone forming circuit 20 and the rhythm sound source circuit 2.
In addition to 1, accompanist (bass sound, chord sound, arpeggi)
It forms rhythm sounds and performs automatic performance.
In addition, the lighting circuit 17 is connected to the pattern selection information selector 1.
The output corresponding to the pattern selection information output from 8.
Photodiodes 244a-244p, 245a-2
45d, 246a to 246f are lit and the clock is on.
based on the tempo signal TEMP generated from the printer section 4.
Flashing the light emitting diode 257 for displaying the tempo.
let In addition, the tempo/measure/beat display circuit 18 displays the time signature.
Signal TC output from counter section 4₀~TC_FourOyo
Signal Q output from bar counter section 9₀~Q_Four
Signal Q with "1" added to₀′〜Q_Four′ based on the number of measures
and beat count, and adjust the tempo if necessary.
Display numerical values. Pattern memory write mode In the above explanation, the pattern memory RAM 14 is
The predetermined performance pattern has already been written.
Although it was explained as a pattern memory RAM1
The write operation in step 4 is the pattern memory write shown below.
This is done in embedded mode. Pattern setting in pattern writing mode
The performance pattern set in the switch matrix circuit 15
The turn is written to the pattern memory RAM14.
Ru. Button operations in pattern writing mode
It will look like this: Press the switch matrix selection button 252
do. One button in the rhythm selection button group 244
Among the button and pattern specification button group 245
Press one button or fill in
Or roll pattern specification button group 246
Press one button to select fill-in
button 247 is pressed. Press the write button 253. Turn on the start switch 249. Switch matrix in panel section 24 (Fig. 2)
Switch matrix for pressing selection button 252
The selection switch 165 (Fig. 9) is turned on and the
Rectors 163 and 164 are the signals applied to the B input.
(From the pattern setting switch matrix circuit 15
output signal). In addition, the mode control signal forming circuit 2 (Fig. 3)
Therefore, AND circuit A21 is inactive.
Then, the sequence memory selection signal SEQS is “0”.
Yes, the pattern selection information selector 8 (Fig. 4)
Signal applied to A input (pattern selection switch circuit
6). One button in the rhythm selection button group 244
button and pattern specification button group 245.
Press two buttons or fill in or
One of the roll pattern specification button group 246
button and fill-in select button 247
When you press , pattern selection switch circuit 6 responds.
The switch is turned on and the pattern selection information R₀~R₃，
RV₀, RV₁,F₀~F_Five, FILS is generated. this
The pattern selection information is provided by the pattern selection information selector 8.
is added to the pattern memory RAM 14 via
Specify the address for writing the performance pattern. Also, when the write button 253 is pressed, the
Tsuchi 141 (Figure 9) is turned on and the pattern memo is
The re-RAM 14 enters a write state. Then the start switch 249 is turned on.
and from the start/stop control circuit 5 (Fig. 5).
Rhythm running signal RUN is generated and beat counter section 4
The beat counter 41 (FIG. 5) starts operating,
Bar pulse Ci4 generated from the beat counter section 4
The measure counter section 9 (Fig. 7)
The printer 91 is driven. Note that the measure counter 91 is
Before the rhythm running signal RUN is generated, an AND circuit is activated.
All bits are loaded with “1” by the output of A93.
Since the rhythm running signal RUN is generated and
All bits are controlled by the bar pulse Ci4 that occurs at the same time.
The count becomes "0" and counting starts from the first bar. Signal TC generated from beat counter section 4₀~
T.C._Fourand the signal generated from the bar counter section 9
Q₀is a dynamic AND specified signal as a pattern memory
RAM14 and pattern setting switch matrix
is added to the pattern setting switch circuit 15.
2 measures of set performance pattern from Trix circuit 15
Read in units and use this as the pattern pulse selector
16 (FIG. 9) through selectors 163 and 164.
In addition to the pattern memory RAM14,
Write to address. Furthermore, the pattern setting matrix
The switch circuit 15 is similar to the pattern memory RAM 14.
It consists of an address structure and the contents of each address are
A switch configured to be configured by
Consists of a matrix circuit to create the desired performance pattern.
This is set in advance using the above switch. Fill-in roll performance mode Fill-in-roll performance mode is the same as normal performance mode.
mode or program play mode.
fill-in pattern or row before or after execution.
Insert a fill-in pattern or a fill-in pattern.
Operation mode for automatic performance based on roll patterns.
It is de. First, play in normal play mode or program play mode.
fill-in pattern or roll pattern while running the command.
Regarding fill-in mode while driving to insert a turn.
I will explain. Fill-in mode while driving can be used in normal performance mode or
is the file input during program play mode.
Press the select button 247 or press the
Press the input switch select button 255.
Turning on the foot switch FS with the
This is done by At this time, fill in
or roll pattern designation button group 246.
The button is pre-pressed and filled in or out.
The pattern is specified in advance. Normal play mode or program play mode
File input switch select button in line
255 or press the file input switch.
While pressing the select button 255,
When the toswitch FS is turned on, the fill-in control
The signal is sent from the OR circuit OR121 of circuit 12 (Figure 13).
The number "1" is output. In addition, in Figure 13,
Itsuchi 121 is fill-in select as mentioned above.
It corresponds to button 247 and is also a switch.
122 is the file input switch select button
This corresponds to section 255. Signal “1” output from OR circuit OR121
is a delay flip via OR circuit OR122
Added to flop DF121. By the way, Tay
The output of the lay flip-flop DF121 is AND
Form a feedback loop via circuits A122 and A121
The other input of the AND circuit A122 has a time signature.
The measure pulse Ci4 generated from the counter section 4 and the beat pattern
OR circuit OR12 with OR condition with Ruth Ci2
A signal obtained by inverting the output of 5 is added, and the AND circuit
The other input of A121 is a mode control signal forming circuit.
Inverts the record processing signal RES generated from 2.
A signal has been added. In this case the signal RES
is “0”, so AND circuit A121 can operate.
Day-ray flip-flop DF
The signal “1” added to 121 is the next bar pulse
Ci4 is self-maintained until the pulse pulse Ci2 comes.
In addition, the output of the delay flip-flop DF121
The power is passed through the AND circuit A123 to the OR circuit OR1.
26, but in this case normal performance mode
or the program play mode is in progress.
The rhythm applied from the start/stop control circuit 5
The running signal RUN is “1” and the AND circuit A1
23 is inactive. Therefore in this case
No fill-in signal Fis is generated yet. Measure pulse Ci4 or beat from beat counter section 4
When pulse Ci2 occurs, this signal is sent to OR circuit OR1
25, AND circuit A1 via OR circuit A123
25, and the AND circuit A125 can be operated.
shall be. This allows the delay flip-flop
Signal stored in loop via DF121
“1” is AND circuit A125, OR circuit OR12
Delay flip-flop DF122 through 4
added to. Also, the output of the OR circuit OR125
AND circuit A122 remains stationary due to the inverted signal.
Delay flip-flop DF12
The memory of the loop through 1 is cleared. The day-lay flip-flop DF122 is its origin.
The power is returned to the input via AND circuit A126.
It forms a loop, and other than AND circuit A126
The input is a signal record that is an inversion of bar pulse Ci4.
Signal and rhythm run that are the inverted version of the processed signal RES
A row signal RUN has been added. Therefore day
Ray flip-flop DF122 is the next bar pulse
Self-maintains the applied signal “1” until the switch Ci4 comes.
hold Daylay flip-flop DF122
Output is OR circuit OR12 as fill-in signal Fis
6. Timing the operation of the fill-in control circuit 12
When shown in Guchiyat, it becomes as shown in Figure 14. sand
That is, as shown in FIG.
Press the rect button 247 or
Press the foot switch select button 255.
If you turn on the foot switch FS while the
Rise at beat pulse Ci2, fall at measure pulse Ci4
A fill-in signal Fis that remains “1” for one beat is obtained.
and press the fill-in select button 2 again at point Q.
Press 47 or fill in the
While pressing the select button 255,
When the switch FS is turned on, the next bar pulse Ci4
A fill-in signal that rises at “1” and remains “1” for one measure.
The number Fis′ is obtained. The file output from the fill-in control circuit 12
The in signal Fis is the mode control signal forming circuit 2 (third
), and enable AND circuit A24.
and generates the fill-in processing signal FILS. child
The fill-in processing signal FILS is the pattern selection switch.
Pattern selection information is transmitted via the Tsuchi circuit 6 (Fig. 4).
Added to the A input side of selector 84 of selector 8
Ru. Also, the mode control signal forming circuit 2 (Fig. 3)
The output of the AND circuit A24 is inverted and output to the AND circuit A24.
37 and disables AND circuit A37.
The sequence generated via the AND circuit A37
force the memory selection signal SEQS to “0”.
Ru. In other words, in normal performance mode, the sequence
Since the memory selection signal SEQS is “0”, the
Sequence memo even if ruin processing signal FILS occurs
The reselection signal SEQS remains “0”, but the
In gram performance mode, sequence memory selection
The selection signal SEQS is “1” and the fill-in processing is
When the physical signal FILS occurs, this sequence memory selection is
Forcibly set the selection signal SEQS to “0” and select the pattern.
Set the selection information selector 8 to the A input side (rhythm selection switch
output from circuit 6).
Ru. This allows the fill-in processing signal FILS to be applied to the putter.
pattern memory ROM13 and pattern memory RAM
14 and fill in the read address.
or change to the address corresponding to the role pattern
do. Pattern memory ROM13 and pattern memo
By changing this address, the re-RAM14 will be
Read out the in-pattern or roll pattern,
This is then sent to the pattern pulse selector 16 to produce a musical tone.
In addition to the formation circuit 20 and the rhythm sound source circuit 21,
Changing automatic accompaniment sounds and rhythm sounds (drums)
Solo-based musical sounds or repeated hits of the snare drum
Changes to musical tones consisting of or corresponding musical tones.
). Note that the fill-in control circuit 12
When the Ruin signal Fis becomes “0”, the mode control signal
Fill-in processing arising from forming circuit 2 (Figure 3)
The signal FILS becomes “0” and returns to the original state (normal
Return to regular play mode or sequence play mode
). In addition, in fill-in roll performance mode,
Lighting circuit 17 by fill-in processing signal FILS
The decoder 172 (Fig. 10) becomes inoperable and the
Then the decoder 173 becomes operational, so putter
The light emitting diode corresponding to the button designation button group 245
One of 245a-245d is off and the screen is off.
Ruin or roll pattern specification button group 246
of the corresponding light emitting diodes 246a to 246f.
One of them lights up. Next, play in normal play mode or program play mode.
fill-in pattern or role immediately before executing the command.
Intro file in mode when inserting a pattern
I will explain about it. Intro file in mode is normal performance mode.
file before the line or before executing the program play mode.
Press the inselect button 247 or
Press the input switch select button 255.
Turn on foot switch FS while pressed
This is done by Press the fill-in select button 247
or file input switch select button
Turn on the foot switch FS while pressing 255.
When turned on, the signal “1” is output from the OR circuit OR121.
This signal “1” is output from the OR circuit OR122.
to the day-lay flip-flop DF121 via
is added through AND circuits A122 and A121.
self-maintained. Also, the output of OR circuit OR121
The force is applied to AND circuit A124. and times
Other inputs on road A124 have a start/stop system.
Stop signal generated from control circuit 5 (Figure 5)
STOP has been added. In this case, the rhythm is still
Since it is before driving, the stop signal STOP is “1”.
Yes, this allows AND circuit A124 to operate.
becomes. The output of the AND circuit A124 is a flip-flop.
added to flip-flop 123 and flip-flop 12
3 and generates the signal COTP. This belief
No. COTD is inverted and measures counter part 9 (Figure 7)
is added to the AND circuit A92, and the AND circuit A9
2 becomes inoperable. Then the start switch 249 is turned on.
and normal play mode or program play mode.
Start/stop control circuit 5 in the same way as in case
The rhythm running signal RUN is output from (Fig. 5),
Also, the beat counter of the beat counter section 4 (Fig. 5)
41 starts the operation and generates the rhythm running signal RUN.
Beat pulse Ci2 and bar pulse Ci4 in synchronization with live music
occurs. However, measure counter section 9 (Fig. 7)
The AND circuit A92 is made inactive as described above.
The measure counter 91 starts operating.
No (all bits remain loaded to “1”)
). Generated from the start/stop control circuit 5
Rhythm running signal RUN is a delay flip-flop
Flip-flop after being delayed by DF123
It is applied to the reset terminal R of 123. I want to
After a predetermined time delay from the generation of the rhythm running signal RUN.
Flip-flop 123 is reset and the signal
Set COTD to “0” and unset bar counter section 9.
The code circuit A92 is enabled to operate. Rhythm running signal RUN from measure counter section 4
Pulse pulse Ci2 and small pulses generated synchronously with
The node pulse Ci4 is output via the OR circuit OR125.
enable the decode circuit A125, thereby enabling the decode circuit A125.
Held by the erase flip-flop DF121
The signal “1” that was present is sent to the delay flip-flop DF.
Move to 122. Daylay flip-flop DF1
22 transmits this signal “1” to the next bar pulse Ci4.
hold until the delay flip-flop DF1
OR circuit OR the fill-in signal Fis from the output of 22
126. Fill-in based on this fill-in signal Fis
The behavior that generates the pattern or roll pattern is
This is the same as the fill-in mode while driving described above.
be. Second bar pulse Ci4 from beat counter section 4
occurs, the delay flip-flop DF1
The signal held in 22 is cleared and the filter
The in signal Fis becomes "0". Also as mentioned above
The flip-flop 123 is a rhythm running signal.
The measure is reset by a delayed RUN signal.
The AND circuit A92 of the counter section 9 (Fig. 7) is
Since the bar counter 91 is enabled to operate
This will switch you to normal performance mode from the first measure.
mode or program play mode is started. i.e. normal play mode or program play
fill-in pattern or roll just before mode
A pattern is inserted and generated, normally played or programmed.
fill-in pattern or roll before playing the ram
A performance is performed based on the pattern. This intro file-in mode operation can be timed.
When shown in ngchart, it becomes as shown in Figure 15. Time
Fill-in select switch 247 is pressed at point R.
or file input switch select
The foot switch 255 is pressed down.
Turn on the Tsuchi FS and turn on the start switch at point S.
249 is turned on, fill-in signal Fis
is the timing when the start switch 249 is pressed
It rises in sync with the sound, and goes to “0” after one measure has elapsed.
Become. This switch signal Fis is “1”.
The performance is based on the pattern or roll pattern.
This is an introductory fill-in mode in which the
normal play mode or program play mode.
is started. Note that the fill-in control circuit 12 shown in FIG.
In the above, the AND circuit A123 is
fill-in pattern or role specified by
Light emitting diodes 246a-246 showing patterns
It functions to turn on f. i.e. Dayleif
Signal “1” is read into lip-flop DF121
AND circuit A12 before the rhythm run
3 becomes operational and the signal “1” is OR circuit OR1
In addition to 26, fill in from OR circuit OR126
Generate signal Fis. This allows the mode control signal
Generate fill-in processing signal FILS from generation circuit 2
and pattern this fill-in processing signal FILS
Selection switch circuit 6, pattern selection information selector
In addition to the lighting circuit 17 (Fig. 10) via
Emit light by enabling coder 173
A designated one of the diodes 246a to 246f
The light emitting diode corresponding to the pattern is turned on.
Ru. As explained above, according to this invention, the pattern
Since the progression can be programmed arbitrarily,
Automatically plays constantly changing rhythm and accompaniment sounds.
can play. In addition, the sequence memory contains rhythm patterns and
Both the break information is memorized and the break information is
When reading information, play one beat of the rhythm pattern.
Now it will enter the break state from the second beat after
Therefore, the rhythm pattern and the
You can play by pre-programming the breaks and
The inside is musically pleasing without the need for special operations.
Automatically enters a break state (emphasized at the beginning of a measure)
can be moved to. In addition, program check mode is specified.
If so, select the desired performance section and program it.
The content of the program can be listened to repeatedly.
It has the advantage of making it easy to check the ram, and it is also easy to select.
If you set it to display the performance section that has been played, it will be easier.
It is even more convenient because you can check the performance section that is being played.
Ru. Furthermore, a performance with a rhythm pattern programmed is also available.
Store end information corresponding to the number of play sections,
Detect and specify the end of the performance based on this end information
Return the address to the address at the start of reading.
Therefore, the rhythm pattern can be progressed for any number of performance sections.
Program a line and have it play repeatedly
You can play the same rhythm pattern over and over again.
This saves the trouble of programming and allows sequence programming.
It also has the effect of reducing memory capacity.

[Brief explanation of drawings]

FIG. 1 is a schematic block diagram showing an embodiment of the automatic performance device of the present invention, FIG. 2 is a schematic diagram showing an example of the arrangement of various control buttons, etc. in the same embodiment, and FIG. 3 is a diagram showing a mode selection switch in the same embodiment. FIG. 4 is a circuit diagram showing details of the circuit and mode control signal forming circuit, FIG. 4 is a circuit diagram showing details of the pattern selection switch circuit, sequence memory and pattern selection information selector in the same embodiment, and FIG. 5 is a circuit diagram showing details of the pattern selection switch circuit, sequence memory and pattern selection information selector in the same embodiment. A circuit diagram showing the details of the counter section and the start/stop control circuit, FIG. 6 is a timing chart for explaining the operation of the circuit of FIG. 5, and FIG. 7 is a bar counter section in the same embodiment.
A circuit diagram showing details of an adder and an end control circuit, FIG. 8 is a timing chart for explaining the operation of the circuit in FIG. 7, and FIG. 9 is a circuit diagram showing details of a pattern pulse selector in the same embodiment.
FIG. 10 is a block diagram showing details of the lighting circuit in the same embodiment, and FIG. 11 is a block diagram showing details of the tempo, measure, and beat display circuit in the same embodiment.
FIG. 12 is a schematic diagram showing an example of display by a display device,
FIG. 3 is a circuit diagram showing details of the fill-in control circuit in the same embodiment, and FIGS. 14 and 15 are timing charts for explaining the operation of the circuit shown in FIG. 13. DESCRIPTION OF SYMBOLS 1...Mode selection switch circuit, 2...Mode control signal forming circuit, 3...Tempo oscillator, 4...Beat counter section, 5...Start/stop control circuit, 6...
pattern selection switch circuit, 7... sequence memory RAM, 8... pattern selection information selector, 9...
Measure counter unit, 10... Adder, 11... End control circuit, 12... Fill-in control circuit, 13... Pattern memory ROM, 14... Pattern memory RAM,
15...Pattern setting switch matrix circuit, 1
6... Pattern pulse selector, 17... Lighting circuit,
18...Tempo, measure, beat display circuit, 19...Keyboard section, 20...Musical tone forming circuit, 21...Rhythm sound source circuit, 24...Panel section.

Claims (1)

[Scope of Claims] 1 (a) A first storage means storing a plurality of mutually different rhythm patterns with respect to the rhythm to be played, wherein each rhythm pattern represents the performance content of a certain section in the progression of the rhythm. (b) a second storage means 7 having a plurality of storage areas each corresponding to a sequential performance section whose section length is equal to the certain section; (c) a break section 13 or 14; (d) programming means for programming a rhythm pattern to be used for the sequential performance sections, the program means for programming a rhythm pattern to be used for each of the plurality of performance sections; When the selected rhythm pattern is selected, pattern designation information specifying the selected rhythm pattern is written in the storage area corresponding to the performance section in the second storage means, while the break instruction means causes a break in accordance with the selection of the rhythm pattern. 1, which writes break information in the same storage area where pattern designation information regarding the rhythm pattern is written when instructed to do so;
(e) means 3 for generating a tempo clock signal; (f) signal generating means 4 for generating a timing signal synchronized with the beginning of each performance section based on the tempo clock signal; (g) ) reading means 9 for sequentially reading stored information from said second storage means by sequentially addressing said plurality of storage areas based on a timing signal from said signal generating means; (h) said second storage means; Each time pattern designation information is read out from the storage means, a rhythm pattern designated by the pattern designation information is read out from the first storage means in accordance with the tempo clock signal, thereby generating a rhythm sound signal in accordance with the rhythm pattern. (i) Rhythm sound generating means 4, 5, 21 for generating rhythm sound generation means 4, 5, 21; (i) in response to the break information being read from the second storage means; control means A8 for controlling the rhythm sound generating means so as to permit the generation of rhythm sounds for a period of one beat from , and then prohibit the generation of rhythm sounds from the second beat onwards in the performance section;
An automatic performance device equipped with 1, A82, DF81, and 164. 2 (a) A first storage means that stores a plurality of rhythm patterns that are different from each other regarding the rhythm to be played, and each rhythm pattern represents the performance content of a certain section in the progression of the rhythm 13 or 14; (b) a second storage means 7 having a plurality of storage areas each corresponding to a sequential performance section, each of which has a section length equal to the certain section; a programming means for programming a rhythm pattern to be selected, the program means selecting any one of the plurality of rhythm patterns for each performance section, and transmitting pattern designation information for designating a rhythm pattern related to the selection to the second rhythm pattern; 1, 2, which is written in the storage area corresponding to the performance section in the storage means of
(d) mode designation means for designating a program check mode; and (e) address change operation means for performing an address change operation to select a desired performance section, the address change operation means responding to the address change operation. (f) means 3 for generating a tempo clock signal; (g) a signal generator for generating a timing signal synchronized with the beginning of each performance section based on the tempo clock signal; means 4; (h) in a state where the program check mode is designated, a storage area corresponding to a selected performance section is addressed in response to an address change control signal from the address change operation means, and data is read from the storage area; While reading the pattern designation information, the plurality of storage areas are sequentially addressed based on the timing signal from the signal generating means in a state where the program check mode is not designated, thereby sequentially generating patterns from the plurality of storage areas. reading means 9 for reading out designation information; (i) when the pattern designation information is read out from the second storage means in the state where the program check mode is designated, the rhythm pattern designated by the pattern designation information is read out from the rhythm pattern; A rhythm sound signal is generated repeatedly according to the rhythm pattern by repeatedly reading data from the first storage means according to the tempo clock signal, and when the program check mode is not specified, the second storage means Each time pattern designation information is read from the means, a rhythm pattern designated by the pattern designation information is read from the first storage means in accordance with the tempo clock signal, thereby generating a rhythm sound signal in accordance with the rhythm pattern. Rhythm sound generating means 4, 5, 2
An automatic performance device equipped with 1. 3. The automatic performance apparatus according to claim 2, wherein said readout means includes display means 18 for displaying a selected performance section when said program check mode is designated. 4 (a) A first storage means that stores a plurality of rhythm patterns different from each other regarding the rhythm to be played, each rhythm pattern representing the performance content of a certain section in the progression of the rhythm 13 or 14; (b) a second storage means 7 having a plurality of storage areas each corresponding to a sequential performance section, each of which has a section length equal to the certain section; a programming means for programming a rhythm pattern to be selected, the program means selecting any one of the plurality of rhythm patterns for each performance section, and transmitting pattern designation information for designating a rhythm pattern related to the selection to the second rhythm pattern; 1, 2, which is written in the storage area corresponding to the performance section in the storage means of
(d) an end instruction means for instructing the end of the program; and (e) an end state corresponding to the number of performance sections programmed by the programming means in response to the end instruction from the end instruction means. (f) means 3 for generating a tempo clock signal; (g) a timing signal synchronized with the beginning of each performance section based on the tempo clock signal; (h) sequentially reading pattern designation information from the second storage means by sequentially addressing the plurality of storage areas based on the timing signal from the signal generation means; reading means 9; (i) each time the pattern designation information is read from the second storage means, reading out a rhythm pattern specified by the pattern designation information from the first storage means in accordance with the tempo clock signal; (j) rhythm sound generation means 4, 5, 21 for generating rhythm sound signals in accordance with the rhythm pattern; based on the number of programmed performance sections, and at the end of the detected performance section, the specified address is read by the reading means in synchronization with the timing signal from the signal generating means. an automatic performance device comprising: termination control means 11 for controlling the reading means to return the address to the address at the start of successive playback.