JPH0139225B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device having three or more regions of alternately different conductivity types.

FIGS. 1 to 4 are process diagrams showing a conventional method for manufacturing a planar thyristor, and the manufacturing process will be explained below. N-type Si semiconductor substrate 1 in Figure 1
After forming an oxide film 2 on the surface of the oxide film 2, a part of the oxide film 2 is opened using a photolithography method, and P-type impurity boron B is thermally diffused through the opening to form an isolation diffusion region 3.
form. Next, using photolithography, the oxide film 2 on one surface of the semiconductor substrate 1 surrounded by the isolation diffusion region 3 is selectively removed to form the first opening 21, and the After the oxide film 2 on the opposite surface is completely removed, B is thermally diffused to form a P type base region 4 and a P type emitter region 5 as shown in FIG. In this case, the surface impurity concentration of regions 4 and 5 depends on the purpose of use of the thyristor.
10 ¹⁶ to 10 ¹⁸ pieces/ ^cm3 . Next, a part of the oxide film 2 formed in the first opening when forming the regions 4 and 5 is removed to form the opening 22, and after removing the oxide film 2 on the back surface of the semiconductor substrate 1, the surface B is thermally diffused to an impurity concentration of about 10 ¹⁸ to ^{10 20} pieces/cm ³ ,
As shown in FIG. 3, a high concentration boron diffusion region 7 is formed in the P type base region 4 and the P type emitter region 5. This is done for the purpose of improving the ohmic contact with electrodes (not shown) connected to the P-type base region 4 and the P-type emitter region 5 and the stability of the surface of the P-type region. lastly,
After opening a part of the oxide film 2 formed in the first opening on the region surrounded by the high concentration boron diffusion region 7 using photolithography, a surface impurity concentration of 10 ¹⁹ is formed through this opening. Phosphorus P is thermally diffused to about ¹⁰²⁰ particles/cm ³ to form an n-type emitter region 6, as shown in FIG. This thermal diffusion process deepens the high concentration boron diffusion region 7. This completes the diffusion process for the planar thyristor, and processes such as electrode formation are then performed.

However, the conventional diffusion process for planar thyristors requires four photolithographic processes that require careful work, which increases costs due to the large number of steps, and also has the disadvantage that the relative positions of the openings in different processes tend to shift. It was hot.

The present invention was made in order to eliminate the drawbacks of the conventional method as described above, and includes forming an insulating film having a first opening on a semiconductor substrate of a first conductivity type, and insulating film through the first opening. After forming a first region of a second conductivity type, a first region of a first conductivity type is formed in the first region through a second opening of an insulating film formed in the first opening. After that, without performing photolithography, the first opening is reproduced by etching so that only the insulating film formed within the first opening is removed. By forming the third region of the second conductivity type, which has a higher surface impurity concentration than the first region, through the first opening, the photolithography process can be omitted once, and the third region can be omitted once. Since the third region is self-aligned, the present invention aims to provide a method that does not cause positional deviation in the third region.

An embodiment of the present invention will be described below with reference to process diagrams showing the diffusion process of a planar thyristor shown in FIGS. 1, 2, and 5 to 7. After forming an oxide film 2, that is, an insulating film, on the surface of an n-type Si semiconductor substrate 1, that is, a first conductivity type semiconductor substrate, an opening is formed in the oxide film 2 using a photolithography method, and a P-type Si semiconductor substrate is formed through this opening. Impurity B is thermally diffused to form isolation diffusion regions 3 as shown in FIG. Next, one part of the semiconductor substrate 1 surrounded by the separation diffusion region 3 is prepared using a photolithography method.
After selectively removing the oxide film 2 on the surface to form the first opening 21 and removing the entire oxide film 2 on the opposite surface of the semiconductor substrate 1, B is thermally diffused to form the second opening 21. As shown in the figure, a P-type base region 4, that is, a first region of the second conductivity type, and a P-type emitter region 5 are formed. In this case, the surface impurity concentration is 10 ¹⁶ to 10 ¹⁸ particles/cm ³ as in the conventional case. At the same time as forming these regions 4 and 5, an oxide film 2 is formed within the first opening. At this time, an oxide film having the same thickness is additionally formed on other parts of the semiconductor substrate 1. Then the first
After forming a second opening 23 in the oxide film 2 within the opening, an n-type impurity P is thermally diffused through the second opening 23 to a surface impurity concentration of 10 ¹⁹ to 10 ²⁰ impurities/cm ³ .
As shown in FIG. 5, an n-type emitter region 6, that is, a second region of the first conductivity type, is formed in the P-type base region 4. In the heat treatment for forming regions 4, 5, and 6 so far, by controlling the processing conditions such as atmosphere and temperature, the oxide film 2 within the first opening and the oxide film on the other undiffused regions are Make sure there is a sufficient difference in the thickness of the two. Thereafter, the entire surface of the semiconductor substrate 1 is subjected to etching treatment using hydrofluoric acid or the like, and the oxide film on the entire surface is removed at the same etching rate. In this way, since the oxide film 2 inside the first opening and on the back surface is thin, this oxide film 2 is removed first. In this way, as shown in FIG. 6, the first opening 21 is opened again and the etching process is stopped when the oxide film 2 on the back surface is removed. Finally, in order to stabilize the surface of the P-type region and to improve the contact between the P-type base region 4 and P-type emitter region 5 and the electrode metal that will be formed in this portion in a later process, the surface impurity concentration is reduced to P. B is thermally diffused for an extremely short period of time to a region higher than the type base region 4 and lower than the n-type emitter region 6, at about 10 ¹⁸ to ^{10 19} particles/cm ³ , and as shown in FIG. A high concentration boron diffusion region 7 is formed in the third region of the second conductivity type and the P-type emitter region 5 .
Since the diffusion process is thus completed, the high concentration boron diffusion region 7 is kept shallow.

As a result, defects in Si are reduced, and the current amplification factor h FE of an npn transistor consisting of an n-type emitter, a p-type base and an n-type semiconductor substrate is reduced, and the dependence of the current amplification factor h _FE on the ambient temperature, and therefore the thyristor gate trigger current.
A feature of this method is that the dependence of Igt on ambient temperature can be reduced compared to conventional methods.

In the above embodiment, the semiconductor substrate is Si, but other semiconductor substrates may be used.

Further, in the above embodiments, the insulating film is an oxide film formed by thermally oxidizing the semiconductor substrate, but it is not limited to this. For example, it may be an oxide film deposited from the outside, an organic compound, or a stack of these. It may be something. Here, the thermal oxide film may be formed by simply performing heat treatment, or may be formed at the same time as the thermal diffusion of impurities into the semiconductor substrate, or by further heat treatment after forming the oxide film at the same time as thermal diffusion. It goes without saying that even if the oxide film is thick, it may be formed by performing heat treatment after removing the oxide film formed during thermal diffusion.

Further, in the above embodiment, the insulating film within the first opening,
The material of the insulating film other than the inside of the first opening is the same,
Since there was a step between the two, we removed both at the same time at the same etching rate to recreate the first opening.
The same purpose can be achieved by reproducing the first opening by performing an etching process by selecting etching conditions that remove only the insulating film within the opening. In short, etching may be performed so that the insulating film formed within the first opening is removed before the insulating film formed inside the first opening is removed.

Although the explanation has been given above using a planar thyristor as an example, it goes without saying that the present invention can also be applied to the manufacture of transistors, bidirectional thyristors, and the like.

As described above, according to the present invention, after forming the first region of the second conductivity type through the first opening of the insulating film provided on the semiconductor substrate of the first conductivity type, The second insulating film formed in the first opening
A second region of the first conductivity type is formed in the first region through the opening, and then an etching process is performed to remove only the insulating film formed within the first opening. Since the first opening was reproduced and a third region of the second conductivity type whose surface impurity concentration was higher than that of the first region was formed through the reproduced first opening, the third region One step of photolithography is omitted in forming an opening for forming a region, and the conventional four photolithographic steps are shortened to three. This reduces the cost of semiconductor devices, improves yield, and improves the third process. Since the regions are self-aligned, the overlay accuracy is improved and variations in characteristics are reduced.

[Brief explanation of drawings]

1 to 4 are process diagrams showing a conventional method for manufacturing a semiconductor device, and FIGS. 5 to 7 are process diagrams showing an embodiment of the present invention. In the figure, 1 is an n-type semiconductor substrate, 2 is an insulating film, 4 is a first region, 6 is a second region, and 7 is a third region.
21 is a first opening, and 23 is a second opening. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Scope of Claims] 1. A step of forming an insulating film having a first opening on the surface of a semiconductor substrate of a first conductivity type; a step of forming an insulating film having a second opening within the first opening on the semiconductor substrate; a step of forming a second region of a first conductivity type; a step of forming a second region of a first conductivity type; a step of reproducing the first opening by removing an insulating film inside the opening;
A third conductive layer of a second conductivity type having a surface impurity concentration higher than that of the first region is introduced into the first region through the opening.
1. A method of manufacturing a semiconductor device, comprising a step of forming a region. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the insulating film having the first opening is made of the same material as the insulating film having the second opening and is thicker than the insulating film having the second opening. 3. The method of manufacturing a semiconductor device according to claim 2, wherein the insulating film is an oxide of a semiconductor substrate. 4. The method of manufacturing a semiconductor device according to claim 3, wherein an insulating film having a second opening is formed simultaneously with the formation of the first region. 5. The method of manufacturing a semiconductor device according to claim 1, wherein the insulating film having the first opening and the insulating film having the second opening are made of materials having mutually different etching characteristics. 6. Manufacture of a semiconductor device according to claim 5, wherein the insulating film having the first opening is made of an oxide of a semiconductor substrate, and the insulating film having the second opening is an organic compound deposited from the outside. Method.