JPH0141016B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a wiring structure of a semiconductor device.

Conventionally, materials for electrode wiring in semiconductor devices include:
Aluminum is mainly used, but other
Platinum, gold, etc. are also used depending on the purpose. Since aluminum is soluble in various acids, wiring has traditionally been formed by wet etching. Recently, it has become relatively easy to process by dry etching such as plasma etching. On the other hand, platinum and gold are stable and resistant to most inorganic chemicals, and can only be etched with special strong acids such as aqua regia.

These metal wirings are usually formed by etching using a photoresist film as a protective film, but since the photoresist cannot withstand the aqua regia mentioned above and is eroded, it is difficult to form accurate wiring patterns required for semiconductor devices. It was difficult to obtain

On the other hand, sputter etching using an inert gas is a method of accelerating Ar ions and colliding with the object to be etched.
This method is practical because the etching speed of platinum and gold is fast, and the uniformity and reproducibility are good. However, in this sputter etching, if there is a relatively large step of 0.5μ or more on the semiconductor substrate on which the metal wiring is formed, or if there is an eave-like overhang on the step even if the step is small,
Etching residue is generated along the stepped portion, and there is a problem that the wiring is shot, making it difficult to put it into practical use.

On the other hand, a so-called lift-off method is being considered as a method for forming wiring patterns of platinum or gold, which are difficult to etch. An example of wiring formation using the lift-off method is shown in Figures 1 to 9.
As shown in the figure.

First, as shown in FIG. 1, an insulating film 2 is formed on a semiconductor substrate 1, and then a spacer (eg, aluminum, etc.) 3 is deposited.

Next, after forming a photoresist pattern 4 as shown in FIG. 2, the underlying spacer 3 is etched, resulting in a pattern as shown in FIG. In this state,
For example, when titanium 5 and platinum 6 are successively deposited by vacuum evaporation or sputtering, the result is as shown in FIG. Next, when the photoresist 4 is removed with a suitable solvent, the photoresist 4 is removed as shown in FIG.
Unnecessary titanium and platinum on the top are removed at the same time (lift/
(off) to obtain a two-layer pattern of titanium 5 and platinum 6. Spacer 3 is used for two purposes: to facilitate lift-off of titanium and platinum, and to supply current for gold plating as shown in FIG.

Here, protrusions were formed at the ends of the obtained two-layer pattern of titanium and platinum, as shown at 8 in FIG. 5. This is because, as shown in Fig. 4, when titanium or platinum is deposited by vacuum evaporation or sputtering, it also adheres to the side surfaces of the spacer 3, making contact with the aluminum spacer. I understand that. Next, as shown in FIG. 6, after forming a photoresist pattern 4' as a protective film for plating, gold plating is performed.
As shown in FIG. 7, a pattern of gold 7 is laminated on platinum 6.

Here, each platinum pattern is connected to the aluminum spacer and the protrusion 8 at the end of the pattern as described above.
Uniform plating can be achieved because of the connection. After this, when the photoresist 4' is removed,
The result is as shown in FIG. Finally, when the unnecessary spacer 3 is removed by etching, the wiring formation is completed as shown in FIG. 9, and is then completed through various post-treatments and heat treatments. Here, the protrusions 8 at the ends of the titanium and platinum patterns shown in FIG. During the post-processing process, the protrusions 8 at the ends of the pattern come off, causing shorts between wiring lines, which is one of the major causes of lowering the reliability of semiconductor devices. FIG. 10 is a plan view showing a state in which the unnecessary portion 8 at the end of the pattern is detached and connected to the adjacent wiring.

SUMMARY OF THE INVENTION An object of the present invention is to provide a highly reliable method for manufacturing a semiconductor device having a wiring structure that eliminates the conventional drawbacks as described above.

That is, the present invention includes the following steps: forming an insulating film on a semiconductor substrate, further forming a spacer layer made of metal on the insulating film, and forming a photoresist pattern in a predetermined region on the surface of the spacer layer. etching the spacer layer that is not covered with the photoresist pattern to form a spacer layer pattern and exposing the surface of the insulating film; forming a multilayer metal layer made of different metal layers over the entire surface of the substrate; removing the photoresist pattern and simultaneously removing the multilayer metal layer formed on the photoresist pattern; and the spacer layer. A step of forming a plating photoresist pattern on the upper surface of the pattern and having a size that is included in the upper surface of the pattern; The present invention relates to a method of manufacturing a semiconductor device, comprising: a step of forming a layer; and a step of removing the photoresist pattern for plating and the spacer layer pattern.

Embodiments of the present invention will be described below with reference to the drawings.
Until the titanium and platinum patterns are formed by the lift-off method (i.e., Figures 1 to 5),
Go through the same process as before. Next, as shown in FIG. 11, a photoresist pattern 4' is formed as a protective film for gold plating. Here, the photoresist pattern 4' is formed on the lift-off spacer 3. That is, the photoresist pattern 4' is formed so that the titanium and platinum pattern ends 8 are exposed before gold plating and are therefore covered with gold after being gold plated. When the gold plating is completed, the titanium and platinum patterns are completely covered with gold 7, as shown in FIG. next,
When the photoresist pattern 4' is removed by the usual method, the result is as shown in FIG. 13, and finally, when the unnecessary spacer 3 is removed by etching, the result is as shown in FIG. 14, completing the formation of the metal wiring.

As can be seen from FIG. 14, in the embodiment of the present invention, the ends of the titanium and platinum patterns described above are covered with gold, so post-processing after wiring formation (for example,
It can be seen that the protrusions 8 at the end of the pattern do not come off during processes (scrubbing, organic cleaning, etc.) and do not come into contact with adjacent wiring, and the reliability of the semiconductor device is significantly improved.

In the embodiment of the present invention, titanium and platinum are used as metals that are difficult to etch.
We have described an example of lifting off and laminating gold by plating, but other metals to be lifted off include aluminum,
Any metal that is normally used for forming wiring in semiconductor devices can be used, such as tungsten, copper, silicon, etc., or a combination thereof, and the lamination method is the gold plating method as in the embodiment of the present invention. It is clear that the layers may be laminated by a combination of ordinary vacuum deposition and etching.

[Brief explanation of drawings]

1 to 9 are cross-sectional views showing the conventional wiring forming process, and FIG. 10 is a plan view showing the conventional wiring. FIGS. 11 to 14 are cross-sectional views showing an embodiment of the present invention in the order of manufacturing steps. Symbols in the figure are 1...Silicon substrate, 2...Insulating film, 3...Spacer, 4, 4'...Photoresist pattern, 5...Titanium, 6...Platinum, 7
. . . gold, 8 . . . protrusion at the end of the pattern.

Claims (1)

[Claims] 1. Forming an insulating film on a semiconductor substrate, further forming a spacer layer made of metal on the insulating film, and forming a photoresist pattern in a predetermined region on the surface of the spacer layer. etching the spacer layer that is not covered with the photoresist pattern to form a spacer layer pattern and exposing the insulating film surface; the insulating film surface and side surfaces of the spacer layer pattern; forming a multilayer metal layer made of different metal layers over the entire surface of the semiconductor substrate; removing the photoresist pattern and simultaneously removing the multilayer metal layer formed on the photoresist pattern; forming a photoresist pattern for plating on the upper surface of the spacer layer pattern having a size that is included in the upper surface; and using a plating method on the multilayer metal layer so as to cover the entire surface of the multilayer metal layer. 1. A method for manufacturing a semiconductor device, comprising: forming a metal layer using a metal layer; and removing the plating photoresist pattern and the spacer layer pattern.