JPH0141052B2 - - Google Patents
Info
- Publication number
- JPH0141052B2 JPH0141052B2 JP56049090A JP4909081A JPH0141052B2 JP H0141052 B2 JPH0141052 B2 JP H0141052B2 JP 56049090 A JP56049090 A JP 56049090A JP 4909081 A JP4909081 A JP 4909081A JP H0141052 B2 JPH0141052 B2 JP H0141052B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- input
- differential input
- transistor
- electronic switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
- H03K17/62—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors
Landscapes
- Electronic Switches (AREA)
Description
【発明の詳細な説明】
本発明は、複数個の差動入力回路を有し、電気
的信号により任意の差動入力回路のみをONとし
他の差動入力回路をOFFとすることにより任意
の入力信号の選択を可能とした電子スイツチ回
路、特にOFF側の差動入力回路に大振巾の信号
が印加された場合、出力への信号の漏れを防ぐこ
とのできる電子スイツチ回路に関する。[Detailed Description of the Invention] The present invention has a plurality of differential input circuits, and by turning on only one differential input circuit and turning off the other differential input circuits using an electrical signal, any one of the differential input circuits can be turned on. The present invention relates to an electronic switch circuit that allows input signal selection, and particularly to an electronic switch circuit that can prevent signal leakage to the output when a large amplitude signal is applied to an OFF-side differential input circuit.
第１図に従来の電子スイツチ回路の例を示す。
この電子スイツチ回路はトランジスタ６，７より
なる第１の差動入力回路とトランジス８，９より
なる第２の差動入力回路で構成される差動入力回
路とトランジスタ１４，１５，１９，２０、ダイ
オード１６，１７、抵抗２１，２２，２３、定電
流源１８で構成され、第１および第２の差動入力
回路の出力が共通入力とされ出力端子３が付設さ
れた増巾回路部と、第１および第２の差動入力回
路への共通負帰還回路を形成する抵抗２４と、第
１の差動入力回路へのエミツタ電流源１０と第２
の差動入力回路へのエミツタ電流源１１と差動入
力回路の共通負荷となるカレントミラー回路を構
成するトランジスタ１２，１３によつて形成され
ている。第１図の回路においては、第１の差動入
力回路の入力端子１への入力信号と第２の差動入
力回路の入力端子２への入力信号は、電流源１０
と１１を交互にON−OFFすることにより、選択
的に出力端子３へ出力される。すなわち電流源が
ONである差動入力回路側への入力信号を出力端
子３へ出力信号として取り出すことができ電子ス
イツチ回路として働くことになる。 FIG. 1 shows an example of a conventional electronic switch circuit.
This electronic switch circuit includes a differential input circuit consisting of a first differential input circuit consisting of transistors 6 and 7 and a second differential input circuit consisting of transistors 8 and 9, and transistors 14, 15, 19, 20, an amplifying circuit section that is composed of diodes 16, 17, resistors 21, 22, 23, and a constant current source 18, the outputs of the first and second differential input circuits are used as a common input, and an output terminal 3 is attached; A resistor 24 forming a common negative feedback circuit to the first and second differential input circuits, an emitter current source 10 to the first differential input circuit and a second
It is formed by an emitter current source 11 for the differential input circuit and transistors 12 and 13 forming a current mirror circuit serving as a common load for the differential input circuit. In the circuit of FIG. 1, the input signal to the input terminal 1 of the first differential input circuit and the input signal to the input terminal 2 of the second differential input circuit are input to the current source 10.
By alternately turning on and off 11 and 11, the signal is selectively output to the output terminal 3. In other words, the current source
The input signal to the differential input circuit side that is ON can be taken out as an output signal to the output terminal 3, thus functioning as an electronic switch circuit.
かかる電子スイツチ回路の有すべき特性の重要
な条件の１つとしてスイツチの切換比の良いこ
と、言い換えれば、OFF側差動入力回路への入
力信号がいかなる条件下においても出力端子へは
漏れていないことが挙げられる。こうしたスイツ
チの切換比の観点より第１図の電子スイツチ回路
を検討する。例として電流源１０がON、電流源
１１がOFFの場合を考える。かかる場合、第１
の差動入力回路がONとなるため、入力端子１へ
加えられた入力信号は出力端子３へ正常に出てく
る。 One of the important characteristics that such an electronic switch circuit should have is that the switch has a good switching ratio.In other words, the input signal to the OFF side differential input circuit must not leak to the output terminal under any conditions. One example is that there is no such thing. The electronic switch circuit shown in FIG. 1 will be considered from the viewpoint of the switching ratio of the switch. As an example, consider a case where the current source 10 is ON and the current source 11 is OFF. In such a case, the first
Since the differential input circuit of is turned on, the input signal applied to input terminal 1 is output normally to output terminal 3.
一方、第２の差動入力回路はOFFとなつてい
るから入力端子２へ加えられた入力信号はいかな
る条件下においても出力端子３へ漏れてきてはな
らない。このことは前述したようにスイツチの切
換比を良くする条件であるが、このような状況下
で入力端子２に大振巾の入力信号が入りこの入力
信号によつて第２の差動入力回路を構成する
PNPトランジスタ８のベース電圧が負側に大き
く振られた場合、信号漏れの問題が生じる。すな
わち、トランジスタ８のコレクタ電圧VC8は、活
性状態にある第１の差動入力回路とトランジスタ
１４，１５により、負側電源ライン５よりもトラ
ンジスタ１４と１５のベースエミツタ間電圧VBE
の和（2VBE）だけ高い値に固定されている。し
たがつて、トランジスタ８のベース電圧が大入力
信号により、負側電源ライン５に対してVBE以下
に振られた場合、トランジスタ８のベース・コレ
クタ間電圧は、ベースを基準として正方向にVBE
以上の値となり、コレクタベース間のPN接合を
順方向にバイアスするバイアス電圧となり、トラ
ンジスタ８のベース・コレクタ間は導通状態とな
つてしまう。 On the other hand, since the second differential input circuit is OFF, the input signal applied to input terminal 2 must not leak to output terminal 3 under any conditions. As mentioned above, this is a condition for improving the switching ratio of the switch, but under such circumstances, a large amplitude input signal enters the input terminal 2, and this input signal causes the second differential input circuit to configure
If the base voltage of the PNP transistor 8 swings significantly to the negative side, a problem of signal leakage occurs. That is, the collector voltage V C8 of the transistor 8 is lower than the base-emitter voltage V BE of the transistors 14 and 15 than the negative power supply line 5 due to the active first differential input circuit and the transistors 14 and 15.
(2V BE ) is fixed at a higher value. Therefore, when the base voltage of the transistor 8 swings below V BE with respect to the negative power supply line 5 due to a large input signal, the base-collector voltage of the transistor 8 increases in the positive direction with the base as a reference. BE
The above value becomes a bias voltage that forward biases the PN junction between the collector and base, and the base and collector of the transistor 8 become conductive.
このように入力端子２へ印加される入力信号が
負に大きく振られ、前述した条件を満した時に
は、この信号が増巾回路部の入力段トランジスタ
１４のベース回路へ漏れてくることになり増巾回
路で増巾され、かなり大きなレベルとなつて出力
端子３へ漏れ信号となり出てしまう。このため
OFF側差動入力回路への入力信号はいかなる条
件下でも出力端子へ漏れてはならないという、電
子スイツチ回路の有すべき条件を満たさないこと
になる。なお、電流源１０がOFF、電流源１１
がONの場合は、入力端子１への入力信号につい
て同様のことが言える。 In this way, when the input signal applied to the input terminal 2 swings significantly in the negative direction and satisfies the above-mentioned conditions, this signal leaks to the base circuit of the input stage transistor 14 of the amplification circuit section, causing an increase. The signal is amplified by the width circuit, reaches a considerably high level, and is output as a leakage signal to the output terminal 3. For this reason
This does not satisfy the condition that an electronic switch circuit should have, which is that the input signal to the OFF-side differential input circuit must not leak to the output terminal under any conditions. Note that current source 10 is OFF and current source 11 is OFF.
The same thing can be said about the input signal to input terminal 1 when is ON.
以上のように、第１図に示す従来の電子スイツ
チ回路においては、OFF側入力端子に大振巾の
入力信号が印加された場合、出力端子へ漏れ信号
が出ることとなり、大振巾の入力信号を扱う電子
スイツチ回路では大きな問題となる。 As described above, in the conventional electronic switch circuit shown in Fig. 1, when a large amplitude input signal is applied to the OFF side input terminal, a leakage signal is output to the output terminal, and the large amplitude input signal is applied to the OFF side input terminal. This is a major problem in electronic switch circuits that handle signals.
本発明は、以上のような電子スイツチ回路の問
題に鑑みてなされたもので、OFF側入力端子へ
の入力信号の振巾が大きな値であつても、出力端
子への信号漏れを完全に排除することのできる電
子スイツチ回路を提供するものである。 The present invention was made in view of the above problems with electronic switch circuits, and completely eliminates signal leakage to the output terminal even if the amplitude of the input signal to the OFF side input terminal is large. The present invention provides an electronic switch circuit that can perform the following steps.
第２図に本発明に係る回路例を示す。第２図に
おいて１〜２４は第１図と同一である。２５は第
１の差動入力回路の出力回路であるトランジスタ
６のコレクタと、増巾回路部の入力回路であるト
ランジスタ１４のベースの間にトランジスタ６の
コレクタ・ベース間ダイオードの極性と逆極性と
なるように接続されたダイオードである。また２
６は第２の差動入力回路の出力回路であるトラン
ジスタ８のコレクタとトランジスタ１４のベース
の間にトランジスタ８のコロクタ・ベース間ダイ
オードの極性と逆極性となるように接続されたダ
イオードである。 FIG. 2 shows an example of a circuit according to the present invention. In FIG. 2, numerals 1 to 24 are the same as in FIG. 25 is connected between the collector of the transistor 6, which is the output circuit of the first differential input circuit, and the base of the transistor 14, which is the input circuit of the amplifier circuit section, and has a polarity opposite to that of the collector-base diode of the transistor 6. It is a diode connected so that Also 2
A diode 6 is connected between the collector of the transistor 8 and the base of the transistor 14, which is the output circuit of the second differential input circuit, so as to have a polarity opposite to that of the diode between the collector and base of the transistor 8.
以上のように構成された本発明の電子スイツチ
回路では、ダイオード２５と２６の付加により従
来の電子スイツチ回路で問題となつた入力信号の
漏れが排除される。たとえば、電流源１０が
ON、一方電流源がOFFの回路状態が成立してい
る電子スイツチ回路の入力端子２へ従来の電子ス
イツチ回路では漏れの問題が発生しうるほどの大
振幅の入力信号が入力された場合、トランジスタ
８のコレクタにはダイオード２６が付加されてい
るためにトランジスタ１４のベースからは浮いて
いる。したがつて、入力端子２へ大振幅の信号が
入力されることにより、トランジスタ８のベース
電圧が負側電源ライン５に対してVBE以下に振ら
れたとしても、ダイオード２６のカソード・アノ
ード間逆耐圧によつてトランジスタ１４のベース
から浮いた状態が保持される。このため、トラン
ジスタ８のコレクタ・ベース間が順方向にバイア
スされてトランジスタ８が誘導する状態は成立し
ない。 In the electronic switch circuit of the present invention constructed as described above, the addition of the diodes 25 and 26 eliminates input signal leakage, which has been a problem in conventional electronic switch circuits. For example, if the current source 10
When an input signal with such a large amplitude as to cause leakage problems in conventional electronic switch circuits is input to input terminal 2 of an electronic switch circuit in which the circuit state is ON, while the current source is OFF, the transistor Since a diode 26 is added to the collector of transistor 8, it is floating from the base of transistor 14. Therefore, even if the base voltage of the transistor 8 swings below V BE with respect to the negative power supply line 5 by inputting a large amplitude signal to the input terminal 2, the voltage between the cathode and anode of the diode 26 The reverse breakdown voltage maintains the floating state from the base of the transistor 14. Therefore, the state induced by the transistor 8 where the collector and base of the transistor 8 are biased in the forward direction is not established.
すなわち、OFF側の差動入力回路に繋る入力
端子２へ印加される入力信号が負に大きく振られ
ても、この信号が出力端子３へ漏れてくる不都合
は生じない。換言すれば、本発明にかかる第２図
の電子スイツチ回路では、第１図で示した従来の
電子スイツチ回路に比べて、ダイオード２６の逆
耐圧分だけ出力端子への信号漏れに対するOFF
側入力信号レベルの許容度が大きくなり、ダイオ
ード２６に逆耐圧の大きなものを用いればほとん
どの入力信号に対して信号漏れの問題をなくすこ
とが可能となる。なおON側の差動入力回路を構
成するトランジスタ６のコレクタ回路に接続され
たダイオード２５は、トランジスタ６のコレクタ
電流に対し順方向に接続されており動作に支障は
来たさない。さらに、ダイオード２５の非直線性
による歪もダイオード２５が負帰還ループ内入つ
ているため、ほとんど発生しない。また、上記と
は逆に電流源１０がOFF、電流源１１がONの場
合も同様にトランジスタ２５の逆耐圧分だけ、
OFF側入力端子１への入力信号の振巾の許容度
が増加する。 That is, even if the input signal applied to the input terminal 2 connected to the OFF-side differential input circuit swings significantly in the negative direction, the problem of this signal leaking to the output terminal 3 does not occur. In other words, in the electronic switch circuit of FIG. 2 according to the present invention, compared to the conventional electronic switch circuit shown in FIG.
The tolerance of the side input signal level is increased, and if a diode 26 with a high reverse breakdown voltage is used, it becomes possible to eliminate the problem of signal leakage for most input signals. Note that the diode 25 connected to the collector circuit of the transistor 6 constituting the differential input circuit on the ON side is connected in the forward direction with respect to the collector current of the transistor 6, and does not interfere with the operation. Furthermore, distortion due to the nonlinearity of the diode 25 hardly occurs because the diode 25 is included in the negative feedback loop. Also, contrary to the above, when the current source 10 is OFF and the current source 11 is ON, similarly, by the reverse breakdown voltage of the transistor 25,
The amplitude tolerance of the input signal to the OFF side input terminal 1 increases.
以上のように、本発明よれば、電子スイツチ回
路のOFF側入力端子への許容入力レベルをON側
の特性劣化を来たすことなく大きくすることが可
能となり、従来、電子スイツチの使用が因難であ
つた大振巾信号回路にも電子スイツチの使用が可
能となり、回路の特性、信頼性の向上に大きく寄
与する。 As described above, according to the present invention, it is possible to increase the permissible input level to the OFF-side input terminal of an electronic switch circuit without degrading the ON-side characteristics, which makes it difficult to use an electronic switch in the past. Electronic switches can now be used in large amplitude signal circuits, greatly contributing to improved circuit characteristics and reliability.
なお、本発明の説明のために示した第２図の電
子スイツチ回路では、PNPトランジスタで差動
入力回路が構成されているが、NPNトランジス
タによる差動入力回路よりなる電子スイツチ回路
にも本発明を適用できることは当然である。また
ON−OFFされる差動入力回路が一対の場合につ
いて説明したが、任意の複数個の差動入力回路の
場合についても同様に本発明を適用できる。 In the electronic switch circuit shown in FIG. 2 for explaining the present invention, the differential input circuit is composed of PNP transistors, but the present invention can also be applied to an electronic switch circuit consisting of a differential input circuit using NPN transistors. It is natural that it can be applied. Also
Although the case where a pair of differential input circuits are turned ON and OFF has been described, the present invention can be similarly applied to the case of any plurality of differential input circuits.
第１図は従来の電子スイツチ回路の一例を示す
図、第２図は本発明の一実施例にかかる電子スイ
ツチ回路を示す図である。
６，７……第１の差動入力回路を構成するトラ
ンジスタ、８，９……第２の差動入力回路を構成
するトランジスタ、１０，１１……交互にON−
OFFする電流源、１２，１３……カレントミラ
ー回路よりなる第１、第２の差動入力回路の共通
負荷、１４，１５，１９，２０……増巾回路用ト
ランジスタ、１，２……第１、第２の差動入力回
路の入力端子、３……出力端子、２５，２６……
ダイオード。
FIG. 1 is a diagram showing an example of a conventional electronic switch circuit, and FIG. 2 is a diagram showing an electronic switch circuit according to an embodiment of the present invention. 6, 7...Transistors forming the first differential input circuit, 8, 9...Transistors forming the second differential input circuit, 10, 11...Alternately ON-
Current source to be turned off, 12, 13... common load of the first and second differential input circuits consisting of a current mirror circuit, 14, 15, 19, 20... transistor for amplifier circuit, 1, 2... th 1. Input terminal of second differential input circuit, 3... Output terminal, 25, 26...
diode.
Claims (1)
ンジスタのベースに信号入力端子が付設された差
動入力回路の複数個と、これらの差動入力回路の
出力が入力端子に共通接続される増幅回路部を有
するとともに、前記差動入力回路の各出力発生点
と前記増幅回路の入力端子との間に、前記トラン
ジスタのコレクタベース間pn接合の向きとは逆
の向きとなる接続関係でそれぞれダイオードを接
続したことを特徴とする電子スイツチ回路。1. A plurality of differential input circuits each consisting of a pair of transistors with a signal input terminal attached to the base of one transistor, and an amplifier circuit section in which the outputs of these differential input circuits are commonly connected to the input terminal. and a diode is connected between each output generation point of the differential input circuit and the input terminal of the amplifier circuit in a connection relationship that is opposite to the direction of the collector-base pn junction of the transistor. An electronic switch circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56049090A JPS57162832A (en) | 1981-03-31 | 1981-03-31 | Electronic switch circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56049090A JPS57162832A (en) | 1981-03-31 | 1981-03-31 | Electronic switch circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57162832A JPS57162832A (en) | 1982-10-06 |
| JPH0141052B2 true JPH0141052B2 (en) | 1989-09-01 |
Family
ID=12821395
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56049090A Granted JPS57162832A (en) | 1981-03-31 | 1981-03-31 | Electronic switch circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57162832A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6090937U (en) * | 1983-11-28 | 1985-06-21 | 東光株式会社 | switch circuit |
| EP0387463A1 (en) * | 1989-03-14 | 1990-09-19 | International Business Machines Corporation | Improvements to complementary emitter follower drivers |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4849372A (en) * | 1971-10-22 | 1973-07-12 | ||
| JPS5482156A (en) * | 1977-12-14 | 1979-06-30 | Hitachi Ltd | Electronic switch circuit |
| JPS566530A (en) * | 1979-06-29 | 1981-01-23 | Hitachi Ltd | Multiinput analog switch circuit |
-
1981
- 1981-03-31 JP JP56049090A patent/JPS57162832A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57162832A (en) | 1982-10-06 |
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