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JPH0142073B2 - - Google Patents
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JPH0142073B2 - - Google Patents

Info

Publication number
JPH0142073B2
JPH0142073B2 JP18040081A JP18040081A JPH0142073B2 JP H0142073 B2 JPH0142073 B2 JP H0142073B2 JP 18040081 A JP18040081 A JP 18040081A JP 18040081 A JP18040081 A JP 18040081A JP H0142073 B2 JPH0142073 B2 JP H0142073B2
Authority
JP
Japan
Prior art keywords
pattern
voltage
interval
servo
disk
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP18040081A
Other languages
Japanese (ja)
Other versions
JPS5883370A (en
Inventor
Hiroshi Mizusawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi High Tech Corp
Original Assignee
Hitachi Electronics Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Electronics Engineering Co Ltd filed Critical Hitachi Electronics Engineering Co Ltd
Priority to JP18040081A priority Critical patent/JPS5883370A/en
Publication of JPS5883370A publication Critical patent/JPS5883370A/en
Publication of JPH0142073B2 publication Critical patent/JPH0142073B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/48Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed
    • G11B5/58Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following
    • G11B5/596Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following on disks

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Moving Of The Head To Find And Align With The Track (AREA)

Description

【発明の詳細な説明】 本発明は検査時のデイスク回転速度が書込み時
あるいは基準の回転速度と多少異なつていても、
書込まれたサーボパターン間隔の合否を正しく判
定できる磁気デイスク用サーボパターン書込み間
隔検査方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides the ability to
The present invention relates to a method for inspecting servo pattern writing intervals for magnetic disks, which can accurately determine whether or not written servo pattern intervals are acceptable.

磁気デイスク製造時には、そのサーボ面に書込
んだヘツド位置決めなどに用いるサーボパターン
が、それぞれ所定の間隔で正しく書込まれている
か否かを検査して合否を判定しなければならな
い。このサーボパターンの書込み間隔を測定する
のに、積分器等により時間を電圧に変換して、あ
らかじめ設定されている基準電圧と比較して判定
する方法は、数μsの間隔を数十ns以内の所望精度
で測定することが困難である。また100MHz程度
の超高速デイジタル発振器およびカウンタによ
り、パターン読取り時刻の間隔(時間)を測定す
る方法が一般に用いられているが、この方法で
も、もし検査時のデイスク回転速度が規準あるい
は書込み時の回転速度と異なつていれば正確な測
定はできない。したがつて従来はサーボパターン
書込み間隔の正確な検査を行うには高価な大規模
な設備を必要とした。
When manufacturing a magnetic disk, it is necessary to inspect whether the servo patterns used for head positioning, etc. written on the servo surface are correctly written at predetermined intervals to determine whether or not the disk is acceptable. To measure the writing interval of this servo pattern, the method of converting time into voltage using an integrator or the like and comparing it with a preset reference voltage is to convert the interval of several μs to within several tens of nanoseconds. Difficult to measure with desired accuracy. In addition, a method is generally used to measure the interval (time) between pattern reading times using an ultra-high-speed digital oscillator and a counter of about 100 MHz, but even with this method, if the disk rotation speed during inspection is not the standard or the rotation speed during writing is If the speed is different, accurate measurements cannot be made. Therefore, in the past, expensive and large-scale equipment was required to accurately inspect the servo pattern writing interval.

本発明の目的は、検査時のデイスク回転速度が
書込み時あるいは基準の回転速度と多少異なつて
いても、書込まれたサーボパターン間隔の合否を
正しく判定できるサーボパターン書込み間隔検査
方法を提供することにある。
An object of the present invention is to provide a servo pattern writing interval inspection method that can correctly determine whether the written servo pattern interval is acceptable even if the disk rotational speed at the time of inspection is somewhat different from the rotational speed at the time of writing or the reference rotational speed. There is a particular thing.

上記目的を達成するために本発明においては、
通常のデイスク回転状態で一つのトラツクに書込
まれたサーボパターンをヘツドに読出させ、この
読出した信号にPLL(フエーズロツクドループ)
内のVCO(電圧制御発振器)の発振を引込ませ、
読出し時の回転速度でデイスクが1回転するのに
要する時間を特定整数で正確に等分した間隔でク
ロツクパルスを発生させ、このクロツクを基準に
して、あるサーボパターンを読出した信号により
作成したサーボパターン発生時点から、次のサー
ボパターンに対するパターンパルス発生時点まで
の時間を計測することにした。すなわち前述のク
ロツクパルスの間隔(時間)の絶対値は回転速度
の変動に応じて変動するけれども、パターンパル
ス発生間隔(時間)の絶対値もまた回転速度の影
響を全く同様に受けるので、本発明に係るクロツ
クパルスのパルスカウントで計測すれば、デイス
クに書込まれたサーボパターンの間隔は、デイス
ク回転速度の変動にかかわらず、それぞれ常に同
じ値となる筈だからである。またデイスクは相当
大きい慣性能率を有し、相当高速回転(例えば、
3600rpm)しているから定常運転中に生ずる回転
速度の変動は、今計測しようとするサーボパター
ン間の(時間)間隔に比べれば極めて長い時間を
要して極めて緩徐に生ずるにすぎない。したがつ
て目的とするサーボパターンの間隔を計測してい
る途中でクロツクが狂うなどの問題は生じない。
なおパターンパルス間の間隔測定の実際は、前記
クロツクに同期して作成したゲートパルスと、こ
のゲートパルス内に読出された一つのサーボパタ
ーンに対するパターンパルスとの位相差を積分ホ
ールド回路で電圧に変換したものを基準電圧と
し、同様にして前記ゲートパルスに対し所定クロ
ツク数だけ遅らせて作成したゲートパルスと、前
記パターンの次のパターンに対するパターンパル
スとの位相差を他の積分ホールド回路で電圧に変
換したものを被検電圧とし、これら2電圧値の差
が所定値以内か否かにより、前記2サーボパター
ン間の書込み間隔の合否を判定することとした。
これは、これらのサーボパターンの書込み間隔が
正しければ、それを読出して作成したパターンパ
ルス間の間隔は、本発明に係るクロツクの丁度所
定(整)数倍になる筈であるが、実際には多少の
誤差が生ずるのは止むを得ないから、クロツクの
端数に相当する誤差部分をアナログ的に測定する
ために、2つのサーボパターンに対し、それぞれ
クロツクに同期してゲートパルスを発生させ、こ
れらゲートパルスとそれぞれのパターンパルスと
の位相差をそれぞれ別の積分ホールド回路で電圧
に変換して比較し、電圧差が所定値以内ならば合
格とすることにしたのである。こ所定の許容値は
十数ns相当である。
In order to achieve the above object, in the present invention,
A servo pattern written on one track is read out to the head under normal disk rotation, and a PLL (phase locked loop) is applied to this read signal.
The oscillation of the VCO (voltage controlled oscillator) inside is pulled in,
A servo pattern created by generating a clock pulse at an interval that accurately divides the time required for the disk to rotate once at the rotational speed during reading by a specific integer, and using this clock as a reference signal to read out a certain servo pattern. We decided to measure the time from the time of generation to the time of generation of pattern pulses for the next servo pattern. In other words, although the absolute value of the clock pulse interval (time) described above varies in accordance with fluctuations in the rotational speed, the absolute value of the pattern pulse generation interval (time) is also affected by the rotational speed in exactly the same way. This is because, if measured by the pulse count of such clock pulses, the intervals between the servo patterns written on the disk should always be the same value regardless of fluctuations in the disk rotation speed. In addition, the disk has a considerably high rate of inertia and rotates at a considerably high speed (for example,
3600 rpm), the fluctuations in rotational speed that occur during steady operation take an extremely long time compared to the (time) interval between the servo patterns that we are currently trying to measure, and occur extremely slowly. Therefore, there is no problem such as the clock going out of order while measuring the interval between the target servo patterns.
In actuality, the interval between pattern pulses is measured by converting the phase difference between the gate pulse created in synchronization with the clock and the pattern pulse for one servo pattern read within this gate pulse into a voltage using an integral hold circuit. Using this as a reference voltage, the phase difference between the gate pulse, which was similarly created by delaying the gate pulse by a predetermined number of clocks, and the pattern pulse for the next pattern after the pattern was converted into a voltage using another integral hold circuit. is used as the voltage to be tested, and whether or not the writing interval between the two servo patterns is acceptable is determined based on whether the difference between these two voltage values is within a predetermined value.
This is because if the writing intervals of these servo patterns are correct, the interval between pattern pulses created by reading them should be exactly a predetermined (integer) multiple of the clock according to the present invention, but in reality It is unavoidable that some error will occur, so in order to measure the error portion corresponding to the fraction of the clock in an analog manner, gate pulses are generated for each of the two servo patterns in synchronization with the clock, and these are The phase difference between the gate pulse and each pattern pulse was converted into a voltage using separate integral hold circuits and compared, and if the voltage difference was within a predetermined value, the test was judged to have passed. This predetermined tolerance value is equivalent to more than ten nanoseconds.

以下本発明一実施例の回路ブロツク図である第
1図と、その中の各信号の波形、タイミングを示
す第2図について説明する。第1図中に、例えば
信号aなどと記入してあるが、それに相当する波
形が第2図中に示してある。サーボパターンをヘ
ツドで読出し、増幅器で増幅した信号aは第2図
に示す如くである。これをピーク検出回路を通し
てデイジタルパルス化した信号bは第2図に示す
如くである。この信号をPLLからなるパターン
同期信号発生回路に入力し、PLL内のVCOの発
振をこの入力に引込ませる。こうしてパターン同
期信号発生回路に発生させた(入力に引込まれた
PLL内のVCOが発生)信号cが本発明の骨子を
なす、デイスク回転に対応したクロツクである。
このクロツクをもとにして第1図中に示すチエツ
クタイミング作成回路で各種ゲート信号を作成す
る。なお一方で前記信号bをパルス作成回路に通
して信号dすなわちパターンパルスに変換する。
第2図中に示すように本実施例では所定の不同間
隔で設けたサーボパターンα,β,γが1組をな
し、デイスクの1トラツク上にかかるパターンの
組が何千組も書込まれている。なお第2図中の信
号d、パターンパルスの図にα′と示したのは次の
組のαパルスを示す。第1図に示すようにチエツ
クタイミング作成回路により作成されたゲート
(いわゆる測定窓)Aとパターンパルスαとの位
相差T1を位相差検出回路Aで検出する。これを
積分ホールド回路Aで電圧eに変換し、これを基
準電圧とみなし、これに許容範囲いわば公差を加
減して上限VH(f)、下限VL(g)を作る。つぎに所定
クロツク(パターンパルスα,β間の本来の、又
は所期の、間隔に相当)後に作成したゲートBと
パターンパルスβの位相差を位相差検出回路Bで
検出し、これを積分ホールド回路Bで電圧hに変
換し、これを被検電圧Vとし、これを上限コンパ
レータでV<VHであるか否か、下限コンパレー
タでVL<Vか否かを検査し、その結果をエラー
検出回路に入れてVL<V<VHならばパターンパ
ルスα,β間の時間間隔したがつてこれらに対応
するデイスク上のサーボパターン書込み(距離)
間隔は合格とし、そうでなければ不合格と判定す
る。なお第1図中の位相検出回路D、積分ホール
ド回路Dは、パターンパルスα′に対するものであ
る。
The following will explain FIG. 1, which is a circuit block diagram of an embodiment of the present invention, and FIG. 2, which shows the waveforms and timings of each signal therein. For example, signal a is written in FIG. 1, and the corresponding waveform is shown in FIG. The servo pattern is read out by the head and the signal a amplified by the amplifier is as shown in FIG. The signal b, which is converted into a digital pulse through a peak detection circuit, is as shown in FIG. This signal is input to a pattern synchronization signal generation circuit consisting of a PLL, and the oscillation of the VCO in the PLL is drawn into this input. In this way, the pattern synchronization signal generation circuit generated (pulled into the input
The signal c (generated by the VCO in the PLL) is a clock corresponding to the disk rotation, which is the essence of the present invention.
Based on this clock, various gate signals are created by the check timing creation circuit shown in FIG. On the other hand, the signal b is passed through a pulse generating circuit to be converted into a signal d, that is, a pattern pulse.
As shown in FIG. 2, in this embodiment, servo patterns α, β, and γ provided at predetermined irregular intervals form one set, and thousands of sets of such patterns are written on one track of the disk. ing. Note that the signal d in FIG. 2 and the symbol α' in the diagram of pattern pulses indicate the next set of α pulses. As shown in FIG. 1, a phase difference detection circuit A detects a phase difference T1 between a gate (so-called measurement window) A created by a check timing creation circuit and a pattern pulse α. This is converted into a voltage e by an integral hold circuit A, which is regarded as a reference voltage, and an upper limit V H (f) and a lower limit V L (g) are created by adding and subtracting a tolerance, so to speak, to this voltage. Next, the phase difference between gate B and pattern pulse β created after a predetermined clock (corresponding to the original or intended interval between pattern pulses α and β) is detected by phase difference detection circuit B, and this is integrated and held. Convert it to voltage h in circuit B, use it as the voltage to be tested V, check whether V < V H with the upper limit comparator, check whether V L < V with the lower limit comparator, and check the results as an error. If V L < V < V H , then the time interval between pattern pulses α and β will be the corresponding servo pattern writing (distance) on the disk.
The interval is considered pass, otherwise it is judged as fail. Note that the phase detection circuit D and the integral hold circuit D in FIG. 1 are for the pattern pulse α'.

以上説明したように本発明によれば、磁気デイ
スクに書込まれたサーボパターンの間隔の合否
を、デイスクの回転速度変動の影響を受けずに、
しかも比較的安価な設備で、判定できる。
As explained above, according to the present invention, it is possible to determine whether or not the interval between servo patterns written on a magnetic disk is acceptable without being affected by fluctuations in the rotational speed of the disk.
Moreover, it can be determined using relatively inexpensive equipment.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明実施例の回路ブロツク図、第2
図は該回路中の信号を示す図である。
Figure 1 is a circuit block diagram of an embodiment of the present invention, Figure 2 is a circuit block diagram of an embodiment of the present invention.
The figure is a diagram showing signals in the circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 磁気デイスク用サーボパターンの書込み間隔
検査において、通常のデイスク回転状態で一つの
トラツクに書込まれたサーボパターンをヘツドに
読出させ;この読出した信号にPLL内VCOの発
振を引込ませて、読出し時の回転速度でデイスク
が1回転するのに要する時間を特定整数で正確に
等分した間隔でクロツクパルスを発生させ;この
クロツクに同期して作成したゲートパルスと、こ
のゲートパルス内に読出された一つのパターンか
ら作成したパターンパルスとの位相差を積分ホー
ルド回路で電圧に変換したものを基準電圧とし;
同様にして所定クロツク後に作成したゲートパル
スと前記パターンの次のパターンに対するパター
ンパルスとの位相差を他の積分ホールド回路で電
圧に変換して被検電圧とし;前記基準電圧と被検
電圧の差が所定値以内か否かにより前記2パター
ン間の書込み間隔の合否を判定するようにしたこ
とを特徴とする磁気デイスク用サーボパターン書
込み間隔検査方法。
1. In the write interval inspection of servo patterns for magnetic disks, the servo pattern written on one track is read out to the head under normal disk rotation; the oscillation of the VCO in the PLL is drawn into this read signal, and the readout Clock pulses are generated at intervals that accurately divide the time required for the disk to rotate once at the rotation speed of The phase difference with a pattern pulse created from one pattern is converted into a voltage by an integral hold circuit, and the reference voltage is used;
Similarly, the phase difference between the gate pulse created after a predetermined clock and the pattern pulse for the next pattern of the pattern is converted into a voltage by another integral hold circuit and used as the voltage to be tested; the difference between the reference voltage and the voltage to be tested A method for inspecting a servo pattern writing interval for a magnetic disk, characterized in that whether the writing interval between the two patterns is acceptable or not is determined based on whether or not the writing interval is within a predetermined value.
JP18040081A 1981-11-12 1981-11-12 Inspecting method for writing intervals of servo pattern for magnetic disk Granted JPS5883370A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18040081A JPS5883370A (en) 1981-11-12 1981-11-12 Inspecting method for writing intervals of servo pattern for magnetic disk

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18040081A JPS5883370A (en) 1981-11-12 1981-11-12 Inspecting method for writing intervals of servo pattern for magnetic disk

Publications (2)

Publication Number Publication Date
JPS5883370A JPS5883370A (en) 1983-05-19
JPH0142073B2 true JPH0142073B2 (en) 1989-09-08

Family

ID=16082571

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18040081A Granted JPS5883370A (en) 1981-11-12 1981-11-12 Inspecting method for writing intervals of servo pattern for magnetic disk

Country Status (1)

Country Link
JP (1) JPS5883370A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0766641B2 (en) * 1986-07-31 1995-07-19 日立電子エンジニアリング株式会社 Master clock creation device in servo ratter
JP2714162B2 (en) * 1989-07-28 1998-02-16 株式会社東芝 Servo error detector for data recording / reproducing device
KR20040096958A (en) * 2004-10-11 2004-11-17 김영권 Elevator

Also Published As

Publication number Publication date
JPS5883370A (en) 1983-05-19

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