JPH0145245B2 - - Google Patents

Description

[Detailed Description of the Invention] (1) Technical Field of the Invention The present invention relates to a variable gain amplifier circuit, and in particular to a variable gain amplifier circuit that controls the dynamics of an input transistor by applying a current offset to a control voltage generation circuit for controlling the current gain of the input transistor. This invention relates to a variable gain amplifier circuit with a wide range.

(2) Technical background In general, variable gain amplifier circuits control the current gain of the input transistor according to the control voltage, but in order to widen the dynamic range of the input transistor, the fluctuation range of the control voltage will be explained in detail later. As mentioned above, the narrower the space, the better.

(3) Prior Art and Problems FIG. 1 is a circuit diagram showing an example of a conventional variable gain amplifier circuit. In FIG. 1, Q ₇ is an input transistor, 1 is a control voltage generation circuit, and 2 is a current gain control that controls the current gain of the input transistor Q ₇ according to the control voltage V _c ' output from the control voltage generation circuit 1. 3 is a DC fluctuation suppression circuit that suppresses output DC voltage fluctuation in accordance with the control voltage V _c '.

In the control voltage generation circuit 1, the emitter is a constant current source I ₀
It comprises a pair of transistors Q ₁ and Q ₂ whose collectors are connected to a power supply V B through resistors R ₁ and R ₂ respectively, and whose collectors are connected in common to a power supply V _B through resistors R ₁ and R ₂
The values of are substantially equal. Transistor Q ₁ and
An input control voltage V _C is applied across the base of Q ₂ .
Transistor Q ₁ depending on the positive or negative of the input control voltage V _C
One of Q2 and _Q2 is conductive and the other is disconnected,
A control voltage V _C ' is obtained across its collector.

The current gain control circuit 2 includes transistors Q 3 and Q ₄ whose emitters are commonly connected to the collector of the input transistor Q ₇ and whose bases are connected to the collectors of transistors Q ₁ and Q ₂ , which are the outputs of the control voltage generation circuit ₁ , respectively. ing. transistor
The collector of Q ₃ is connected directly to the power supply V _CC and
The collector of transistor Q ₄ is connected to the power supply V _CC through a resistor R ₅ . A DC bias power supply E is connected to the base of the input transistor _Q7 via an input signal source IN, and the emitter is grounded via a resistor _R3 .

The DC fluctuation suppression circuit 3 has an emitter connected to the collector of a transistor Q8 having the same characteristics as the input transistor _Q7 , and a base connected to the transistor _Q8 .
It has transistors _Q5 and _Q6 connected to the bases of _Q3 and _Q4 , respectively. The collector of transistor Q ₅ is connected to the collector of transistor Q ₄ , and the collector of transistor Q ₆ is connected to the collector of transistor Q ₃ .
The base of transistor _Q8 is DC bias power supply E
The emitter is connected directly to the ground through a resistor _R4 having the same characteristics as the resistor _R3 .

The operation of the conventional circuit shown in FIG. 1 will now be explained with reference to FIG. FIG. 2 is a waveform diagram showing the relationship between the input control voltage V _C and the control voltage V _C ' output from the control voltage generation circuit in the circuit shown in FIG. When the input control voltage V _C is low and transistor Q ₁ is off and transistor Q ₂ is on, the base potential of transistors Q ₃ and Q ₅ is particularly relative to the reference power supply voltage V _B ,
The base potential of transistors Q ₄ and Q ₆ is V _B −
Equal to I ₀ R ₂ . For this reason transistor Q ₃ and
Q ₅ is on and transistors Q ₄ and Q ₆ are off. Therefore, current I ₁ flows from the power supply V _CC to ground through resistor R ₅ , transistor Q ₅ , transistor Q ₈ , and resistor R ₄ . Next, when the input control voltage V _C becomes high and transistor Q ₁ is turned on and transistor Q ₂ is turned off, transistors Q ₃ and Q ₅ are turned off and transistors Q ₄ and Q ₆ are turned on. Therefore, at this time, from the power supply V _CC , the resistor R ₅ ,
Transistor Q ₄ , transistor Q ₇ and resistor R ₃
The power supply _I2 flows towards ground through. If the characteristics of transistors Q ₄ and Q ₅ , Q ₇ and Q ₈ , and resistors R ₃ and R ₄ are made the same, the current flowing at this time I ₂ is equal to I ₁ . Therefore, the DC voltage obtained at the output terminal OUT is
The control voltage V _C ' remains constant even though it fluctuates.

However, in the conventional circuit shown in FIG.
There is a problem that the dynamic range of input transistor _Q7 is narrow. That is, the collector potential of input transistor Q ₇ is V _B − V _BE in a steady state where one of transistors Q ₃ and Q ₄ is completely on and the other is completely off, but the collector potential of transistors Q ₃ and Q ₄ is
In a transient state where the voltages change from on to off or from off to on, the voltage decreases to V _B −I ₀ R ₁ /2−V _BE =V _B − I ₀ R ₂ /2−V _BE . Here, V _BE is the base-emitter voltage of transistor _Q3 or _Q4 . For example, reference power supply voltage V _B = 3V, I ₀ R ₁ = I ₀ R ₂ =
1V, V _BE = 0.7V, input transistor Q ₇
The collector potential of will drop to a minimum of 1.8V. Therefore, the amplitude of the input signal that can be applied to the input signal source IN is severely limited.

Of course, if the reference power supply voltage V _B is set high _, the collector potential of the transistor Q ₇ will also rise, and the operating range of the _input transistor Q ₇ will be expanded _. Difficulties arise, such as having to move the points.

The base voltage variation required to switch transistors Q ₃ and Q ₄ from on to off or from off to on was I ₀ R ₁ /2 in the circuit shown in Figure 1, but this should be as small as possible. desirable.

(4) Object of the Invention In view of the problems in the prior art described above, an object of the present invention is to apply a power offset to the control voltage generation circuit so that the transistor constituting the power gain control circuit can be changed from on to off or from off to on. The purpose of this invention is to expand the dynamic range of an input transistor that receives an input signal in a variable gain amplifier circuit, based on the concept of reducing the fluctuations in the base voltage required for switching.

(5) Structure of the Invention In order to achieve the above object, according to the present invention, a control voltage generation circuit included in a variable gain amplifier includes first and second transistors whose bases are connected in common, and first and second transistors whose bases are connected in common. 3rd and 4th
a first constant current source connected between the emitter of the first transistor and ground;
a second constant current source connected between the emitter of the transistor and ground and having the same current supply capability as the first constant current source;
a first resistor connected between a constant current source and a third resistor connected between a constant current source of
A second resistor is connected between the emitter of the transistor and the first constant current source and has the same resistance value as the first resistor.
a first load resistance connected between the collector of the second transistor and the power supply, and a first load resistance connected between the collector of the third transistor and the power supply and having the same value as the first load resistance. 2, the collectors of the first transistor and the second transistor are connected to a power supply, and a common base of the first and second transistors and a common base of the third and fourth transistors are connected to the power supply. The variable gain amplifier circuit is characterized in that it receives an input control signal between the first and second transistors, and obtains a control voltage between the collectors of the second and third transistors.

(6) Embodiments of the invention Examples of the invention will be described below with reference to FIGS. 3 and 4.

FIG. 3 is a circuit diagram showing a control voltage generation circuit included in a variable gain amplifier according to an embodiment of the present invention. In Figure 3, the bases of transistors Q ₁ ′ and Q ₁ ″ are commonly connected to the input terminal I ₁ that receives the input control signal, and the bases of transistors Q ₂ ′ and Q ₂ ″ are connected to the other input terminal I _2. Commonly connected. transistor
The collectors of Q ₁ ' and Q ₂ ' are connected to the reference power supply V _B , and the emitters are connected to the first and second constant current sources I ₀₁ and I ₀₂ , respectively. Constant current source I ₀₁
and I ₀₂ have the same current supply capability. The collectors of transistors Q ₁ ″ and Q ₂ ″ are connected to the reference power supply V _B via resistors R ₁ and R ₂ , respectively. Resistors R ₁ and R ₂ have the same resistance value. The emitter of the transistor Q ₁ ″ is connected to the constant current source I ₀₂ through the resistor R ₇ , and the emitter of the transistor Q ₂ ″ is connected to the resistor R ₆
are connected to a constant current source I ₀₁ via a resistor R ₆ having the same value as . Transistor Q ₁ ″ and
The collector of Q ₂ ″ is connected to a current gain control circuit.The current gain control circuit and DC fluctuation suppression circuit are the same as in the conventional example shown in FIG. 1, and are therefore not shown.

The operation of the circuit shown in FIG. 3 will be explained with reference to FIG. FIG. 4 is a graph showing the relationship between the input control voltage V _CC and the collector potentials of transistors Q ₁ '' and Q ₂ '' in the circuit of FIG. 3. First input end I ₁
Assume that the signal level of is low, the potential of input terminal I ₂ is high, transistors Q ₁ ′ and Q ₁ ″ are off, and transistors Q ₂ ′ and Q ₂ ″ are on. At this time, as in the conventional case, the collector potential V _C (Q ₁ ") of the transistor Q ₁ " is equal to the reference power supply voltage V _B , and the collector potential V _C (Q ₂ ") of the transistor Q ₂ is V _B −I ₀ R ₂ =
Equal to V _B −I ₀ R ₁ . When the input control voltage V _CC is increased, transistors Q ₁ ′ and Q ₁ ″ are turned on, and the transistors
Q ₂ ′, Q ₂ ″ are switched on, but since the resistor R ₇ is connected between the emitter of the transistor Q ₁ ″ and the constant current source I ₀₂ , the threshold voltage of the transistor Q ₁ ″ in the operating state is higher than that of transistor Q ₁ ′, and the timing at which transistor Q ₁ ″ is completely turned on is delayed from the timing at which transistors Q ₂ ′ and Q ₂ ″ are turned off. Therefore, as shown in FIG. As _{shown in FIG .} ) means that the fluctuations in the base voltage required to switch from on to off or from off to on are reduced.
Similar to the conventional example described above, V _B = 3V, I ₀ R ₁ = I ₀ R ₂ =
1V, V _BE = 0.7V, and the potential difference between the reference power supply voltage V _B and the above cross point is I ₀ R ₁ /5, then the collector potential of the input transistor Q ₇ is at the lowest V _B -
I ₀ R ₁ /5-V _BE = 2.1V, compared to the conventional example of 1.8V
The operating range has been expanded by 0.3V.

(7) Effects of the Invention As explained above, according to the present invention, by applying a current offset to the control voltage generation circuit, the transistor constituting the current gain control circuit can be switched from on to off or from off to off. Since the fluctuation of the base voltage required for this is reduced, the dynamic range of the input transistor receiving the input signal in the variable gain amplifier circuit is expanded.

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing an example of a conventional variable gain amplifier circuit, Figure 2 is a waveform diagram showing the relationship between the input control voltage and the output voltage of the control voltage generation circuit in the circuit of Figure 1, and Figure 3 is FIG. 4 is a circuit diagram showing a control voltage generation circuit included in a variable gain amplifier circuit according to an embodiment of the present invention, and FIG. 4 shows the relationship between the input control voltage V _CC and the output voltage of the control voltage generation circuit in the circuit of FIG. FIG. In the figure, 1 is a control voltage generation circuit, 2 is a current gain control circuit, 3 is a DC fluctuation suppression circuit, _Q7 is an input transistor, _I01 is a first constant current source, and _I02 is a second constant current source. be.

Claims (1)

[Claims] 1 input transistor _Q7 and control voltage generation circuit,
A current gain control circuit that controls a current gain of the input transistor according to a control voltage output from the control voltage generation circuit, and a DC fluctuation suppression circuit that suppresses output DC voltage fluctuation according to the control voltage. In the variable gain amplifier circuit, the control voltage generation circuit includes first and second transistors Q ₁ ′, Q ₁ ″ whose bases are commonly connected, and third and fourth transistors Q ₂ , whose bases are commonly connected. Q ₂ ″, a first constant current source I ₀₁ connected between the emitter of the first transistor and ground, and the first constant current source I 01 connected between the emitter of the fourth transistor and ground. A second constant current source I ₀₂ with the same current supply capacity
, a first resistor R 7 connected between the emitter of the second transistor and the second constant current source, and a first resistor R ₇ connected between the emitter of the third transistor and the first constant current source. a second resistor _R6 having the same resistance value as the first resistor; and a first load resistor connected between the collector of the second transistor and the power supply.
R ₁ and a second load resistor R ₂ connected between the collector of the third transistor and the power supply and having the same value as the first load resistor; a collector of the transistor is connected to the power supply and receives an input control signal between a common base of the first and second transistors and a common base of the third and fourth transistors; A variable gain amplifier circuit characterized in that the control voltage is obtained between the collector of the third transistor.