JPH0145748B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a semiconductor integrated circuit (hereinafter referred to as IC)
The purpose of this substrate bias generation circuit is to provide a substrate bias generation circuit with low power consumption.

In ICs, substrate bias generation circuits are often used in N-channel MOSICs, especially in study type and dynamic type random access memories (RAM). This is because N-channel MOS is difficult to become an enhancement type, there is a strong demand for higher speed RAM, and IC
This is due to the desire to simplify system design by reducing the number of terminals and further reducing the number of power supplies. Looking back at the history of how substrate bias is applied to N-channel MOSICs, when N-channel MOSICs were first put into practical use, the substrate was at the same potential as the ground line. However, if you try to make a MOSFET that operates in the enhancement mode with this, you will have to increase the impurity concentration of the substrate, and the internal N-type diffusion layer and P
The junction capacitance of the shaped substrate was large, making it difficult to increase the operating speed.

Therefore, in order to increase the speed, the impurity concentration of the substrate was lowered and a negative bias was applied to the substrate from an external source using a separate power supply to operate in an enhancement mode.

While this method has the advantage of increasing speed, it also has the disadvantage of increasing the number of terminals and power supplies. Figure 1 was devised to solve this problem.
This is the substrate bias generation circuit shown in FIGS. 2 and 3. Figure 1 shows the part corresponding to the pump of the N-channel MOSIC substrate bias generation circuit.
FIG. 2 shows a portion corresponding to the pump of a P-channel MOSIC substrate bias generation circuit. In the figure, 101, 201 are substrates, 102, 202 are nodes, 103, 203 are power lines, 110, 210
is a diode, 120 and 220 are capacitances, 13
0,230 is MOSFET, 131,231 is drain, 132,232 is gate, 133,233
indicates the source. and capacitance 12
The output 303 in FIG. 3 is connected to one terminal 104, 204 of the transistors 0 and 220, forming a set of substrate bias generation circuits. Figure 3 shows an oscillation circuit, where 301 is the input of the inverter, 302 is the output, 310 is the inverter, 320 is the buffer, 3
Reference numeral 30 indicates a resistance component, and reference numerals 340 and 350 indicate capacitance components. Explaining based on FIG. 1, the substrate bias generation circuit pumps up a large number of carriers generated on the substrate 101 like a pump based on the AC signal output from the oscillation circuit of FIG. This is an attempt to create a negative bias.

Therefore, an oscillation circuit is required inside the IC, and this oscillation circuit consumes power. Furthermore, the entire IC consumes a certain amount of power both when it is in operation and when it is in standby mode.

The present invention aims to correct such drawbacks, and includes a first current path formed between a substrate on which a transistor of a semiconductor integrated circuit is formed and a first node, and a first current path formed between the first node and a power source. a second current path formed between the wires, an oscillating means, a second node that is an output end of the oscillating means, and a second node connected between the first node and responsive to an output signal of the oscillating means; In the substrate bias generation circuit comprising a capacitance component that is charged and discharged, the oscillation means generates a first signal when the semiconductor integrated circuit is in the operating state based on a control signal indicating an operating state or a standby state of the semiconductor integrated circuit. The device is characterized in that it has means for switching the oscillation frequency so that it oscillates at a frequency and oscillates at a second frequency lower than the first frequency when in the standby state. Examples will be described below.

FIG. 4 shows an embodiment of the present invention, which corresponds to the oscillation circuit described above. In this example, MOSFETs 431 and 432 play the role of resistors. 404 is
This is a control signal given from outside or inside the IC. For example, if the RAM is "1" in the operating state and "0" in the standby state, then in the operating state
MOSFET 432 is in a conductive state, 431 is in a non-conductive state, and vice versa in a standby state.If the conduction resistance of 431 is designed to be larger than that of 432, the resistance value will change and the oscillation frequency will be lowered, reducing power consumption in a standby state. be able to. That is, the substrate bias generation circuit of the present invention lowers the oscillation frequency by changing constants such as resistance values that determine the oscillation frequency of the oscillation circuit when the IC is in a standby state, thereby reducing power consumption. IC in standby state
Since only a small portion of the MOSFET operates, the charging and discharging current between the substrate and the reverse biased diffusion layer and the current flowing into the substrate when the MOSFET operates in the saturation region are extremely small, so the oscillation frequency is lowered and pumped from the substrate. There is no functional problem even if the amount of majority carriers, that is, the current, is reduced. Also, in standby mode, the IC
Since power consumption in other parts of the device is reduced, reducing the power consumed by the oscillation circuit greatly contributes to reducing overall power consumption.

FIG. 5 shows another embodiment of the invention. The resistance component is divided into a MOSFET that acts as a switch and a resistor. This is effective when you want to obtain a particularly low frequency by increasing the resistance value. The resistor may be made of polysilicon or any other material that can provide a high resistance value.

The present invention has a distinction between an operating state and a standby state, and an IC that requires particularly low power consumption in the standby state.
Generally valid.

[Brief explanation of drawings]

Figure 1 shows the part corresponding to the pump in an N-channel MOSIC substrate bias generation circuit, 101 is the substrate,
102 is a node, 103 is a power line (grounding line), 11
0 is a diode, 120 is capacitance, 130 is
MOSFET, 131 is the drain, 132 is the gate, and 133 is the source. Figure 2 shows the part corresponding to the pump in the P-channel MOSIC substrate bias generation circuit, 201 is the substrate,
202 is a node, 203 is a power line, 210 is a diode, 220 is a capacitance, 230 is a MOSFET,
231 is a drain, 232 is a gate, and 233 is a source. Figure 3 shows a conventional oscillation circuit, 301 is the input of the inverter, 302 is the output, 303 is the output of the oscillation circuit, 310 is the inverter, 320 is the buffer, 3
30 is a resistance component, and 340 and 350 are capacitance components. FIG. 4 shows the first embodiment of the present invention, 401 is the input of the inverter, 402 is the output, 403 is the output of the oscillation circuit, 404 is the control signal, 410 is the inverter, 420 is the buffer, 431 and 432 are the
MOSFET. FIG. 5 shows a second embodiment of the present invention, 501 is the input of the inverter, 502 is the output, 503 is the output of the oscillation circuit, 504 is the control signal, 510 is the inverter, 520 is the buffer, 531 and 532 are the
MOSFET, 533 and 534 are resistors.

Claims (1)

[Claims] 1. A first current path formed between a substrate on which a transistor of a semiconductor integrated circuit is formed and a first node, and a second current path formed between the first node and a power supply line; A substrate bias comprising an oscillation means and a capacitance component connected between a second node which is an output end of the oscillation means and the first node and charged and discharged according to an output signal of the oscillation means. In the generating circuit, the oscillation means oscillates at a first frequency when in the operating state and oscillates at the first frequency when in the standby state based on a control signal indicating an operating state or a standby state of the semiconductor integrated circuit. 1. A substrate bias generation circuit comprising means for switching an oscillation frequency so as to oscillate at a second frequency lower than the second frequency.