JPH0147055B2 - - Google Patents

Description

[Detailed Description of the Invention] (1) Technical Field of the Invention The present invention demodulates an input signal using a constant carrier, and eliminates the phase error between the demodulated carrier and the input signal carrier.
The automatic carrier phase control circuit (CAPC) installed after the equalizer detects and follows the phase, and is not affected by noise, and is designed to stably feed back and track only phase jitter. It is related to.

(2) Prior art and problems Conventionally, in receiving modems of phase modulation and quadrature amplitude modulation data transmission equipment, input signals from the line are affected by the line and have carrier wave frequency shifts and carrier wave phase jitter. ing. Therefore, conventional methods have been used in which a fixed demodulation carrier is given to the receiving modem for demodulation, and the frequency deviation and carrier jitter between the demodulation carrier and carrier wave are tracked by feedback using an automatic carrier phase control circuit (CAPC) after an equalizer. It has been used since.

FIG. 1 is an explanatory diagram of the configuration of a conventional example of this system. In the figure, a modulated signal is input to AGC1 of the receiving section, gain is controlled, and digital data is generated by sampling. This is given a constant demodulation carrier in the demodulation section 2, and then passed through the roll-off filter (ROF) 3.
is sent to the equalizer (EQL) 4 via. ROF3 is a waveform shaping filter having a delay circuit corresponding to multiple taps, and EQL4 equalizes line distortion.
Thereafter, an automatic carrier phase control circuit (CAPC) 10 in the succeeding stage detects and follows the phase shift between the demodulated carrier and the input signal carrier. That is, the output of the EQL 4 is inputted to the determination circuit 6 via the multiplication section 5, the error between the equalized output and the determination result is detected by the subtraction section 7, and the output is inputted to the normalization circuit 11 via the complex conjugate section 8. The phase error is converted into an opposite phase component using a normalization constant obtained from the determination result. This is put into the first integration circuit 9 to obtain the integral value of the steady phase shift (frequency offset amount), multiplied by the coefficient β in the multiplier 16, and sent to the adder 13. On the other hand, the negative phase component is multiplied by the coefficient α in the multiplier 12. is multiplied and combined with the output of the multiplier 16 in the adder 13 and sent to the second integration circuit 14. The second integration circuit 14 performs integration to remove phase shifts due to jitter and frequency offset. This output is input to a multiplier 5 for phase tracking. On the other hand, the complex conjugate of the anti-phase component and the error signal from the subtractor 7 are multiplied by the multiplier 15 and fed back to the EQL4.

In this way, stable reception is possible by returning a feedback signal to follow jitter and frequency offset in the CAPC 10.

However, although the carrier phase jitter is mostly at a low frequency of about 60 Hz, the conventional system feeds back and tracks the frequency from the low frequency to the high frequency in the same way. Therefore, the CAPC circuit has the disadvantage that it becomes unstable as it tries to follow noise, which has a uniform frequency component from low to high frequencies.

(3) Purpose of the Invention The purpose of the present invention is to demodulate an input signal using a fixed carrier and detect the phase error between the demodulated carrier and the input signal carrier using an automatic carrier phase control circuit (CAPC) provided after the equalizer. It is an object of the present invention to provide a carrier phase control circuit which stably returns and tracks only phase jitter without being affected by noise in a phase tracking system.

(4) Structure of the Invention In order to achieve the above object, the carrier phase control circuit of the present invention demodulates an input signal with a constant demodulation carrier and provides it to an equalizer, and determines the received data by a determination circuit based on the equalizer output. In addition to determining the value, the phase error between the determination result and the equalizer output is determined, and a coefficient for correcting the phase error between the input signal carrier and the demodulated carrier is derived according to the phase error, and the coefficient is calculated as the equalizer output. The feedback carrier phase control circuit is characterized in that it includes arithmetic means for changing the correction coefficient value in accordance with the frequency indicated by the phase error from the determination circuit.

(5) Embodiments of the Invention The principle of the present invention is that after normalizing the negative phase component of the phase error from the determination circuit 6 of the CAPC 10 shown in FIG. , the resistance to control jitter is large but the resistance to noise is small, and when the coefficient α is small, the resistance to control jitter is small but the noise resistance is large. In reality, it is low frequencies that are a problem with jitter, and high frequency noise that is a problem with noise. Therefore, an additional circuit is provided to control the coefficient of the multiplier 12 so that it is increased when the frequency of the phase error is low and decreased when it is high frequency.

FIG. 2 is an explanatory diagram of the configuration of an embodiment of the present invention.
In this figure, blocks that are functionally the same as those in FIG. 1 are designated by the same numbers. The difference from FIG. 1 is that a multiplication section 2 is added as an additional circuit after the normalization circuit 11.
1, a circuit 20 including a moving average circuit 22, a square circuit 23, and a low-pass filter 24. Then, the output initially set as the coefficient α is sent to the multiplier 12 as α' under the above-mentioned control. That is, after setting the coefficient α in the multiplier 21, it is sent to the moving average circuit 22 consisting of a plurality of delay circuits 22 ₁ to 22 ₃ and an adder 22 ₄ that adds each output to its input, and the plurality of symbols are sent one symbol at a time. When moving and averaging, a large value is calculated for low frequencies, whereas a small value is output for high frequency noise. By squaring this output using the squaring circuit 23, the amplitude difference between the low frequency and high frequency becomes even larger and a DC component is obtained. Since ripples may occur in the square circuit 23, the ripples are suppressed by a low-pass filter (LPF) 24, and after passing through a limiter 25, the coefficient α' is supplied to the multiplier 12.

When a low frequency jitter component enters this additional circuit, it passes through the moving average circuit 22 with almost no attenuation.
Since the coefficient α' given to the multiplier 12 becomes larger, the jitter suppressing power becomes larger. When a high frequency component such as noise enters, it is greatly attenuated by the moving average circuit 22, and the jitter suppressing power is small, but the noise tolerance is high.

In this way, any negative effects caused by the jitter frequency can be reduced.

(6) Effects of the invention As explained above, according to the present invention, CAPC
In this method, a steady phase shift (frequency offset) and phase jitter are detected and fed back to the equalizer output, and an additional circuit is provided to stably feed back only the phase jitter, which is a low frequency component. As a result, unstable high-frequency noise as in the conventional method is not tracked, so that only phase jitter can be effectively suppressed at all times. Furthermore, since α' becomes smaller with respect to high-frequency noise, the influence of noise is reduced.

As a result, there is an advantage that the tracking range for phase jitter is wider than that of the conventional method.

Note that although a moving average type LPF is used here to extract the low frequency component, the present invention is not limited to this type of LPF, and other types of LPF may be used.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of the configuration of a conventional example, and FIG. 2 is an explanatory diagram of the configuration of an embodiment of the present invention. In the figure, 1 is an AGC,
2 is a demodulation section, 3 is a roll-off filter, 4 is an equalizer, 5, 12, 16, 21, 23 are multiplication sections, 6 is a judgment circuit, 7 is a subtraction section, 8 and 15 are complex conjugate sections,
9 is a first integration circuit, 10 is an automatic carrier phase control circuit (CAPC), 11 is a normalization circuit, 13 is an adder, 14 is a second integration circuit, 22 is a moving average circuit,
23 is a square circuit, 24 is a low pass filter, 25
indicates a limit.

Claims (1)

[Claims] 1. Demodulating the input signal with a constant demodulation carrier and applying it to the equalizer, determining the received data value by a determination circuit based on the equalizer output, and determining the phase error between the determination result and the equalizer output, In a carrier phase control circuit that derives a coefficient for correcting a phase error between an input signal carrier and the demodulated carrier according to the phase error and feeds it back to the equalizer output, according to the frequency indicated by the phase error from the determination circuit. A carrier phase control circuit characterized in that a calculation means for changing the correction coefficient value is provided.