JPH0152922B2 - - Google Patents
Info
- Publication number
- JPH0152922B2 JPH0152922B2 JP14448484A JP14448484A JPH0152922B2 JP H0152922 B2 JPH0152922 B2 JP H0152922B2 JP 14448484 A JP14448484 A JP 14448484A JP 14448484 A JP14448484 A JP 14448484A JP H0152922 B2 JPH0152922 B2 JP H0152922B2
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- input
- input signal
- voltage
- logarithmic amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000003321 amplification Effects 0.000 claims description 9
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 9
- 238000010586 diagram Methods 0.000 description 9
- 230000003247 decreasing effect Effects 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Landscapes
- Amplifiers (AREA)
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Description
【発明の詳細な説明】 〔発明の技術分野〕 本発明は周波数弁別器に関する。[Detailed description of the invention] [Technical field of invention] The present invention relates to a frequency discriminator.
第4図は従来の周波数弁別器のブロツク回路図
である。この周波数弁別器は入力端1から入力さ
れる振幅E〔V〕、周波数f〔Hz〕の入力信号を電
力分配器2によつて二分し、該二分した信号の一
方を直接位相検出器3に加え、他方を遅延時期が
△t〔sec〕である遅延回路4を介して位相検出器
3に加えるようになつており、位相検出器3に接
続されている2乗検波器5,6,7および8から
電圧KE2(1−sinθ)/4KE2(1+sinθ)/4、
KE2(1−cosθ)/4、およびKE2(1+cosθ)/
4が、2乗検波器5及至8に接続されている作動
増幅器9および10から電圧KE2sinθ/2および
KE2cosθ/2が出力される。ここで、入力信号の
周波数fと出力電圧の位相角θとは、θ=f×△
t×360゜なる関係があるので、入力信号の周波数
fは差動増幅器9,10の出力電圧から知ること
ができる。
FIG. 4 is a block circuit diagram of a conventional frequency discriminator. This frequency discriminator divides an input signal of amplitude E [V] and frequency f [Hz] inputted from an input terminal 1 into two by a power divider 2, and directly sends one of the two divided signals to a phase detector 3. In addition, the other signal is applied to the phase detector 3 via the delay circuit 4 whose delay time is Δt [sec], and the square-law detectors 5, 6, 7 connected to the phase detector 3 and 8 to voltage KE 2 (1−sinθ)/4KE 2 (1+sinθ)/4,
KE 2 (1−cosθ)/4, and KE 2 (1+cosθ)/
4 is the voltage KE 2 sin θ/2 and
KE 2 cosθ/2 is output. Here, the frequency f of the input signal and the phase angle θ of the output voltage are θ=f×△
Since there is a relationship of t×360°, the frequency f of the input signal can be determined from the output voltages of the differential amplifiers 9 and 10.
しかし、このような従来の周波数弁別器では、
出力電圧KE2sinθ/2およびKE2cosθ/2に入力
電圧が含まれているので、入力電圧の未知なも
のに対しては周波数がわかなない。そのため出力
電圧から入力電圧分を取り除かなければならなか
つたが、この入力電圧分を取り除く回路は複雑で
あるという問題があつた。 However, in such a conventional frequency discriminator,
Since the input voltage is included in the output voltages KE 2 sin θ/2 and KE 2 cos θ/2, the frequency is unknown for unknown input voltages. Therefore, it was necessary to remove the input voltage from the output voltage, but there was a problem in that the circuit for removing this input voltage was complicated.
また、出力電圧は正および負の値をとるので対
数増幅器を用いた割算計算が利用できないという
問題があつた。 Further, since the output voltage takes positive and negative values, there is a problem that division calculation using a logarithmic amplifier cannot be used.
さらに、位相検出器3は入力信号の周波数fが
小さくなるのに従つて大形化するので、数十〔M
Hz〕以下の周波数では実用的な周波数弁別器を構
成できないという問題があつた。 Furthermore, the phase detector 3 increases in size as the frequency f of the input signal decreases, so it
There was a problem in that it was impossible to construct a practical frequency discriminator at frequencies below [Hz].
本発明は上記した従来の問題点を解決するため
になされたもので、入力信号に影響されずに周波
数を弁別できる。周波数弁別器を提供することを
目的とする。
The present invention was made to solve the above-mentioned conventional problems, and it is possible to discriminate frequencies without being affected by input signals. The purpose is to provide a frequency discriminator.
そこで本発明では、入力信号を二分してその一
方を所定の増幅利得を有する第1の対数増幅器に
加え、他方をその周波数特性が単調関数、すなわ
ち単調増加関数あるいは単調減少関数である単調
関数回路を介して前記第1の対数増幅器と同一の
増幅利得を有する第2の対数増幅器に加え、さら
に前記第1および第2の対数増幅器の出力電圧を
差動増幅器に加え、入力信号の周波数のみに依存
する電圧を得て、入力信号の周波数の弁別を行な
う。
Therefore, in the present invention, an input signal is divided into two parts, one part is added to a first logarithmic amplifier having a predetermined amplification gain, and the other part is added to a monotonic function circuit whose frequency characteristic is a monotonic function, that is, a monotonically increasing function or a monotonically decreasing function. to a second logarithmic amplifier having the same amplification gain as the first logarithmic amplifier, and further apply the output voltages of the first and second logarithmic amplifiers to a differential amplifier, and apply only the frequency of the input signal. A dependent voltage is obtained to perform frequency discrimination of the input signal.
以下、本発明の一実施例を添付図面を参照して
詳細に説明する。
Hereinafter, one embodiment of the present invention will be described in detail with reference to the accompanying drawings.
第1図は本発明に係る周波数弁別器のブロツク
回路図である。 FIG. 1 is a block circuit diagram of a frequency discriminator according to the present invention.
第1図において、符号11は電力分破器、符号
12は入力信号の周波数に対してその出力信号が
単調関数すなわち単調増加関数あるいは単調減少
関数となる特性を有する、すなわち、その増幅利
得が入力信号の周波数fの関数G(f)となる単調関
数回路、符号13および14は入力電圧eiに対し
て出力電圧e0がe0=Klog ei+αとなる対数増幅
回路(ただし、K,αは対数増幅器の増幅利得に
よつて定まる定数)、符号15は対数増幅器13,
14の出力電圧の差分を増幅して出力する差動増
幅器である。 In FIG. 1, reference numeral 11 is a power divider, and reference numeral 12 is a power divider whose output signal is a monotonically increasing or decreasing function with respect to the frequency of the input signal. The monotone function circuits 13 and 14 are the function G(f) of the signal frequency f, and the numbers 13 and 14 are logarithmic amplifier circuits whose output voltage e 0 is e 0 = Klog ei + α with respect to the input voltage ei (K and α are logarithmic (constant determined by the amplification gain of the amplifier), symbol 15 is the logarithmic amplifier 13,
This is a differential amplifier that amplifies and outputs the difference between the 14 output voltages.
次に、第1図に示した周波数弁別器の全体的な
動作について説明する。 Next, the overall operation of the frequency discriminator shown in FIG. 1 will be explained.
電力分配器11は入力端16から入力された振
幅〔V〕、周波数f〔Hz〕の入力信号を二分し
て、該二分した入力信号の一方を第1の対数増幅
器13、他方を単調関数回路12を介して第2の
対数増幅器14にそれぞれ加える。入力信号の入
力により第1の対数増幅器13は入力電圧E/√
2+αを出力し単調関数回路12は入力電圧E/
√2を増幅して電圧G(f)E/√2を出力し、さら
に第2の対数増幅器14は電圧G(r)E/√2
を増幅して電圧KlogG(f)+KlogE+Klog(1/√
2)+αを出力する。 The power divider 11 divides an input signal of amplitude [V] and frequency f [Hz] inputted from the input terminal 16 into two, and sends one of the divided input signals to the first logarithmic amplifier 13 and the other to the monotone function circuit. 12 to a second logarithmic amplifier 14, respectively. By inputting the input signal, the first logarithmic amplifier 13 increases the input voltage E/√
2+α, and the monotone function circuit 12 outputs the input voltage E/
√2 and outputs the voltage G(f)E/√2, and the second logarithmic amplifier 14 outputs the voltage G(r)E/√2.
Amplify the voltage KlogG(f)+KlogE+Klog(1/√
2) Output +α.
次に差動増幅器15は第1の対数増幅器13の
出力電圧と第2の対数増幅器14の出力電圧の差
分、すなわち、電圧−KlogG(f)を増幅して電圧
−K′logG(f)を出力する。この出力電圧−K′logG
(f)は入力信号の電圧分を含まず単調関数回路12
の増幅利得G(f)、すなわち入力信号の周波数fの
関数となる。したがつて、差動増幅器14の出力
電圧から容易に入力信号の周波数fを加えること
ができる。 Next, the differential amplifier 15 amplifies the difference between the output voltage of the first logarithmic amplifier 13 and the output voltage of the second logarithmic amplifier 14, that is, the voltage −KlogG(f) to obtain the voltage −K′logG(f). Output. This output voltage −K′logG
(f) does not include the voltage component of the input signal, and monotonous function circuit 12
is a function of the amplification gain G(f), that is, the frequency f of the input signal. Therefore, the frequency f of the input signal can be easily added from the output voltage of the differential amplifier 14.
次に第2図は本発明に係る周波数弁別器の他の
実施例を示すブロツク回路図である。 Next, FIG. 2 is a block circuit diagram showing another embodiment of the frequency discriminator according to the present invention.
なお、第2図において第1図と同様の機能を果
たす部分については同一の符号を付し、その説明
は省略する。 Note that in FIG. 2, parts that perform the same functions as those in FIG. 1 are designated by the same reference numerals, and a description thereof will be omitted.
本実施例では、比較的ゆるやかな周波数特性を
持つたローパスフイルタ17によつて単調減少関
数を実現したものである。 In this embodiment, a monotonically decreasing function is realized by a low-pass filter 17 having relatively gentle frequency characteristics.
ローパスフイルタ17の増幅利得G(f)は抵抗器
18の抵抗値をR、コンデンサ19の容量をCと
すとG(f)=1/√1+(2)2となり、さらに
2πfRcが1より十分に大きければ、G(f)=1/
2πfRCとなる。したがつて、差動増幅器15の出
力電圧VはV=K′log(2πfRC)となり、入力信号
の周波数fはf=exp(V/K′−log(2πRC))と
なる。 The amplification gain G(f) of the low-pass filter 17 is G(f)=1/√1+(2) 2 , where the resistance value of the resistor 18 is R and the capacitance of the capacitor 19 is C.
If 2πfRc is sufficiently larger than 1, G(f)=1/
It becomes 2πfRC. Therefore, the output voltage V of the differential amplifier 15 becomes V=K'log(2πfRC), and the frequency f of the input signal becomes f=exp(V/K'−log(2πRC)).
次に、第3図は本発明の他の実施例を示すブロ
ツク回路図である。なお、第3図において第1図
と同様の機能を果たす部分については同一の符号
を付し、その説明は省略する。 Next, FIG. 3 is a block circuit diagram showing another embodiment of the present invention. Note that in FIG. 3, parts that perform the same functions as those in FIG. 1 are designated by the same reference numerals, and their explanations are omitted.
本実施例では、アクテイブフイルタ20によつ
て第2図に示した周波数弁別器よりも低い周波数
帯で動作する周波数弁別器を実現している。本実
施例の場合も、アクテイブフイルタ20の増幅利
得G(f)は、G(f)=1/2πfRCとなる。ただし、抵
抗器21の抵抗値をR、コンデンサ22の容量を
Cとする。 In this embodiment, the active filter 20 realizes a frequency discriminator that operates in a lower frequency band than the frequency discriminator shown in FIG. Also in this embodiment, the amplification gain G(f) of the active filter 20 is G(f)=1/2πfRC. However, the resistance value of the resistor 21 is assumed to be R, and the capacitance of the capacitor 22 is assumed to be C.
なお、本実施例では単調関数回路としてローパ
スフイルタあるいはアクテイブフイルタを用いた
が、これに限定されるものではなく、増幅利得が
入力信号の周波数の関数になれば良い。 In this embodiment, a low-pass filter or an active filter is used as the monotonic function circuit, but the present invention is not limited to this, and the amplification gain may be a function of the frequency of the input signal.
以上、説明したように本発明によれば、入力信
号の周波数に対してその出力信号が単調関数とな
る特性を有する周波数弁別器を用いることによ
り、入力信号の周波数にのみ依存する出力電圧が
得られ、容易に周波数の弁別を行なえる。
As described above, according to the present invention, by using a frequency discriminator whose output signal has a characteristic that the output signal is a monotone function with respect to the frequency of the input signal, an output voltage that depends only on the frequency of the input signal can be obtained. frequency can be easily distinguished.
第1図は本発明に係る周波数弁別器のブロツク
回路図、第2図は本発明に係る周波数弁別器の他
の実施例を示すブロツク回路図、第3図は本発明
に係る周波数弁別器の他の実施例を示すブロツク
回路図、第4図は従来の周波数弁別器のブロツク
回路図である。
12……単調関数回路、13,14……対数増
幅器、15……差動増幅器、17……ローパスフ
イルタ、20……アクテイブフイルタ。
FIG. 1 is a block circuit diagram of a frequency discriminator according to the present invention, FIG. 2 is a block circuit diagram showing another embodiment of the frequency discriminator according to the present invention, and FIG. 3 is a block circuit diagram of a frequency discriminator according to the present invention. A block circuit diagram showing another embodiment is shown in FIG. 4, which is a block circuit diagram of a conventional frequency discriminator. 12... Monotone function circuit, 13, 14... Logarithmic amplifier, 15... Differential amplifier, 17... Low pass filter, 20... Active filter.
Claims (1)
第1の対数増幅器と、前記入力信号が入力され出
力信号が該入力信号の周波数に対して単調関数と
なる特性を有する単調関数回路と、前記第1の対
数増幅器と同一の増幅利得を有し、前記単調関数
回路の出力信号が入力される第2の対数増幅器
と、前記第1および第2の対数増幅器の出力信号
の差分を増幅して前記入力信号の周波数の大きさ
に対応する信号を出力する差動増幅器とを具えた
ことを特徴とする周波数弁別器。1 a first logarithmic amplifier having a predetermined amplification gain and into which an input signal is input; a monotonic function circuit into which the input signal is input and which has a characteristic that an output signal is a monotone function with respect to the frequency of the input signal; a second logarithmic amplifier having the same amplification gain as the first logarithmic amplifier and into which the output signal of the monotonic function circuit is input; and a second logarithmic amplifier that amplifies the difference between the output signals of the first and second logarithmic amplifiers. and a differential amplifier that outputs a signal corresponding to the frequency magnitude of the input signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14448484A JPS6124312A (en) | 1984-07-13 | 1984-07-13 | Frequency discriminator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14448484A JPS6124312A (en) | 1984-07-13 | 1984-07-13 | Frequency discriminator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6124312A JPS6124312A (en) | 1986-02-03 |
| JPH0152922B2 true JPH0152922B2 (en) | 1989-11-10 |
Family
ID=15363387
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14448484A Granted JPS6124312A (en) | 1984-07-13 | 1984-07-13 | Frequency discriminator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6124312A (en) |
-
1984
- 1984-07-13 JP JP14448484A patent/JPS6124312A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6124312A (en) | 1986-02-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| SU593678A3 (en) | Device for adjusting high frequency tone | |
| JPS5931048Y2 (en) | low noise amplifier | |
| JPH0152922B2 (en) | ||
| JPH0424882B2 (en) | ||
| JP3179838B2 (en) | Noise detection circuit | |
| US4447772A (en) | Temperature stable pulse counting FM detector | |
| JP2765879B2 (en) | Pilot signal removal circuit | |
| JPH0441524B2 (en) | ||
| JP2707476B2 (en) | FM detection circuit | |
| JP3234479B2 (en) | FM detection circuit | |
| JPS6013585B2 (en) | Signal compression/expansion device | |
| JP2754636B2 (en) | FM demodulator | |
| JPH0611632Y2 (en) | Automatic loudness control circuit | |
| JPH0727706Y2 (en) | Audio playback circuit | |
| JPS6214764Y2 (en) | ||
| JPS5816256Y2 (en) | Detection circuit of signal compression/expansion circuit | |
| JPS58213568A (en) | Circuit for correcting video clamp | |
| JP2711343B2 (en) | Pilot signal removal circuit | |
| JPS5811081Y2 (en) | audio circuit | |
| JPS5848812Y2 (en) | mixing equipment | |
| KR0135461B1 (en) | Amplifier with high input impedance | |
| JPS6326571B2 (en) | ||
| JPH0268516U (en) | ||
| Deboo et al. | Self-tuning bandpass filter | |
| JPH0752811B2 (en) | Quadrature detector |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |