Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JPH0157531B2 - - Google Patents
[go: Go Back, main page]

JPH0157531B2 - - Google Patents

Info

Publication number
JPH0157531B2
JPH0157531B2 JP15544878A JP15544878A JPH0157531B2 JP H0157531 B2 JPH0157531 B2 JP H0157531B2 JP 15544878 A JP15544878 A JP 15544878A JP 15544878 A JP15544878 A JP 15544878A JP H0157531 B2 JPH0157531 B2 JP H0157531B2
Authority
JP
Japan
Prior art keywords
load
terminal
control signal
power
switching transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15544878A
Other languages
Japanese (ja)
Other versions
JPS5578625A (en
Inventor
Takao Mizuno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP15544878A priority Critical patent/JPS5578625A/en
Publication of JPS5578625A publication Critical patent/JPS5578625A/en
Publication of JPH0157531B2 publication Critical patent/JPH0157531B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Electronic Switches (AREA)

Description

【発明の詳細な説明】 本発明は時計等の制御信号発生器を備えた負荷
の駆動回路に係り、特に複数の中で一方だけを時
計等から発生させた制御信号で駆動する同駆動回
路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a drive circuit for a load equipped with a control signal generator for a watch or the like, and particularly relates to a load drive circuit that drives only one of a plurality of loads with a control signal generated from a watch or the like. .

一般に時計を備えたラジオ付テレビ受像機等の
電子機器において上記時計からの制御信号によつ
て上記電子機器、例えばラジオの低周波回路を駆
動する方式が多く採用されているが、複合製品即
ちラジオを内蔵したテレビ受像機で時計からの制
御信号によつてラジオの低周波回路のみを駆動す
る構成は従来多くのスイツチを必要としていた。
Generally, in electronic equipment such as a television receiver with a radio equipped with a clock, a method is often adopted in which a control signal from the clock drives the low frequency circuit of the electronic equipment, such as a radio. Conventionally, a configuration in which only the low frequency circuit of the radio was driven by control signals from the clock in a television receiver with a built-in clock required many switches.

そこで本発明は、上記欠点を除去したテレビ受
像機等の電子機器本体側の電源をOFFにしたと
きに、例えば警報装置などの負荷を作動可能にな
した新規な負荷駆動回路に関する。
SUMMARY OF THE INVENTION The present invention therefore relates to a novel load drive circuit that eliminates the above drawbacks and enables a load such as an alarm device to operate when the main body of an electronic device such as a television receiver is turned off.

以下図面に従つて本発明を説明すると、1は第
1直流電源、2,2′は電源スイツチ、3は第1
負荷、4は第2負荷、5は時計回路等制御信号を
発生する制御信号発生器、6はスイツチング素子
としてのダイオード、7はスイツチング手段とし
てのスイツチングトランジスタ、8は結合コンデ
ンサ、9は制御信号端子、10は第2直流電源を
示す。
The present invention will be described below with reference to the drawings. 1 is a first DC power supply, 2 and 2' are power switches, and 3 is a first DC power supply.
4 is a second load, 5 is a control signal generator that generates a control signal such as a clock circuit, 6 is a diode as a switching element, 7 is a switching transistor as a switching means, 8 is a coupling capacitor, 9 is a control signal Terminal 10 indicates a second DC power supply.

次に本発明の動作について説明すると、電源ス
イツチ2,2′のAとA′、BとB′及びCとC′は
各々不動作状態即ちオフ位置、動作状態即ちオン
位置、及び制御信号発生器により自動的にタイマ
ー動作させるオート位置を示し、先ずオフ位置即
ち電源スイツチ2,2′がA−A′位置のとき、制
御信号発生器5として設けた時計は第2直流電源
から電源が供給され、第1負荷及び第2負荷4は
電源が断たれている。従つて制御信号発生器5は
計時動作を行つている。
Next, to explain the operation of the present invention, A and A', B and B', and C and C' of the power switches 2 and 2' are respectively in the inoperative state, that is, the OFF position, the operating state, that is, the ON position, and the control signal generation. First, when the power switch 2, 2' is in the OFF position, that is, the power switch 2, 2' is in the A-A' position, the clock provided as the control signal generator 5 is supplied with power from the second DC power supply. The first load and the second load 4 are powered off. Therefore, the control signal generator 5 performs a timing operation.

電源スイツチ2,2′をオン位置即ち電源スイ
ツチ2,2′をB−B′に切換えると、第1負荷3
及び第2負荷4は第1直流電源1によつて電源が
供給され、動作状態となる。このときダイオード
6はオンとなり、一方スイツチングトランジスタ
7はオフとなつている。制御信号発生器5として
設けた時計は第2直流電源10からの電源が供給
されている。
When the power switches 2, 2' are switched to the on position, that is, the power switches 2, 2' are switched to B-B', the first load 3
The second load 4 is supplied with power by the first DC power supply 1 and becomes operational. At this time, diode 6 is on, while switching transistor 7 is off. A clock provided as a control signal generator 5 is supplied with power from a second DC power supply 10.

次に電源スイツチ2,2′をオート位置即ちC
−C′に切換えると、第1負荷3は制御信号9に制
御信号が加わらないときはスイツチングトランジ
スタ7がオフ状態で、第1負荷3及び第2負荷4
はオフに保たれる。制御信号端子9に制御信号
Vcが加わると、スイツチングトランジスタ7は
上記制御信号Vcによりパルス期間オン、それ以
外はオフ(一例として数10分の1秒のデユーテ
イ)でスイツチングし、第1負荷3は上記パルス
期間動作状態となり、結合コンデンサ8を通して
上記第1負荷3は上記制御信号Vcにより制御さ
れる。
Next, turn the power switches 2 and 2' to the auto position, that is, C.
-C', when the first load 3 is not applied to the control signal 9, the switching transistor 7 is in the off state, and the first load 3 and the second load 4
is kept off. Control signal to control signal terminal 9
When Vc is applied, the switching transistor 7 is turned on for the pulse period by the control signal Vc and turned off for the rest of the time (as an example, a duty of several tenths of a second), and the first load 3 is in the operating state for the pulse period. , the first load 3 is controlled by the control signal Vc through the coupling capacitor 8.

一例としてラジオ付テレビジヨン受像機の場合
上記第1負荷3として低周波増幅回路を、第2負
荷4として該低周波増幅回路以外の回路即ちテレ
ビ受像回路である水平偏向回路及び垂直偏向回路
等を設けておくと、上述の通り制御信号端子9に
制御信号発生器5からの制御信号(例えばアラー
ム信号)が加わると、第1負荷3は該制御信号に
よる断続音が再生されることになり、アラーム機
能として現われる。
As an example, in the case of a television receiver with a radio, the first load 3 is a low frequency amplification circuit, and the second load 4 is a circuit other than the low frequency amplification circuit, that is, a horizontal deflection circuit, a vertical deflection circuit, etc. which are the television receiver circuit. If provided, as described above, when a control signal (for example, an alarm signal) from the control signal generator 5 is applied to the control signal terminal 9, the first load 3 will reproduce an intermittent sound due to the control signal. Appears as an alarm function.

以上の通り本発明によれば、複数の負荷を備え
た機器の特定の負荷のみを上記制御信号発生器か
らの制御信号により駆動させる場合に簡単な構成
で事足り、特に時計及びラジオ付テレビ受像機に
本発明は効果大である。
As described above, according to the present invention, a simple configuration is sufficient when only a specific load of a device equipped with a plurality of loads is driven by a control signal from the control signal generator, and in particular, a clock and a television receiver with a radio. The present invention is highly effective.

【図面の簡単な説明】[Brief explanation of drawings]

図面は本発明の負荷駆動回路を示す。 主な図番の説明、1…第1直流電源、2,2′
…電源スイツチ、3…第1負荷、4…第2負荷、
5…制御信号発生器、6…スイツチングダイオー
ド、7…スイツチングトランジスタ、10…第2
直流電源。
The drawing shows a load driving circuit of the invention. Explanation of main drawing numbers, 1...1st DC power supply, 2, 2'
...power switch, 3...first load, 4...second load,
5... Control signal generator, 6... Switching diode, 7... Switching transistor, 10... Second
DC power supply.

Claims (1)

【特許請求の範囲】[Claims] 1 第1及び第2の電極を有する直流電源と、前
記第1及び第2の電極に各々可動端子が接続さ
れ、かつ各々少なくとも第1及び第2の固定端子
を有する第1及び第2の電源スイツチと、共通接
続した前記第1の電源スイツチの第1及び第2の
固定端子に一方の端子が接続された第1及び第2
の負荷と、前記第1の負荷の他方の端子と前記第
2の電源スイツチの第1の端子との間にコレク
タ・エミツタ路が接続されたスイツチングトラン
ジスタと、前記第1及び第2の負荷の各他方の端
子との間に接続されたスイツチングダイオード
と、前記スイツチングトランジスタのベース側に
結合された制御信号発生器とより成り、前記第2
の電源スイツチの第2の端子と前記第2の負荷の
他方端子をアースに接続し、前記第1及び第2の
電源スイツチにより前記第1及び第2の負荷を同
時に駆動するか又は前記第1の負荷を前記制御信
号発生器の出力により駆動することを特徴とした
負荷駆動回路。
1. A DC power source having first and second electrodes, and first and second power sources each having a movable terminal connected to the first and second electrodes, and each having at least a first and a second fixed terminal. switch, and first and second power switches, one terminal of which is connected to the first and second fixed terminals of the first power switch that are commonly connected.
a switching transistor having a collector-emitter path connected between the other terminal of the first load and a first terminal of the second power switch; and the first and second loads. a switching diode connected between each other terminal of the switching transistor, and a control signal generator coupled to the base side of the switching transistor;
The second terminal of the power switch and the other terminal of the second load are connected to ground, and the first and second loads are simultaneously driven by the first and second power switches, or the first and second loads are simultaneously driven by the first and second power switches. A load driving circuit, characterized in that the load is driven by the output of the control signal generator.
JP15544878A 1978-12-08 1978-12-08 Load driving circuit Granted JPS5578625A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15544878A JPS5578625A (en) 1978-12-08 1978-12-08 Load driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15544878A JPS5578625A (en) 1978-12-08 1978-12-08 Load driving circuit

Publications (2)

Publication Number Publication Date
JPS5578625A JPS5578625A (en) 1980-06-13
JPH0157531B2 true JPH0157531B2 (en) 1989-12-06

Family

ID=15606253

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15544878A Granted JPS5578625A (en) 1978-12-08 1978-12-08 Load driving circuit

Country Status (1)

Country Link
JP (1) JPS5578625A (en)

Also Published As

Publication number Publication date
JPS5578625A (en) 1980-06-13

Similar Documents

Publication Publication Date Title
US4352091A (en) Radio pager having optional annunciating means
CA2084205A1 (en) Vehicle Horn with Electronic Solid State Energizing Circuit
JPH0363262B2 (en)
JPH0263223A (en) Remote controller
GB1219557A (en) Single wire control system
JPH0157531B2 (en)
KR950003281Y1 (en) Remote control transmiting device
US4352169A (en) Electronic timepiece
JP2527561B2 (en) Receiver with built-in switching regulator
KR0126220Y1 (en) Car Alarm
JPS5918765Y2 (en) FM-AM switching integrated circuit device
JPH0516656Y2 (en)
JPH0339955Y2 (en)
JP2909125B2 (en) Switch circuit
JPS6235184Y2 (en)
JPH0129865Y2 (en)
JPS6128431Y2 (en)
JPH0524969Y2 (en)
JPS5915147Y2 (en) Malfunction prevention device for digital frequency display device with built-in clock
JPS6320677U (en)
JPS6223153Y2 (en)
JPS6114205Y2 (en)
JPS5813778U (en) Television receiver input signal switching device
JPH0626324B2 (en) Radio selective calling receiver having light emitting element blinking circuit
JPS6057299B2 (en) power control device