JPH0158588B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an address check method for reading and writing information at correct memory locations in a rotating magnetic memory device such as a magnetic disk or magnetic drum. FIG. 1 is an explanatory diagram showing the conventional structure of tracks and sectors of a rotating magnetic memory such as a magnetic disk or a magnetic drum. As shown in the figure, the rotating magnetic memory 3 is generally composed of a large number of tracks 4 provided along the circumferential direction of rotation. The starting point of each of these tracks 4 is indicated by an index clock position 1, which is detected by a magnetic method or an optical method. The memory device detects the position on the track 4 using the index clock position 1 as a reference. By the way, the length of the data block (also called sector) 5 recorded on the track 4 varies depending on each user, but unless the usage rate described later is taken into account, It is easier to handle the data in short blocks (sectors). Sector clock position 2 is a mark indicating the boundary of a short data block 5 on this track 4. The magnetic head H moves over the memory 3 in the direction of the arrow, making it possible to access any track. A conventional configuration (format) of such a track 4 is shown in FIG. 2c. That is, one sector 5 on the track is a timing signal generation source (usually a variable frequency oscillation circuit) necessary for information reproduction.
From the area (hereinafter sometimes abbreviated as the VFO pull-in area) 9 required for synchronous pull-in of the VFO (in which VFO is used), the address check section 7, the ID gap section 8a, the second VFO pull-in area 9a, the data section 6 and the gap section 8. It is completed. However, in the rotating magnetic memory 3, in order to write to or read from the sector 5 on the track 4, it is necessary to make the head H access the sector, but since the access error rate of this access system is high, The address check section 7 (in which information such as track addresses and sector addresses are recorded) prepared immediately before the data section 6 is checked to confirm that there are no access errors by the access system and to ensure reliability. I am planning to improve my level of performance. Specifically, an address check section 7 is recorded immediately before the data section 6 of each sector 5, and when writing, the address check section 7 is first read by a read command 10 (see FIG. 2D). After confirming the correctness, write command 11 (see FIG. 2E) is executed. When reading, first read command 10 (second
(see FIG. F), the address check section 7 is read, and after confirming that it is correct, the next read command 10 is executed. Note that FIG. 2A shows index clock position 1.
2B is a diagram showing the waveform of the index clock signal obtained when the sector clock position is detected. FIG. 2B is a diagram showing the waveform of the sector clock signal obtained when the sector clock position is detected. FIG. 3 is a block diagram showing the structure of a conventional address check system that performs the operations described with reference to FIG. 2. In the same figure, 12 is
CPU (Central Processing Unit), 13 is a controller, 1
4 is a rotating magnetic memory device. The controller 13 includes a sector clock counter 16, a command register 17, a sector matching circuit 18, a confirmation circuit 20, and an address information circuit 21. Now, when the controller 13 receives a memory access command 15 (including the track address and sector address to be accessed) from the CPU 12, it sets it in the command register 17 and causes the device 14 to perform a seek operation by means not shown. , upon receiving the seek end signal, the contents of the sector clock counter 16 that had been counting the index clock signal 1 and sector clock signal 2 sent from the device 14 and the commanded sector position (address) The sector matching circuit 18 detects the match between the read command 1 and the read command 1 of the address check section 7.
Give 0. Next, in response to this command, the read address information 19 is sent from the device 14, and this information is stored in the address information circuit 21. Next, this address information and command register 17 are
Check circuit 2 for matching with access information by CPU
0 is detected, and if they match, a write command 11 or read command 10 to the data section 6 is output to the device 14. This method as explained above is an excellent method in terms of reliability because it confirms the sector position to be accessed immediately before executing an instruction. However, as the number of sectors 5 on track 4 increases, A VFO pull-in processing area 9 required for pulling in a VFO (variable frequency oscillator), etc., which will be described later, and an ID gap part 8 necessary for discriminating address contents.
Since a is provided for each sector, it increases, resulting in a decrease in the data section 6, and the utilization rate of the data section of the memory as a whole decreases.
For example, assuming that the storage capacity is 10 Kbytes (1 byte = 8 bits) without the disk format, 20 bytes are required as the number of processing bytes required for the VFO pull-in area and the number of bytes required for the discrimination gap. shall be. In this case, one sector requires 20 bytes each for the address check section and the data section, so the total is

[Table] It becomes 40 bytes. At this time, the data section utilization rate according to the number of sectors is as shown in Table 1. From this table,
With the specification that one track contains 16 sectors, the utilization rate is 93.6%, which is not a big loss, but 128
In specifications that include sectors, the utilization rate is 48.8%, which causes a large loss and becomes a problem. By the way, regarding the necessity of the VFO lead-in area, in general, in magnetic recording, in order to discriminate the binary information, it is necessary to create a discrimination window pulse (a reference timing signal) proportional to the bit cell length. . The bit cell length differs depending on the number of rotations of the rotating memory during writing and the number of revolutions during reading.
A discrimination window pulse synchronized with the rotation speed and written data is required, and a VFO (variable frequency oscillator) circuit is used for this role. Basically, this VFO circuit follows low frequency fluctuations well, and has integral characteristics against high fluctuations (noise jitter), so when it is tuned in (tuned), it follows a certain period of time (on the track) number of bytes) is required. The first VFO retraction area 9 in FIG. 2c is
This is necessary for reading the next address check section 7, and the second VFO lead-in area 9a is necessary for writing to and reading from the data section 6. This invention was made to solve the above-mentioned drawbacks in the prior art, namely, the problem that when the number of sectors in a track is increased, the effective utilization rate of the data section decreases. An object of the present invention is to provide an address check method for a rotating magnetic memory device in which the effective utilization rate of the data section does not decrease significantly even when the number of sectors is increased. In order to achieve the above object, the present invention eliminates the first VFO lead-in area and address check section in each sector, and writes the track address and sector "0" immediately after the index clock position that is the starting point of each track. An identification sector (ID sector) containing an initial address part in which the address of the first sector (the first sector) is recorded is provided, and the sector "0"
In each subsequent sector, an address section including a track address and each sector address is added between the beginning of the data section and the second VFO pull-in area. As a result, when performing a write, the address part of the sector immediately before the sector to be written (ID sector if writing to the first sector) is read, indirectly checked from this, and at the same time By checking the distance interval to the target sector, you can prevent erroneous writing to the wrong track or sector, and when reading, by checking the address part of the sector to be directly executed, you can prevent writing from the correct track and sector. Reads can be performed. Therefore, since the address check section is not provided independently in each sector, the first address check section that was associated with the address check section is
Since the need for a VFO pull-in area is eliminated and the number of bytes to process pull-in is halved, the utilization rate of the data section is improved accordingly, and the object of the present invention can be achieved. Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 4 is a timing chart similar to FIG. 2, showing a track format according to the present invention, read signal waveforms, and signal waveforms of read and write commands related thereto. FIG. 4c is a diagram showing the track format, so this will be referred to first. Each track is provided with an identification sector (ID sector) 22 between its starting point, index clock position 1, and first sector clock position 2, in which a track address and the address of sector "0" are written. The ID sector 22 includes a VFO lead-in area a and an address part b (track address and sector “0”).
address) and a gap part C. Next, the first sector (sector “0”) 23 is
It consists of a VFO lead-in area 9a, an address area 7, a data area 6, and a gap area 8, hereinafter referred to as the second sector 2.
The subsequent sectors after VFO 4 similarly consist of a VFO lead-in area 9a, an address check area 7, a data area 6, and a gap area 8. Therefore, when writing data to the first sector 23, first issue a read command 10 (see FIG. 4D) for the ID sector 22 from the end of the index clock position 1, and
2, read the VFO lead-in area a and the address part b of the ID sector 22, check whether the address of the next sector 23 is correct, and if it is correct, write the write command 11a of the first sector 23 (see Fig. 4E). and VFO lead-in area 9a in the first sector 23,
The respective information is written in the address section 7 and the data section 6. Next, when writing data to the second sector 24,
Issue an address section read command 10 (see FIG. 4F) from the sector clock signal 2 of the first sector 23, read the VFO lead-in area 9a of the first sector 23 and the address section 7 of the first sector, and check whether the address is correct. If it is correct, issue a write command 11b (see FIG. 4G) for the second sector 24 from the next sector clock signal 2, and write the VFO lead-in area 9a, address section 7, and data in the second sector 24. Write each piece of information in section 6. Of course, if the interval between the first sector clock signal 2 and the next sector clock signal 2 is measured and confirmed at the same time, the reliability against erroneous writing can be further improved. Regarding the Nth sector, the write command is issued after reading and confirming the previous (N-1)th sector as described above. In the case of reading, issue read command 10 (see Figure 4H) during the sector you want to read (for example 23), and then
While recognizing the address part 7 of sector 3,
The data section 6 of No. 3 is read. If an explanation is added, for example, the second sector 24
When writing to the sector 24, it is impossible to read the address field 7 of the sector 24 and confirm that it is correct, and then immediately start writing to the data field 6 that follows. Read the address part of the previous sector to confirm that the address of the next sector is correct, and then write to the sector. Since there is no sector before the first sector 23, an ID sector 22 is provided in its place to perform the same function as described above. When reading,
Unlike when writing, once you read the address part of the sector and confirm that it is correct, you can just continue reading the following data part, so there is no need to read and check the address of the previous sector. By doing as described above, it is possible to read and write to the correct track and sector without independently providing an address check section in each sector, and furthermore, the utilization rate of the data section is improved. By the way, in the specification that includes 128 sectors in one track,
The utilization rate is 74.4%, which is much higher than the 48.8% achieved by the conventional method. Therefore, according to this method, the utilization rate of the data section can be dramatically improved and accurate addressing can be maintained without reducing the data throughput during reading.

[Brief explanation of drawings]

Fig. 1 is an explanatory diagram showing the conventional structure of tracks and sectors of a rotating magnetic memory, Fig. 2 is a timing chart showing the track format and related read signal waveforms, and signal waveforms of read and write commands. Fig. 3 4 is a block diagram showing the configuration of a conventional address check system, and FIG. 4 is a timing chart showing the track format according to the present invention, the read signal waveforms related thereto, and the signal waveforms of read and write commands. Code explanation, 1... Index clock position,
2... Sector clock position, 3... Rotating magnetic memory, 4... Track, 5... Data block (sector), 6... Data section, 7... Address section, 8
...Gap part, 8a...ID gap part, 9...
...VFO lead-in area, 9a... Second VFO lead-in area, 10... Read command, 11... Write command,
12...CPU, 13...Controller, 14...
...Rotating magnetic memory device, 15...Access command,
16...Sector clock counter, 17...Command register, 18...Sector matching circuit, 19...
... Address information, 20 ... Confirmation circuit, 21 ... Address information circuit, 22 ... ID sector.

Claims (1)

[Claims] 1. In an address check method for checking the address of a sector on a track in a rotating magnetic memory device such as a magnetic disk or a magnetic drum, each sector is provided with synchronization of a timing signal generation source necessary for reproducing information. Area required for retraction (hereinafter referred to as
(abbreviated as VFO lead-in area) 9a, and an address section 7 containing track addresses and sector addresses.
and data section 6 are provided in that order, and at the beginning of the first sector 23 on the track, an identification sector (ID sector) 22 including a VFO lead-in area a for the beginning and an address section b of the sector 23 is provided. When executing a write to the data section, instead of checking the sector by reading the address section 7 of the sector immediately preceding the sector containing the data section or the address section b of the ID sector, when executing the read,
A method for checking an address in a rotating magnetic memory device, characterized in that the sector is checked by reading the address part 7 in the sector.