JPH0210439B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an electronic musical instrument that can be played with different tones for each key range.

[Prior art]

2. Description of the Related Art Conventionally, electronic musical instruments have been provided in which a keyboard is divided into several regions and each region can be played with a different tone color. For example, the electronic musical instrument shown in Japanese Patent Application Laid-Open No. 56-36697 has a keyboard that can be divided into two key ranges and the sound channel can be divided and used so that the sounds in both key ranges are produced with different tones. I have to.

Furthermore, JP-A No. 56-106286 focuses on the fact that the number of simultaneous pronunciations for each key range is different depending on the performance mode, and it is possible to change the sound generation channel assigned to each key range for each performance mode. It is configured.

Furthermore, in JP-A-57-122495, the number of sounding channels assigned to each key range can be increased or decreased by similarly reversing the correspondence between each keyboard part and each sounding channel group by operating a switch. There is.

[Problems with conventional technology]

However, in the conventional configuration, although it is possible to increase or decrease the number of sound generation channels for each key range, the maximum number of sound generation channels for each key range is limited, and the number of sound generation channels for each range is not so large. This means that it is impossible to simultaneously output more sounds than the number of sound channels assigned to one key range, even if the sound channels assigned to other key ranges are not in use. However, this has the disadvantage that it is not possible to perform a performance in which a large number of tones are generated simultaneously only from one key range, and that only extremely limited performance forms can be created.

[Purpose of the invention]

The present invention has been made in view of these conventional problems, and it is an object of the present invention to provide an electronic musical instrument that is capable of producing the maximum number of sounds in each key range and that can accommodate all types of performance.

[Key points of the invention]

The present invention has a plurality of musical tone generation channels,
In an electronic musical instrument equipped with musical tone creation means that creates musical tones based on pitch information assigned to this musical sound generation channel, the input pitch information is inputted into the musical tones in the order of input, regardless of the range to which the pitch information belongs. The present invention includes an allocation means for allocating to a tone generation channel, and a tone color allocation means for allocating tone color information corresponding to a tone range to which the pitch information belongs to the musical sound generation channels to which each pitch information is allocated by the allocation means. It is characterized by what it did. As a result, regardless of the divided key range, the maximum number of sound generation channels can be obtained for each key range.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings. The keyboard 1 has a plurality of keys, and the output of each key is input to a CPU (central processing unit) 2 and a key code size comparison section 3. The CPU 2 controls all operations of this electronic musical instrument and is composed of a microprocessor and the like. It also receives outputs from a switch input section 4, which includes switches for controlling timbre, rhythm, etc., and a timbre register section 5.

On the other hand, the key split switch 6 is a switch that instructs the keyboard 1 to be divided into a treble side and a bass side at an arbitrary key position and to set different tones for each side, and the output of the switch 6 is sent to the split control section. Enter 7. In response, the split control section 7 gives a control signal to the key split code generation section 8 to set a key split code indicating the pitch in an internal KSP Reg (described later), and outputs the output from this KSP Reg to the key. The code is given to the code size comparison section 3. This comparing section 3 compares the pitch relationship between the signal from the keyboard 1 and the key split chord in the key split performance mode,
As a result, a signal C is given to the CPU2. The timbre register section 5 is an RTONE controller under the control of the CPU 2, which sets tones corresponding to the treble side and the bass side selected from among the tones preset in the tone register 9 (20 types in this embodiment). Reg,
It has LTONE Reg and a number (1~
20) has a CTONE Reg that stores it.
In this embodiment, there are eight musical tone creation channels using a time-sharing processing method, and the tone can be set independently for each channel. It serves as a table to indicate the tone,
The necessary tone numbers (1 to 20) are given to CPU2. Then, based on this tone number, CPU2
The corresponding tone data is obtained from the TONE register 9.

The CPU 2 has a register group 11 including various registers to be described later, and is used for various calculations. Then, a control signal for creating a musical tone corresponding to the input signals from each section is given to the musical tone generating section 12, whereby a musical tone signal is generated and emitted as a musical tone via an amplifier 13 and a speaker 14.

Next, the timbre-related switches on the switch input section 2 will be explained with reference to FIG. In the case of the electronic musical instrument of this embodiment, the data for each of the 20 types of tones that are preset in the tone creation mode by the switch operation described below in the tone register 9 will be explained conceptually as shown in FIG. As can be seen from the illustrated memory structure of the tone register 9, it consists of three types of envelope data: volume, harmonic component suppression, and pitch, and waveform data indicating a fundamental waveform. In the memory configuration example of the tone register 9 shown in FIG. 3, there are n types of volume envelope data and m types of waveform envelope data.
There are l types of pitch envelope data and k types of basic waveforms, and registers with a corresponding capacity are prepared. There are x types of tones (actually x = 20), each consisting of a total of 4 pointers for the volume, harmonic component suppression, pitch envelope data and waveform data, and the switch operation described below. are arbitrarily selected and memorized.

So, returning to Figure 2, basic waveform memory selection
SW, 16 is a switch for presetting the waveform data of the 10 kinds of basic waveforms in the case of k=10 described above into the corresponding registers (1 to k) of the tone register 9, and also a switch for the basic waveform generation section switch 1.
7 is a switch for specifying one of five types of basic waveforms. Switch 17A, 11, 21, 3
Switches 1, 41, and 51 designate one period in the first half, and switches 17B, 12, 22, 32, 42, and 52 designate one period in the second half. here,
Among the numbers written on the switches in switches 17A and 17B, the numbers in the 10s are the waveforms shown in FIG. 4, 1, the numbers in the 20s are the waveforms shown in FIG.
The number series is the waveform shown in Figure 4 3, the 40s is the waveform shown in Figure 4 4, and the 50s is the waveform shown in Figure 4.
FIG. 4 represents the waveform shown in FIG. The switch 17C is an octave modulation switch that alternately specifies the waveform specified in the first half and the waveform specified in the second half every cycle. When this switch 17C is off, only the waveforms specified in the first half are specified. The switch 16A is a write switch for writing the contents set by the switch 17 into the switch 16.

FIG. 4 shows the shapes and data of five types of waveforms that are the basis for forming the ten types of basic waveforms. Also, Figure 5 shows the data structure of the waveform data of the basic waveform, where the upper 3 bits of WAVE FORM are the 3-bit data set for the waveform in Figure 4, and the next 3-bit OCT.
The 3-bit data shown in FIG. 4 is also set for MODULATION WAVE FORM. The next 1-bit data is data indicating the presence or absence of OCT.MODULATION. Furthermore, 1 bit of the LSB is not used,
becomes invalid.

Returning to Figure 2, volume envelope memory selection
SW 18, harmonic component suppression envelope memory selection SW 19, and pitch envelope memory selection switch 20 are used for the cases where n=10, m=10, and l=10, respectively. This is a switch for specifying registers 1 to n, 1 to m, and 1 to l that store each pitch envelope data.The actual operation is first to adjust the volume, harmonic component suppression, and registers 1 to 1 to store each pitch envelope data. Specify any one of switches 18 to 19, and then select the rate value designation slide SW 21 and level value designation slide SW 21, which are provided eight times each corresponding to the eight steps 0 to 7.
22. Operate the switch at each step of the sustain point designation SW 23, and then turn on the write SW 24, 25, or 26 corresponding to the currently selected envelope of volume, harmonic component suppression, or pitch.

FIG. 6 shows the volume, harmonic component suppression,
This shows the waveform of each envelope of the pitch, and slide SW2
It consists of eight broken line parts arbitrarily formed by operations 1 and 23. The height of the end of the broken line part of the envelope (indicated by points A to H in the figure) is the level value, and the distance between each level value is expressed by the rate value (the slope of the broken line part). Ru.

FIG. 7 shows the data structure of the envelope data. In the figure, A to H represent data storage units corresponding to points A to H at the end of the envelope waveform in FIG. 6, each having a capacity of 18 bits. has. The MSB of the upper 8 bits stores 1-bit data indicating the direction of the rate (direction of inclination of the broken line), and becomes the direction when it is "0" and the direction when it is "1". The next 7 bits are rate value data, and the MSB of the lower 8 bits is 1-bit data representing sustain information.
indicates that it is not the sustain point. The next 7-bit data indicates the level value. In addition, the direction of the rate mentioned above (〓, 〓)
is automatically determined from the change in level value.

Figure 8 shows an example of an actual envelope, and Figure 9 shows an example of an actual envelope.
The figure shows an example of actual data of the envelope shown in FIG. In this example, point F is the sustain point, and the envelope level of this key remains constant until the next key-off.
At this time, the value of point G becomes irrelevant.

Returning again to FIG. 2, the timbre memory selection switch 27 specifies the registers (registers 1 to x in FIG. 3) in the tone register 9 that store data for 20 types of timbres in the case of x=20. switch, and in the tone creation mode, data of the tone currently selected by any combination of the switches 16 to 20 (waveform data of fundamental waveform, volume, harmonic component suppression) , pitch) are written into the registers 1 to x when the write SW 28 is turned on. In the normal performance mode, simply by turning on any one of the timbre memory selection SWs 27, the four pointers of the corresponding timbre data are read out from the registers 1 to x, and then based on these pointers, as shown in FIG. 1~n, 1~m, 1~
The data is read from each register 1, 1 to k and processed.

Next, the specific configuration of the musical tone creating section 11 will be explained with reference to FIG. In the figure, 30 is an interface through which data input/output is performed with the CPU 2, and the CPU 2 communicates with the volume envelope generation circuit 31, the harmonic component suppression envelope generation circuit 32, and the pitch envelope generation circuit 33 via this interface 30. For each envelope data consisting of the rate value, level value, etc. shown in FIG. 7 (as shown in FIG. 10, each data is divided into AMP Ramp, WAVE, Ramp, Freq,
(also called Ramp). Each envelope circuit 31, 32, 33 calculates the current value from the rate value and level value and transmits it to the corresponding EXP. (exponential) ROM 34, band limit circuit 35, frequency Give to ROM36. Furthermore, when the current value reaches the current rate value, each envelope circuit 31, 32, 33 generates an interrupt signal INT, sends it to the CPU 2 via the interface 30, and executes the next steps 0 to 7 (points). Data AMP for A to H)
Requests the output of Ramp, WAVE Ramp, and Freq.Ramp (however, in the case of the sustain point mentioned above, the interrupt signal INT is not output).

Freq ROM36 is pitch envelope circuit 3
Frequency information (phase angle information) according to the output from 3
FI is generated and applied to the band limit circuit 35 and phase generator 37. This phase generator 37 accumulates the phase angle information FI and provides the resulting data to a division circuit 38. Also,
The band limit circuit 35 prevents the occurrence of aliasing distortion based on the sampling theorem based on the output from the waveform envelope circuit 32 and the phase angle information, and provides its output to the division circuit 38. Further, the division circuit 38 is also given predetermined waveform type selection data sent from the CPU 2 via the interface 30 and the waveform generation circuit 39. and division circuit 38
performs division processing on each output from the phase generator 37, band limit circuit 35, and waveform generation circuit 39, accesses the wave generator 40 using the resulting data, generates waveform data, and multiplies it. The signal is sent to the circuit 41. As for the specific structure of the division circuit 38, it is possible to use an implementation circuit already proposed by the present applicant, for example, described in the patent application specification of Japanese Patent Application No. 57-221266.

Control data read from EXP and ROM is also input to this multiplication circuit 41, and the waveform data and control data are multiplied and the resultant data is provided to an accumulation circuit 42. This accumulation circuit 42
Every time the result data for 8 channels is accumulated, the accumulated data is given to the D-A converter via the DACI/F (D-A converter interface) 43, so that the synthesized musical tone is output to the speaker 14. The sound will be emitted from

Next, as shown in FIG. 11, the volume, harmonic component suppression, and pitch envelope circuits 31, 32, 3
The configuration of No. 3 will be specifically explained. Note that since these circuits 31 to 33 have the same configuration, the circuit shown in FIG. 11 is assumed to be, for example, the volume envelope circuit 31.

In the figure, 45 is a shift register group in which 8 stages of shift registers with a capacity of 8 bits are connected in parallel, and the level value sent from the CPU 2 via the transfer gate 46 is input in parallel to the first stage. . Note that the shift register group 45
This corresponds to the existence of an 8-channel musical tone creation system constructed by connecting 8 stages of shift registers in parallel. The same applies to other shift register groups to be described later.

The level value inputted to the first stage of the shift register group 45 is then shifted to the subsequent stage and output from the eighth stage, and is passed through the transfer gate 47 to the first stage.
It is returned to the stage and is applied to the B input terminal of the comparator 48. Also transfer gate 4
6 is controlled to open or close by applying a preset signal sent from the CPU 2 to its gate via an inverter 49, and the transfer gate 47 is controlled to open or close by directly applying the preset signal to the gate. Note that this preset signal is at the "0" level only when the level value is sent.

On the other hand, the rate value is input to the transfer gate group 50 via the transfer gate 51, and when outputted from the shift register group 50, it is returned to the shift register group 50 via the transfer gate 53, and the rate value is input to the adder/subtracter 53. It is also given to the B input terminal of . The opening and closing of the transfer gates 51 and 52 are controlled by applying the preset signal to the gates through the inverter 54 or directly.

Further, the output data (current bary) from itself is inputted back to the shift register group 55 via the transfer gate 56 and is also applied to the A input terminal of the adder/subtractor 53 . and adder/subtractor 5
The result data ANS1 of No. 3 is applied to the shift register group 55 via the transfer gate 57, and is also applied to the A input terminal of the comparator 48. The control terminal SUB of the adder/subtractor 53
The data of the MSB of the rate value output from the shift register group 50 (data indicating the direction of the rate) is input as a subtraction command, and when this subtraction command is "1", the subtraction is performed when it is "0". When the addition is performed. Further, the data of the MSB of the rate value is input as a comparison method selection command to the control terminal ≧ of the comparator 48, and when this comparison method selection command is “1”, if A≦B, the comparison result of the comparator 48 is input. Signal ANS2 is “1” and “0” if A>B. On the other hand, when the comparison method selection command is “0”, comparison result signal ANS2 is “1” if A≧B and “0” if A<B. . The comparison result signal ANS2 is then transferred to the transfer gate 56,
57 are applied to the gates directly or via an inverter 58 to control opening and closing, and are also applied to one end of a NAND gate 59. On the other hand, the MSB data (sustain information) of the level value output from the shift register group 45 is inverted at the other end of the NAND gate 59, and the output of the NAND gate 59 is the interrupt signal.
Sent to CPU2 as INT.

Next, various registers will be explained with reference to FIG. FIG. 12 shows registers provided in the register group 11. Each register OP in the diagram
Both Reg, WP Reg, and FP Reg are used for indexing each line (pointing to a channel).

That is, OP Reg holds the value of the channel where the key-on occurred first. WP Reg is a work pointer for a key assigner (this key assigner is a circuit that assigns channels to operation keys through arithmetic processing by the CPU 2). FP Reg retains the value of an empty line when it is found. FOUNDF Reg when there is an empty line
Each data is TRUE and FALSE when absent.
Set by CPU2.

Next, each register in FIG.
is a register within. 8-bit capacity NL Reg
(New Line status) indicates that the 0th bit, 1st bit, ..., 7th bit are channel 0, channel 1, respectively.
Channels, . . . , correspond to 7 channels, and when a new channel is designated, the corresponding bit is turned on. And every time the check of all lines is completed, NL
The contents of Reg are transferred to the corresponding bits of OL Reg, which will be explained next, in preparation for the next channel assignment. Then, the contents of each bit of NL Reg are turned OFF.

The OL Reg has a capacity of 8 bits and corresponds to channels 0 to 7 from the lower side, and the NL Reg
The data is then transferred and stored.

TL Reg (Trigger Line Status) similarly has a capacity of 8 bits and corresponds to channels 0 to 7 from the lower side. It turns ON when the key is on and turns OFF when the key is off.

The SC Reg (Scale Code) has eight registers with a capacity of 8 bits, and each register corresponds to channels 0 to 7 and stores the scale code of the key assigned to that channel.

CSC Reg (Current Scale Code) is set to the scale code of the currently key-on key.

In Figure 12 3, KSP Reg is a register that stores the key split position, RTONE Reg is a register that has a tone number that identifies the tone data corresponding to the right key, and LTONE Reg is the tone color that corresponds to the left key. The registers TONE0 to TONEn (n is up to 20), which are registers with tone numbers that identify data, are the registers in which the contents of the 20 types of tone data are set, and the registers CTONE0 to CTONE7 are
These registers correspond to channels 0 to 7, respectively. And the above CTONE0 to CTONE7 have the above
The contents of LTONE Reg or RTONE Reg are copied. That is, it shows the current tone color number of each line.

Next, taking as an example the case where the musical score shown in FIG. 17 is played, its operation will be explained with reference to the flowcharts shown in FIGS. 13 to 16. It is assumed that 20 types of tones have already been preset in the tone register 9 in the tone creation mode.

When the power switch is turned on and performance begins, initialization processing of steps S ₁ and S ₂ , initialization (1) and initialization (2), is performed. In the initialization (1), the flowchart shown in FIG. 15 is executed, and first, the TL, NL, and
The OL register is set to all channels OFF (step _I1 ). Next, SC Reg is cleared (step I ₂ ) and OP Reg is reset (step I ₃ ).

Next, the currently set key split position, for example the pitch of _C4 , is set in KSP Reg. In this case, since the output of the key split switch 6 is input to the split control section 7, the control section 7 gives a predetermined control signal to the key split code generation section 8 to control the key of pitch _C4 . output the code,
It is given to the key code size comparison section 3.

Next, the timbre data number of the right key (eg, flute) is set in RTONE Reg, and the timbre data number of the left key (eg, violin) is set in LTONE Reg (steps I ₅ and I ₆ ). In this case, of the tone memory selection switches 27 on the switch input section 4, those corresponding to the flute and violin are selected, respectively, and the registers in the CPU 2 are selected.
Set to RTONE Reg, LTONE Reg.

In the initialization (2), the data of the NL register is transferred to the OL register according to the flow shown in FIG. 16 (step N ₁ ), and then each channel of the NL register is set to OFF (step N ₂ ).

Next, CPU2 connects the keyboard 1 to the bus line BUS.
A key common signal is output to perform a key scan (step _S3 ). Therefore, the output of each key on keyboard 1 is input to CPU 2 (step S ₄ ).
The CPU 2 determines whether a key has been pressed or not from the data content (step _S5 ). Then, if it is determined that no key has been pressed, it is determined whether or not all keys have been scanned (step
S ₆ ), if "NO", return to step S ₃ and repeat steps S ₃ to S ₆ until all keys are scanned.

Next, if you press the keys of the first three simultaneous tones C ₂ , E ₂ , and G ₂ (all whole notes) shown in the musical score in Figure 18 at the same time, electrically, for example, the C ₁ key will be activated as the first on key. If detected in step _S5 , the key code _C1 is set in CSC Reg (step _S7 ). Also, OP Reg data “0”
is transferred to WP Reg (step S ₈ ) and further
Data "FALSE" is set in FOUND Reg (step _S9 ). And WP Reg data “0”
The process of step _S10 is performed to obtain the contents of SC Reg using as an index, and since this is the first key-on, there is no scale code for the 0 channel of SC Reg.

Next, proceed to step _S11 , check the match between the CSC Reg data "C ₂ " and the SC Reg data "0",
Since the answer is “NO”, proceed to step S ₂₁ and complete the WP Reg
Look at the contents of TL Reg (channel 0 is currently “OFF”) using the contents “0” as the index, and
It is determined whether the data of Reg is ON (step _S22 ). However, since it is "NO", proceed to step _S15 and check whether the data of FOUND Reg is "FALSE", but since it is "YES",
Proceed to step _S16 and set data "TRUE" in FOUNDF Reg. Also, data "0" of WP Reg is set to FP Reg (step _S17 ).

Next, WP Reg is incremented to "1" and it is determined whether the result is "8" (step _S18 ), but since it is not, the next step is
Proceed to S ₁₉ . Note that when WP Reg becomes "8", it is automatically returned to "0".

Next, in step S ₁₉ , WP Reg data “1”
It is judged whether or not it matches the data “0” that OP Reg has, and since it is “NO”, the next step is
Proceeding to _S10 , from then on, _{steps S19} , _S10 , _S11 , S ₂₁ , S ₂₂ , S ₁₅ , S ₁₆ ,
S ₁₇ , S ₁₈ , and S ₁₉ are repeated seven times. That is, during this time,
The value of WP Reg changes as 1, 2, 3, ..., 7, 0. Then it becomes "0" and opens at step S ₁₉
When a match of data "0" in Reg is detected, the process proceeds to step _S20 , where it is determined whether FOUNDF Reg is TRUE. The answer is ``YES'', and the process proceeds to step <sub>S23</sub> , where the data ``C ₂ '' of CSC Reg is stored in SC Reg using the content ``0'' of FP Reg as an index. That is, scale code C ₂ keyed on channel 0 of SC Reg has been registered.

Next, NL Reg is turned "ON" using the contents of FP Reg (channel 0) as an index, and therefore data "ON" is set in the 0th channel of NL Reg (step _S24 ). Then, TL using the contents of FP Reg (channel 0) as an index.
Set "ON" to the 0 channel of Reg (step _S25 ). Furthermore, OP Reg data “0”
Transfer to Reg (step _S26 ). This is an update of the key assigner's search start line pointer.

Next enter step S ₂₇ , CSC Reg and KSP
Determine the size relationship of each data in Reg. Therefore, CSC Reg is C ₂ , KSP Reg is C ₄ , and CSC<
Since it is related to KSP, proceed to step S ₂₈ .
Extract tone data using the contents of LTONE Reg as an index. and in CTONE Reg
The contents of LTONE Reg are set to CTONE0.
Then, violin tone data is extracted from the TONE register according to the contents of CTONE0, and sent to the musical tone creation section 12 (step _S29 ), and is also sent to the CSC.
The data of Reg, ie, the key code of _C2 , is also sent to the musical tone creation section 12 (step _S30 ). Then, the CPU 2 further gives a key-on instruction to the musical tone generating section 12 (step _S31 ), so that the musical tone generating section 12 starts creating a musical tone for the key of _C2 . The process then returns to step _S6 , where it is determined whether or not all keys have been scanned, and the process proceeds to step _S3 or step _F1 (key-off processing in FIG. 14, to be described later).

Next, if key E ₂ operated at the same time as key C ₂ is electrically detected, key code E ₂ is stored in CSC Reg through step S ₅ and steps S ₇ , S ₈ , and S ₉ . OP Reg data "0" is set in WP Reg, and data "FALSE" is set in FOUNDF Reg. and SC
Reg 0 channel data “C ₂ ” is obtained (step S ₁₀ ), then CSC Reg data “E ₂ ” and
It is determined that there is a discrepancy with the data "C ₂ " in SC Reg (step S ₁₁ ), and the process proceeds to step S ₂₁ . And T.L.
Reg 0 channel data “ON” is detected (step S ₁₂ ), and the process proceeds via step S ₂₂ to step S ₁₈
Then, WP Reg is incremented by 1 and becomes "1".

Next, due to the discrepancy between WP Reg ("1") and OP Reg ("0"), the process proceeds to step _S10 , where data of the first channel of SC Reg (now without scale code) is obtained, and there is a discrepancy with CSC Reg. is determined (step _S11 ), the data "OFF" of the first channel of TL Reg is read out, and the step is executed via step _S22 .
Proceed to _S15 . And by step S ₁₅ FOUNDF
Reg is determined to be FALSE, and data "TRUE" is written to FOUNDF Reg. Next, data "1" is set in FP Reg, and WP Reg is incremented by 1 to become "2" (step _S18 ).

Next, step _S19 sets the value of WP Reg to OP.
Steps S ₁₀ , S ₁₁ , S ₂₁ , S ₂₂ , S ₁₅ , S ₁₈ and S ₁₉ are repeated until the previous key-on pointer held in Reg is incremented to "0". Then, when WP Reg becomes “0”, the step
Proceeding to _S20 , the scale code _E2 is stored in the first channel of SC Reg at step _S23 (step _S23 ). Also, "ON" is set to the first channel of NL Reg (step _S24 ), and TL
The first channel of Reg is also set to "ON" (step _S25 ).

Next, data "1" from FP Reg is set in OP Reg (step S ₂₆ ), and in steps S ₂₇ ,
S ₂₈ , S ₂₉ , S ₃₀ , and S ₃₁ are executed in the same way as when key C ₂ is pressed. Therefore, the key tone of E ₂ is also started with the violin tone.

The same applies to C ₂ , E ₂ and the simultaneous operation key G ₂ , and this key G ₂ is assigned to the second channel. Therefore, data “2” is set in both OP Reg and FP Reg, and NL Reg and TL Reg are set to “2”.
Data “ON” is set in Reg, and SC
The scale code G ₂ is written on the second channel of Reg. As a result, musical tones C ₂ , E ₂ , and G ₂ are all emitted by the violin tone.

Next, if the dotted half note key of pitch C ₃ is turned on after one beat, the same key will be pressed for this key as well.
Similarly, C ₂ , E ₂ , G ₂ are processed as left keys, so in the third channel C ₂ ,
Together with E ₂ and G ₂ , the musical tones are emitted simultaneously with the tone of a violin.

The same goes for the next musical tone (G ₃ , E ₃ ).
Each musical tone is processed as a left key, and each musical tone is emitted simultaneously with the other C ₂ , E ₂ , G ₂ , and C ₃ using the violin tone in the fourth and fifth channels, respectively. Therefore, 6 channels out of a total of 8 channels of the musical tone creation system are used for the left key, and the remaining 2 channels (6th and 7th channels) are empty channels.

Next, when the first measure ends, all six keys are turned off. In this case, for example, to explain the key-off process of _C2 , after the process of step _S6 , the flowchart of FIG. 14 is executed.
That is, WP Reg is cleared (step F ₁ )
The key _C2 assigned to the 0 channel is specified, and then in step _F2 , data of each 0 channel of TL Reg, OL Reg, and NL Reg is obtained by WP Reg. and TL Reg,
It is determined whether each data of NL Reg and OL Reg is "ON" or not, and each data is "ON", "OFF",
When it becomes “OFF”, it is assumed that the key is off and the step is turned off.
Proceed to step F ₆ via F ₃ , F ₄ , F ₅ and TL Reg
0 channel is turned off. Then, a key-off instruction is given to the musical tone creation section 12, and as a result, C ₂
The musical tone is muted (step _F7 ). Then W.P.
Reg is incremented to "1", 1 channel is specified, and the value of WP Reg is "8"
It is determined whether or not this is the case, and the process returns to step _F2 , where key-off processing is executed for the key _E2 assigned to one channel.

Thereafter, G ₂ , C ₃ , G ₃ , and E ₃ are also keyed off in the same way until WP Reg further reaches 2 to 8.

Even after entering the second measure, the channel assignment operation is the same, and the simultaneous operation keys of B ₂ , D ₃ , and F ₃ are
Assigned to channels 6, 7, and 0. When the next key, _A3, is turned on, it is assigned to channel 1, and four musical tones are emitted in the tone of a violin.

Next, when the G ₄ key is turned on, this key belongs to the keys on the right, so the processing from steps S ₃ to _{S 26} for assigning 2 channels to this key is the same as described above, but the steps In S ₂₇
It is determined that the CSC Reg data (G ₄ ) is larger than the KSP Reg data (C ₄ ), that is, it is the right key, and the process proceeds to step _S32 . This step _S32 corresponds to step _S28 , and the processing for LTONE Reg in step _S28 is performed by RTONE
I just changed the processing to Reg. Therefore, this key G ₄ is created with a flute tone in the musical tone creation system of the second channel, and B ₂ , D ₃ ,
The violin tones of F ₃ and A ₃ and the flute tones of G ₄ are emitted simultaneously. The channels are then sequentially assigned in the order in which the keys are pressed, regardless of the number of keys pressed on the left and right keys based on the key-split pitch _C4 . The same applies hereafter.

〔Effect of the invention〕

As explained above, this invention allocates channels in accordance with the order of input pitches, regardless of the divided key ranges, assigns tones corresponding to each key range to the assigned sounding channels, and Since the musical tones are emitted by , the number of sound generation channels up to the maximum number of sound waves is possible for each key range. Therefore, it is possible to perform a performance in which the number of simultaneous sounds is concentrated only in one key range, and there is an advantage that it can be adapted to any performance format.

[Brief explanation of drawings]

FIG. 1 is an overall circuit diagram of an electronic musical instrument according to an embodiment of the present invention, FIG. 2 is a switch component of the switch input section 4, FIG. 3 is a memory configuration diagram of a tone register, and FIG. 4 is a waveform of a basic waveform. Figure 5 is a data configuration diagram of the waveform data of the basic waveform, Figure 6 is an envelope waveform diagram, Figure 7 is its data configuration diagram, and Figure 8 is a data configuration diagram of the waveform data of the basic waveform.
The figure shows a specific example of an envelope waveform, FIG. 9 is a diagram of its data contents, and FIG. 10 is a diagram of the musical tone creation section 12.
11 is a circuit diagram of an envelope circuit, 12 Figures 1 to 3 are diagrams explaining various registers, Figures 13 to 16 are flowcharts, and Figure 17 is a diagram showing a musical score. It is. 1...Keyboard, 2...CPU, 3...Key code size comparison section, 4...Switch input section, 5...
... Tone register section, 6 ... Key split switch, 7 ... Split control section, 8 ... Key split code generation section, 9 ... Tone register, 11
... Register group, 12 ... Musical tone creation section, 13 ...
Amplifier.

Claims (1)

[Scope of Claims] 1. In an electronic musical instrument that has a plurality of musical sound generation channels and is equipped with a musical tone creation means that creates musical tones based on pitch information assigned to the musical sound generation channels, input pitch information is provided. an allocation means for allocating pitch information to the musical sound generation channels in the order of input regardless of the pitch range to which the pitch information belongs; An electronic musical instrument characterized by comprising: tone color allocation means for allocating tone color information corresponding to a musical range to which it belongs;