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JPH0210578B2 - - Google Patents
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JPH0210578B2 - - Google Patents

Info

Publication number
JPH0210578B2
JPH0210578B2 JP59072425A JP7242584A JPH0210578B2 JP H0210578 B2 JPH0210578 B2 JP H0210578B2 JP 59072425 A JP59072425 A JP 59072425A JP 7242584 A JP7242584 A JP 7242584A JP H0210578 B2 JPH0210578 B2 JP H0210578B2
Authority
JP
Japan
Prior art keywords
heat sink
protrusion
power transistor
groove
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59072425A
Other languages
Japanese (ja)
Other versions
JPS60216572A (en
Inventor
Kikuo Isoyama
Akira Kazami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP59072425A priority Critical patent/JPS60216572A/en
Publication of JPS60216572A publication Critical patent/JPS60216572A/en
Publication of JPH0210578B2 publication Critical patent/JPH0210578B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/02Manufacture or treatment of conductive package substrates serving as an interconnection, e.g. of metal plates
    • H10W70/027Mechanical treatments, e.g. deforming, punching or cutting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07351Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/381Auxiliary members
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/381Auxiliary members
    • H10W72/387Flow barriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/127Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed characterised by arrangements for sealing or adhesion

Landscapes

  • Shaping Metal By Deep-Drawing, Or The Like (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【発明の詳細な説明】 (イ) 産業上の利用分野 本発明はヘツダーの製造方法、特に混成集積回
路に組込むパワートランジスタの固着に用いるヘ
ツダーの製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a method for manufacturing a header, and more particularly to a method for manufacturing a header used for fixing a power transistor to be incorporated into a hybrid integrated circuit.

(ロ) 従来技術 従来の混成集積回路は第1図に示す如く、セラ
ミツクあるいは表面を陽極酸化したアルミニウム
等の絶縁基板1と、該基板1上に任意の形状に設
けた導電路2と、該導電路2上に半田で固着され
たヒートシンク3と、ヒートシンク3に固着され
たパワートランジスタ4と、パワートランジスタ
4を被覆保護する封止樹脂層5と、基板1の周端
に接着シート6で接着され全体を覆う蓋体7とで
構成されていた。
(B) Prior Art As shown in FIG. 1, a conventional hybrid integrated circuit includes an insulating substrate 1 made of ceramic or aluminum whose surface is anodized, a conductive path 2 provided in an arbitrary shape on the substrate 1, and a conductive path 2 provided in an arbitrary shape on the substrate 1. A heat sink 3 fixed on the conductive path 2 with solder, a power transistor 4 fixed on the heat sink 3, a sealing resin layer 5 covering and protecting the power transistor 4, and bonded to the peripheral edge of the substrate 1 with an adhesive sheet 6. and a lid body 7 that covers the entire body.

斯る構造の混成集積回路はテレビ、ラジオ、ス
テレオ等の比較的良好な使用環境を有する電子機
器では十分な封止と評価されていた。しかしなが
ら自動車の電装部品等の如く極めて使用環境の悪
いものにおいては十分な封止構造とは言えず、特
に電力を消費するパワートランジスタの劣化が極
めて問題となつていた。即ちヒートサイクルの結
果、封止樹脂層5にクラツクが発生し、クラツク
から入る酸素により半田酸化が起こり、パワート
ランジスタ4とヒートシンク3との熱抵抗が増大
してパワートランジスタ4が二次破壊されるので
ある。
Hybrid integrated circuits with such a structure have been evaluated as having sufficient sealing for electronic equipment such as televisions, radios, stereos, etc. that have relatively favorable usage environments. However, it cannot be said that the sealing structure is sufficient for items such as electrical components of automobiles, which are used in extremely poor environments, and deterioration of power transistors, which consume electric power, has become a serious problem. That is, as a result of the heat cycle, cracks occur in the sealing resin layer 5, solder oxidation occurs due to oxygen entering through the cracks, and the thermal resistance between the power transistor 4 and the heat sink 3 increases, resulting in secondary destruction of the power transistor 4. It is.

斯る欠点を改良するために第2図に示す如く、
ヒートシンク3の周辺に溝8を設け、パワートラ
ンジスタ4を溝8の内側に半田で固着しエポキシ
樹脂等の封止樹脂層5を塗布してパワートランジ
スタ4を被覆して保護している。この際封止樹脂
層5は溝8内に充填され、ヒートサイクルによる
封止樹脂層5の剥離を防止している。なお斯る従
来技術は特公昭55−41022号公報(HOIL23/28)
に記載されている。
In order to improve this drawback, as shown in Figure 2,
A groove 8 is provided around the heat sink 3, the power transistor 4 is fixed inside the groove 8 with solder, and a sealing resin layer 5 such as epoxy resin is applied to cover and protect the power transistor 4. At this time, the sealing resin layer 5 is filled in the groove 8 to prevent the sealing resin layer 5 from peeling off due to heat cycles. Furthermore, such conventional technology is disclosed in Japanese Patent Publication No. 55-41022 (HOIL23/28)
It is described in.

上述した改良型の混成集積回路に用いるヒート
シンク3は第3図AおよびBに示す如く形成され
る。先ず第3図Aに示す如く、13mm角で厚さ3mm
の銅片をヒートシンク3として用い、ヒートシン
ク3の上面周辺にループ状の巾500μm、深さ
300μmの溝8をプレスして形成する。この工程
で溝8端部は変形されて約40μm程度の突起部9
ができる。特に溝8の内側端部にできる突起部9
はパワートランジスタ4の固着の障害となるので
除去する必要がある。そこで第3図Bに示す如
く、プレス金型10により少くとも内側の突起部
9を平打ちする。しかしプレス金型10と突起部
9の空間に油11が密閉して介在するために平打
ちによりこの突起部9を解消できない欠点があつ
た。
The heat sink 3 used in the improved hybrid integrated circuit described above is formed as shown in FIGS. 3A and 3B. First, as shown in Figure 3A, it is 13mm square and 3mm thick.
A copper piece of
A groove 8 of 300 μm is formed by pressing. In this process, the end of the groove 8 is deformed into a protrusion 9 of about 40 μm.
Can be done. Especially the protrusion 9 formed at the inner end of the groove 8
Since it becomes an obstacle to the fixation of the power transistor 4, it is necessary to remove it. Therefore, as shown in FIG. 3B, at least the inner protrusion 9 is flattened using a press die 10. However, since oil 11 is tightly interposed in the space between the press die 10 and the protrusion 9, the protrusion 9 cannot be eliminated by flat punching.

(ハ) 発明の目的 本発明は斯点に鑑みてなされ、従来の欠点を改
良したヒートシンクの製号方法を実現することを
目的とする。
(c) Purpose of the Invention The present invention has been made in view of the above points, and an object thereof is to realize a heat sink manufacturing method that improves the conventional drawbacks.

(ニ) 発明の構成 本発明は平板状のヒートシンクの上面周辺に溝
を形成した後、該溝の形成時に生じた突起部を通
気孔を有する金型で平打ちする様に構成されてい
る。
(D) Structure of the Invention The present invention is configured such that after grooves are formed around the upper surface of a flat heat sink, the protrusions generated when forming the grooves are flattened with a mold having ventilation holes.

(ホ) 実施例 本発明に依るヒートシンクの製造方法の一実施
例を第4図AおよびBを参照して詳述する。なお
共通する構成部分は共通図番を付した。
(E) Embodiment An embodiment of the heat sink manufacturing method according to the present invention will be described in detail with reference to FIGS. 4A and 4B. Common component parts are given common drawing numbers.

第4図Aに於いては13mm角で厚さ3mmの銅片を
ヒートシンク3として用い、ヒートシンク3の上
面周辺にループ状の巾500μm、深さ300μmの溝
8をプレスして形成する。この工程で溝8端部は
変形されて約40μm程度の突起部9ができる。特
に溝8の内側端部にできる突起部9はパワートラ
ンジスタ4の固着の障害となるので除去する必要
がある。
In FIG. 4A, a copper piece 13 mm square and 3 mm thick is used as the heat sink 3, and a loop-shaped groove 8 having a width of 500 μm and a depth of 300 μm is formed around the upper surface of the heat sink 3 by pressing. In this process, the ends of the grooves 8 are deformed to form protrusions 9 of about 40 μm. In particular, the protrusion 9 formed at the inner end of the groove 8 must be removed since it becomes an obstacle to the fixation of the power transistor 4.

第4図Bに於いて突起部9を平打ちにより除去
する。本工程は本発明の最も特徴とする点であ
り、平打ち用のプレス金型10に通気孔12を設
けている。そうするとプレス金型10と突起部9
で形成される空間に油11が介在しても通気孔1
2より外部への逃げ道があるので容易に平打ちを
行なえ、突起部9は約5μm程度までに平坦化さ
れる。通気孔12はプレス金型10の中央より側
面に貫通しているが、その形状は任意であり外気
との接続ができれば十分である。
In FIG. 4B, the protrusion 9 is removed by flat hammering. This step is the most characteristic feature of the present invention, and a vent hole 12 is provided in the press mold 10 for flat stamping. Then, the press die 10 and the protrusion 9
Even if oil 11 is present in the space formed by
Since there is an escape route to the outside from 2, flattening can be easily performed, and the protrusion 9 can be flattened to about 5 μm. The ventilation hole 12 penetrates from the center to the side of the press mold 10, but its shape is arbitrary, and it is sufficient that it can be connected to the outside air.

(ヘ) 発明の効果 本発明に依ればヒートシンクの平打ちを容易に
実現でき、パワートランジスタ4の封止構造に最
適のヒートシンク3を量産できる。
(F) Effects of the Invention According to the present invention, it is possible to easily realize a flat heat sink, and it is possible to mass-produce the heat sink 3 that is most suitable for the sealing structure of the power transistor 4.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の混成集積回路を説明する断面
図、第2図は溝付のヒートシンクを用いた混成集
積回路を説明する断面図、第3図AおよびBは従
来の溝付のヒートシンクの製造方法を説明する断
面図、第4図AおよびBは本発明に依るヒートシ
ンクの製造方法を説明する断面図である。 主な図番の説明 3はヒートシンク、8は溝、
9は突起部、10はプレス金型、12は通気孔で
ある。
Fig. 1 is a cross-sectional view illustrating a conventional hybrid integrated circuit, Fig. 2 is a sectional view illustrating a hybrid integrated circuit using a grooved heat sink, and Fig. 3 A and B are manufacturing of a conventional grooved heat sink. 4A and 4B are cross-sectional views illustrating the method of manufacturing a heat sink according to the present invention. Explanation of main drawing numbers: 3 is the heat sink, 8 is the groove,
9 is a protrusion, 10 is a press mold, and 12 is a ventilation hole.

Claims (1)

【特許請求の範囲】[Claims] 1 平板状のヒートシンクの上面周辺に溝を形成
した後該溝の形成時に生じた突起部を通気孔を有
する金型で平打ちをすることを特徴とするヒート
シンクの製造方法。
1. A method for manufacturing a heat sink, which comprises forming grooves around the upper surface of a flat heat sink, and then flattening the protrusions generated during the formation of the grooves with a mold having ventilation holes.
JP59072425A 1984-04-11 1984-04-11 Manufacture of heat sink Granted JPS60216572A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59072425A JPS60216572A (en) 1984-04-11 1984-04-11 Manufacture of heat sink

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59072425A JPS60216572A (en) 1984-04-11 1984-04-11 Manufacture of heat sink

Publications (2)

Publication Number Publication Date
JPS60216572A JPS60216572A (en) 1985-10-30
JPH0210578B2 true JPH0210578B2 (en) 1990-03-08

Family

ID=13488922

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59072425A Granted JPS60216572A (en) 1984-04-11 1984-04-11 Manufacture of heat sink

Country Status (1)

Country Link
JP (1) JPS60216572A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62238026A (en) * 1986-04-08 1987-10-19 Sanyo Electric Co Ltd Manufacture of heat sink
DE10333329B4 (en) * 2003-07-23 2011-07-21 SEMIKRON Elektronik GmbH & Co. KG, 90431 Power semiconductor module with rigid base plate

Also Published As

Publication number Publication date
JPS60216572A (en) 1985-10-30

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