JPH0210648B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an overcurrent display device that is installed at a plurality of locations on a power distribution line and displays an overcurrent when it occurs.

Traditionally, distribution lines have been divided into multiple transmission sections using multiple section switches, and when an overcurrent occurs on the distribution line due to a short circuit, etc., this is detected by the overcurrent relay at the substation and the substation is protected. The disconnector is tripped, and after a certain period of time, the re-closing relay is used to re-close the above-mentioned breaker, and the section switches are sequentially turned on at certain time intervals to sequentially transmit power to multiple power transmission sections. If the circuit is successful, power is supplied as is, and if the re-closing is unsuccessful, that is, the circuit breaker trips again due to power transmission to the faulty section, the sectional switch on the power supply side of the faulty section is turned on. A so-called faulty section detection method is adopted in which the faulty section is isolated by locking the faulty section, and the power is transmitted to the healthy section by re-closing the cable breakers, thereby reducing the power outage area. However, as power distribution lines have become insulated in recent years, for example, if a short circuit occurs due to a lightning strike, arcs will concentrate and even if the distribution line melts, it will be insulated by the insulation coating and ground faults cannot be detected. When the circuit breaker is reclosed, the circuit is successfully reclosed and power is supplied as if it were healthy, making the maintenance personnel think that it is a temporary short circuit, and the power is not being supplied as it is. If the supply continues, there is a problem that there is a risk of electric shock due to the broken distribution line, resulting in personal injury. In addition, even if the distribution line does not melt, the damage caused by the concentration of the arc can be severe and the wire may break due to subsequent mechanical external forces, etc. If the line breaker trips due to overcurrent, It has become necessary for the maintenance and management of power distribution lines to lock the automatic reclosing circuit and recover from an accident in a power distribution line where an overcurrent has occurred. However, on the other hand, locking the automatic reclosing circuit requires time and effort to search for the fault point over a wide area, and it also increases the time it takes to recover from the fault and results in a long power outage over a wide area, which is a problem in terms of power supply. There is a problem in that it leads to a decline in service.

In order to deal with this, overcurrent indicators are installed at multiple locations on the distribution line, so that when an overcurrent occurs, the point of failure can be quickly found, and the accident can be quickly restored, thereby shortening the power outage time. be. Some overcurrent indicators operate a relay when an overcurrent flows, unlocking the display piece and causing the display to protrude outside the device. It is necessary to manually return to the top of the pole, which requires a lot of time and effort, such as going up and down to the top of the pole, and returning with live wires, and has the disadvantage that it is also dangerous.

The present invention has solved the above-mentioned problems, and its purpose is to accurately detect and display overcurrent with a simplified configuration, and to automatically recover after a certain period of time after recovery from an accident. It's about providing something.

Embodiments of the present invention will be described below with reference to the drawings.
Reference numeral 1 denotes a power distribution line, and 2 represents a current detection unit removably attached to the power distribution line 1. The current detection unit 2 is a current detection unit that is detachably attached to the power distribution line 1, and is a so-called through-type modification in which an annular core (not shown) is divided into two parts, passed through the power distribution line 1, and clamped from both sides. It is formed from flow vessel CT. Reference numeral 3 denotes a control section connected to the current detection section 2, which detects when an overcurrent flows through the power distribution line 1 and causes the display section 4 to display the overcurrent. The display section 4 connected to the output side of the control section 3 is composed of a display element ECD called an electrochromic display. This is formed by arranging a display electrode P ₁ and a counter electrode P ₂ to face each other in the container substrate TB, and sealing an electrolyte EL for hydrogen ions to move between these two electrodes, so that the display electrode P ₁ has (- ) polarity, and when a (+) polarity voltage is applied to the counter electrode P ₂ , hydrogen ions in the electrolyte EL attach to the display electrode P ₁ and display a blue color.
By applying a voltage of opposite polarity to the electrodes P ₁ and P ₂ and causing a current to flow in the opposite direction, the hydrogen ions attached to the display electrode P ₁ are ionized and the blue colored display is erased. I'm getting older. Also, display element
As shown in Figure 3, the relationship between the voltage application time and the amount of electricity written in ECD shows a characteristic in which the amount of electricity written increases over time, and color develops within a few seconds after voltage is applied to the polarity shown. It is now displayed,
It has an electromotive force due to an increase in the amount of electricity written, and has a memory function so that it maintains a color display state even if the applied voltage is removed.

Next, the control section 3 will be explained. 5 connects a diode to the secondary side of the current transformer CT through the input terminal, and connects a rectifier DB ₁ whose (-) side output terminal is grounded to the circuit, so that the input is full-wave rectified and output. This is a rectifier circuit. Reference numeral 6 denotes a voltage suppression circuit inserted between the output terminals of the rectifier circuit 5 to suppress the input voltage when it exceeds a predetermined value to protect the subsequent stage circuit. this is,
Multiple diodes are inserted in series in the forward direction between the (+) side output terminal of the rectifier DB ₁ and the circuit ground (in this example, 11 diodes D ₁ , D ₂ ......D ₁₁ ,
When the input voltage becomes a voltage higher than the forward voltage of the diodes D ₁ , D ₂ . . . D ₁₁ (for example, 0.9×11 = 9.9 V), the diodes D ₁ , D ₂ ......D ₁₁ is made conductive and the output current of the rectifier DB ₁ is diverted to this, thereby suppressing the output voltage from the output terminal a from exceeding a predetermined value (for example, 9.9 V). It's becoming like that. The voltage suppression circuit 6 also includes a diode array of diodes D ₁ , D _{2 .} . . D ₁₁ and first and second voltage dividing points b and c (in this example, diodes
A connection point b between D ₅ and D ₆ and a connection point c) between diodes D ₉ and D ₁₀ are provided, and outputs are sent from the first and second voltage dividing points b and c, respectively. 7
is a reverse current blocking diode _D12 and a low resistance resistor between the output terminal a of the voltage control circuit 6 and the circuit ground.
This is a smoothing circuit in which R ₁ and capacitor C ₁ are inserted in series to smooth the input and output from the connection point of resistor R ₁ and capacitor C ₁ . 8 is a diode by inserting a display capacitor C ₂ and a constant voltage diode ZD ₁ in parallel between the output terminal of the smoothing circuit 7 and the circuit ground via a reverse current blocking diode D ₁₃ .
This display power supply circuit suppresses the charge of the display capacitor C ₂ charged through D ₁₃ to the Zener voltage of the constant voltage diode ZD ₁ and sends it out as the output voltage V _C2 . 9 is connected from the output terminal of the smoothing circuit 7 and the first voltage division point b of the voltage suppression circuit 6 to send out a signal for erasing the colored display of the display element ECD, that is, an erasing signal. It is a timer circuit. This is done by inserting a capacitor C ₃ and a high resistance resistor R ₃ in parallel between the above output terminal b and the circuit ground via a high resistance resistor R ₂ , and connecting the above resistance R ₂ and capacitor C ₃ to the connection point. The emitter is connected to the base of the transistor Q ₁ whose circuit is grounded, and the collector of this transistor Q ₁ is connected to the output terminal of the smoothing circuit 7 through the high resistance resistor R _{4 .} , a pulse generator (not shown) connected to the output end of the smoothing circuit 7 to generate a clock signal, and a frequency divider (not shown) which divides the frequency of the clock signal into a predetermined number of stages and outputs the divided pulse generator. When the input terminal CL of the frequency divider circuit FD is connected to clear the output of the frequency divider, when the distribution line 1 is supplied with power, the charging voltage of the capacitor C ₃ charged through the resistor R ₂ is The transistor _Q1 is made conductive and the output signal that rises to the "H" level after a certain period of time (for example, 4 hours) from the output terminal of the frequency divider circuit FD is sent as an erase signal for the timer circuit 9 at a duty ratio of 50%. When distribution line 1 is out of power, the charge on capacitor C ₃ is transferred to resistor R ₃
to turn off transistor _Q1 by discharging it through
The input of the input terminal CL of the frequency dividing circuit FD is inverted to "H" level, clearing the frequency divider (not shown), and the output voltage of the smoothing circuit 7 (that is, the discharge voltage of the capacitor _C1 ) becomes the timer circuit 9. An "L" level output signal is sent from the output terminal of the frequency divider circuit FD as an output signal of the timer circuit 9 only for a period when the operating voltage is higher than the operating voltage of the timer circuit 9.
has begun to stop responding. In other words, when the power distribution line 1 is supplied with power, the timer circuit 9 sends out the erase signal at a predetermined period (e.g., 8 hour period) after a certain period of time, and when the power distribution line 1 is out of power, it sends out the erase signal at the predetermined period. The erase signal to be sent is stopped. And above capacitor C ₃
The charging voltage of the diode D ₆ of the voltage suppression circuit 6,
D ₇ ………D ₁₁ determines its forward voltage (e.g.
5.4V) or less. Reference numeral 10 denotes an overcurrent detection circuit connected from the second voltage division point c of the voltage control circuit 6 and the output end of the rectifier circuit 5 to detect overcurrent in the distribution line 1. This involves inserting a low resistance voltage conversion resistor _R5 between the second voltage dividing point c and the circuit ground,
A variable resistor for overcurrent detection is connected between the terminals of this resistor _R5 .
Insert VR ₁ and resistor R ₆ in series, insert thermistor Th ₁ between the terminals of resistor R ₆ , and convert the voltage between the terminals of resistor R ₅ to the output voltage V _OC from the slider of variable resistor VR ₁ .
The slider of the variable resistor VR ₁ is connected via the base resistor R ₇ to the base of a transistor Q ₂ whose emitter is grounded to the circuit, and between the collector and emitter of this transistor Q ₂ . Insert capacitor C ₄ through resistor R ₈ of low resistance,
Connect the output terminals of the rectifier DB ₁ between the terminals of this capacitor C ₄ via a charging resistor R ₉ ,
The above capacitor C ₄ is formed so as to be charged in the circuit DB ₁ → R ₉ → C ₄ → DB ₁ , and discharged in the circuit C ₄ → R ₈ → Q ₂ → C ₄ , and the above discharge resistor R ₈ The resistance value of the charging resistor R ₉ is set in the relationship R ₈ ≪ R ₉ (for example, 1/1000) so that the discharging time constant of the capacitor C ₄ is extremely smaller than the charging time constant. There is a base resistor between the terminals of _C4 .
Connect the base and emitter of transistor Q ₃ through R ₁₀ , connect the collector of this transistor Q ₃ to the base of transistor Q ₄ whose emitter is grounded, and conduct the transistor Q ₃ by the charging voltage of capacitor C ₄ . The slider of the variable resistor VR ₁ is connected to the base of _{the transistor Q 4 via} the base resistor R ₁₁ , and the base potential of the transistor Q ₄ is lowered. collector connected to the base
Connect the collector of the PNP transistor Q ₅ , insert a capacitor C ₅ between the base and emitter of the transistor Q ₄ to prevent malfunction, and make the transistors Q ₄ and Q ₅ conductive when the transistor Q ₃ is non-conductive. The collector current of transistor Q ₅ flows into the base of transistor Q ₄ and the variable resistor VR ₁
It has a latch function that maintains conduction even if the output voltage V _OC of the transistor Q 5 becomes zero, and the emitter output of the transistor Q ₅ is sent out as a detection signal of the overcurrent detection circuit 10 . The output V _OC of the variable resistor VR ₁ is the base-emitter voltage V _BE2 of the transistors Q ₂ and Q ₄ when an overcurrent (for example, 600 A) flows through the distribution line 1 at room temperature (for example, 25°C). , _VBE4 , and compensation for temperature changes with respect to room temperature is performed by a thermistor _Th1 inserted in parallel with a resistor _R6 . Also, the resistor for voltage conversion mentioned above
The voltage between the terminals of _R5 is such that the second voltage division point c of the voltage suppression circuit 6 becomes equal to or higher than the sum of the forward voltage drops of the diodes _D10 and _D11 (for example, 0.9×2=1.8V). By being suppressed, the output side of the variable resistor VR ₁ is protected. 11 is connected to the output terminals of the display power supply circuit 8, timer circuit 9, and overcurrent detection circuit 10, and is connected to the display element.
This is a write/erase circuit that controls the coloring or decoloring display of the ECD. This is a PNP type control transistor Q ₆ at the output terminal of the display power supply circuit 8.
Connect the emitter of this control transistor.
A resistor _R12 is inserted between the emitter and base of _Q6 , and the collector of the transistor _Q6 is connected to the counter electrode _P2 of the display element ECD whose display electrode _P1 is circuit grounded via the resistor _R13 . The emitter of the transistor _Q5 of the overcurrent detection circuit ₁₀ is connected to the base of the transistor _Q5 through the resistor _R14 .
The control transistor is made conductive by the emitter current of the transistor _Q5 caused by the conduction (that is, by the overcurrent detection signal), and the output V _C2 of the display power supply circuit 8 (discharge of the display capacitor _C2) is made conductive. Voltage)
is applied to the display element ECD through the resistor R ₁₃ to cause the display element ECD to display color, and is connected between the resistor R ₁₃ and the circuit ground (i.e., between the display element ECD and the circuit ground).
A diode for overvoltage protection connected in series in the forward direction between the collector and emitter of the recovery transistor Q ₇ (between the counter electrode P ₂ of the ECD and the display electrode P ₁ )
D ₁₄ , D ₁₅ and a high-resistance resistor R ₁₅ that discharges the electromotive force caused by the amount of electricity written in the display element ECD are inserted in parallel, and the base of the recovery transistor Q ₇ is connected to the
The output terminal of the timer circuit 9 is connected via the base resistor _R16 , and when the erase signal of the timer circuit 9 is sent out, the reset transistor _Q7 is made conductive.
The electromotive force of the display element ECD is instantaneously discharged to decolor or erase the colored display, and when the erasing signal of the timer circuit 9 is stopped, the display element
The electromotive force of the ECD is discharged and erased through a high-resistance resistor _R15 over an extremely long discharge time.

The control section 3 and the display section 4 are housed in a case (not shown), and a display window is provided at the bottom of the case so that the colored display of the display section 4 can be accurately identified from the ground. , a current detection part 2 is attached to the upper part of the housing, and the through-type current transformer is divided into two parts.
A CT is formed so as to be removably sandwiched and connected from both sides of the distribution line 1, and is hung and attached to each of, for example, a plurality of transmission sections of the distribution line 1, and each transmission section of the distribution line 1 where an overcurrent has occurred. are displayed respectively.

Next, the overcurrent display operation will be explained. Now, the transistors Q ₁ to _{Q 7} of the control section 3 are all non-conducting, and all the capacitors C ₁ to C ₅ are also not charged, and in this state, if the current transformer CT ₁ is connected to the distribution line 1 by sandwiching it, , the secondary current of current transformer CT ₁ is rectifier
The current is full-wave rectified by DB ₁ , and this current causes the capacitor C ₁ of the smoothing circuit 7 to pass through the resistor R ₁ to C ₁ , R ₁
The display capacitor C ₂ of the display power supply circuit 8 is charged by this charging voltage with a time constant, and the output voltage V _C2 of the display power supply circuit 8 is a constant voltage diode.
It rises to the Zener voltage of ZD ₁ . At the same time, the output of the rectifier DB ₁ charges the capacitor C ₄ of the overcurrent detection circuit 10 through the charging resistor R ₉ with a time constant of C ₄ R ₉ . This increase in the charging voltage of capacitor C ₄ causes the base voltage of transistor Q ₃ to increase,
Transistor _Q3 becomes conductive. This short-circuits the base and emitter of transistor _Q4 ,
Transistors Q ₄ and Q ₅ are kept non-conducting.
On the other hand, in the voltage suppression circuit 6, the output voltage at the output terminal a is changed to the diodes D ₁ , D ₂ , etc. by charging the capacitor C ₁ of the smoothing circuit 7 and the display capacitor C ₂ of the display power supply circuit 8 . When the forward voltage of D ₉ rises above or above, the diodes D ₁ to _{D 9} become conductive and DB ₁ →
Current flows in the circuit D ₁ → D ₉ → R ₅ → DB ₁ (at this time, the impedance of diodes D ₁₀ and D ₁₁ is larger than that of resistor R ₅ , so the current flows at the second voltage dividing point C. This _{current causes}
The capacitor _C3 of the timer circuit 9 connected to the first voltage division point b is charged through the resistor _R2 , and
Overcurrent detection circuit 10 connected to second voltage division point C
A voltage is generated across the terminals of the voltage conversion resistor _R5 .
The variable resistor VR ₁ receives the voltage across the terminals of the resistor R ₅ and sends out the output V _OC , but the output V _OC at this time is the base-emitter voltage V _BE2 of the transistor Q ₂ (i.e., the overvoltage voltage). Since the detection level of the current is lower than (V _OC < V _BE2 ), transistor Q ₂ remains non-conducting, capacitor C ₄ is not discharged, transistor Q ₃ remains conductive, and transistor
When Q ₄ and Q ₅ are non-conducting, the overcurrent detection circuit 10
The detection signal is not sent, and the control transistor
_Q6 remains non-conductive, no voltage is applied to the display element ECD, and no color display is performed. Further, the charged capacitor _C3 makes the transistor _Q1 conductive due to the increase in the charging voltage, and the frequency dividing circuit FD
Since the input terminal CL of the input terminal CL is set to "L" level (approximately OV), the frequency divider circuit FD responds to the output voltage of the smoothing circuit 7, and a pulse generator (not shown) outputs a clock signal and receives the clock signal. A frequency divider (not shown) divides the frequency into a predetermined number of stages, and outputs an output signal with a duty ratio of 50% that rises to "H" level after a certain period of time (for example, after 4 hours) from the output terminal of the frequency divider circuit FD. It is sent to the transistor _Q7 of the write/erase circuit 11 via the base resistor _R16 as an erase signal of the timer circuit 9 at a cycle (for example, 8h cycle). Transistor _Q7 that receives this becomes conductive during the period when the input is at the "H" level (for example, 4 hours), shorting the terminals of the display element ECD, but the display element ECD does not display any color. , Therefore, in this case, the transistor Q ₇ simply repeats conduction and non-conduction operations at predetermined intervals.

In this steady state, if a short circuit occurs in the distribution line 1 due to an electric shock or the like and an overcurrent flows, the output V _OC of the variable resistor VR ₁ of the overcurrent detection circuit 10 increases, and the voltage between the base and emitter of the transistor Q ₂ increases. When the level of voltage V _BE2 is reached at time t ₀ shown in FIG. 2, transistor Q ₂ conducts (ie detects an overcurrent) (Q 2 in FIG. ₂ ). The conduction period of this transistor Q ₂ is a period in the relationship of V _OC V _BE2 as shown in Fig. 2 Q ₂ , so it varies depending on the magnitude of the overcurrent.
Capacitor C ₄ is discharged during the period when transistor Q ₂ is conducting (V _OC V _BE2 ) by the circuit of C ₄ → R ₈ → Q ₂ → C ₄ in a time determined by the C ₄ R ₈ time constant. ,
The period during which transistor Q ₂ is non-conducting (V _OC
<V _BE2 ), DB ₁ → R ₉ → C ₄ → DB ₁ circuit,
The capacitor will be charged in the time determined by the C ₄ R ₉ time constant, and the relationship between the discharging time constant and the charging time constant is that the discharging time constant << the charging time constant.
The voltage across the terminals of C ₄ gradually decreases to lower the base voltage of transistor Q ₃ , as shown in FIG.
Transistor _Q3 becomes non-conductive (at time _t1 in Figure 2).
This causes capacitor C ₅ to pass through resistor R ₁₁ .
Charged with a time constant of C ₅ R ₁₁ , the base voltage of the transistor Q ₄ increases, the transistor Q ₄ becomes conductive and the collector current flows, the base voltage of the transistor Q ₅ decreases and the transistor Q ₅ becomes conductive ( Figure 2 (time point ₂ ). This conduction causes transistor Q ₅
The collector current flows into the base of transistor _Q4 , transistors _Q4 and _Q5 are latched, and the variable resistor _VOC flows into the base of transistor _Q2 by the output of the full-wave rectified waveform of rectifier _DB1 . - Once the emitter voltage V _BE2 drops below the level, the transistor Q ₂ becomes Q ₂ in Figure 2.
As shown in Figure 2, even if capacitor _C4 charges and discharges by repeating conduction and non-conduction, the voltage between its terminals never reaches the base-emitter voltage V _BE3 of transistor _Q3 (Fig. 2C). ₄ ), transistor _Q3
maintains a non-conducting state (Q ₃ in Fig. 2), and transistors Q ₄ and Q ₅ maintain a conducting state (Q ₄ , Fig. 2).
_Q5 ). Then, due to the conduction of the transistors Q ₄ and Q ₅ , an emitter current flows to the transistor Q ₅ (that is, sending out an overcurrent detection signal), and the base voltage of the control transistor Q ₆ of the write/erase circuit 11 decreases. Then, the control transistor _Q6 becomes conductive and maintains this state. Due to this continuity, the display capacitor
Output V _C2 of power supply circuit 8 for C ₂ to display its charging voltage
As a result, discharge occurs in the circuit of C ₂ →Q ₆ →R ₁₃ →ECD →C ₂ , and the output V _C2 is applied to the display element ECD with the polarity shown. The display element ECD that received this is an electrolyte solution.
Hydrogen ions in the EL adhere to the display electrode _P1 due to reduction and develop a blue color, indicating the occurrence of an overcurrent.

At this time, when the voltage between the terminals of the resistor R ₅ becomes equal to or higher than the forward voltage of the diodes D ₁₀ and D ₁₁ of the voltage suppression circuit 6 due to the current flowing through the resistor R ₅ of the overcurrent detection circuit 10, the diode D ₁₀ , D ₁₁ conducts and shunts current through it. Due to this shunting, the peak value of the full-wave rectified waveform of the output V _OC of the variable resistor VR ₁ is suppressed to a constant level, and the output side of the variable resistor VR ₁ is protected from overvoltage. Furthermore, when the output V _C2 of the display power supply circuit 8 is higher than the forward voltage of the diodes D ₁₄ and D ₁₅ , the diodes D ₁₄ and D ₁₅ conduct and shunt the current to this to suppress the voltage applied to the display element ECD. Voltage V Protects _ECD from overvoltage.

On the other hand, at a substation (not shown), an overcurrent relay detects an overcurrent generated in the distribution line 1, and the circuit breaker trips at time t _CB shown in FIG.
As a result, the supply of power to the distribution line 1 will be stopped (i.e., a power outage), but the period from the occurrence of overcurrent until the above-mentioned disconnector trips (for example,
Since transistors Q ₄ and Q ₅ are conductive and latched at 0.1 sec), control transistor Q ₆ is maintained conductive and display capacitor C ₂ continues to be discharged (i.e., the display power supply Output of circuit 8
V _C2 is applied to the display element ECD).

Furthermore, due to the above-mentioned circuit breaker trip, the capacitor C ₃ of the timer circuit 9 is discharged in the circuit C ₃ →R ₃ →C ₃ , causing the base voltage of the transistor Q ₁ to drop in an extremely short time. ₁ becomes non-conductive (at time _t3 in Figure 2), the input to the input terminal CL of the frequency divider circuit FD becomes "H" level, and the output signal of the frequency divider circuit FD at that time becomes "H" level. If it is inverted to "L" level, it sends out "L" level (abbreviated OV) as it is, and this is sent to write/erase circuit 1 as an output signal of timer circuit 9.
1 to the base of transistor Q ₇ , making transistor Q ₇ non-conducting. The "L" level output signal of this frequency divider circuit FD indicates that the output of the smoothing circuit 7 (the discharge voltage of the capacitor _C1 ), which decreases due to the above-mentioned circuit breaker trip, is higher than the operating power supply level of the frequency divider circuit FD. It is sent for a certain period of time, after which the response stops. In other words, when the transistor _Q1 becomes non-conductive, the sending of the erase signal from the timer circuit 9 is stopped and the transistor _Q7 is kept non-conductive.

Then, the transistor _Q7 becomes non-conductive, and
As the display capacitor _C2 continues to discharge, the amount of electricity written to the display element ECD increases as the voltage application time elapses, and the voltage between its terminals increases.
V _ECD increases, and this V _ECD increases between the output V _C2 which decreases due to discharge, the voltage V _R13 between the terminals of the resistor _R13 caused by the current flowing through the resistor _R13 , and the collector voltage of the control transistor _Q6 . When the emitter-to-emitter voltage V _CE6 reaches the relationship V _C2 V _ECD + V _CE6 + V _R13 , the control transistor Q ₆ becomes non-conductive, and the output of the output V _C2 to the display element ECD is stopped. The emitter current of transistor Q ₃ flows into the emitter of transistor Q ₅ via resistor R ₁₄ to hold the latches of transistors Q ₄ and Q ₅ , and the output V _C2 , which decreases due to the above discharge, flows into the emitter of transistor Q 5 through resistor R ₁₄ . , collector-emitter voltage of Q ₅
V _CE4 , V _CE5 and base-emitter voltage V _BE4 ,
When the level of each sum of V _BE5 (V _CE4 + V _BE5 , V _CE5 + V _BE4 ) becomes lower than the level, the above transistors Q ₄ ,
_Q5 becomes non-conductive (at time _t4 in Figure 2). Also, due to the non-conduction of the control transistor _Q6 , the display element
The ECD discharges the electromotive force due to the written amount of electricity very gradually through the high-resistance discharge resistor _R15 (that is, a current flows in the opposite direction to the display element ECD).
Due to this discharge, the voltage between the terminals of the display element ECD
As shown in Figure 4, V _ECD decreases rapidly in the early stage of discharge, and then follows a very gradual curve.
is retained.

In the overcurrent display state of this display element ECD,
Maintenance personnel at the substation searched for the fault point where the overcurrent occurred on the distribution line 1, and by discovering this device with a colored display (overcurrent display), it was decided that the distribution line 1 where the accident occurred would be restored. Become. After the accident is restored, the automatic re-closing of the substation's breaker will release the sectional switch on the power supply side of the accident section if it has been locked, and the above-mentioned breaker will also be If the automatic reclosing circuit is locked due to the occurrence, it is released and power is supplied to the distribution line 1. By this power supply, the capacitor of the overcurrent detection circuit 10
C ₄ is charged through the resistor R ₉ , and the charging voltage _of the capacitor C ₄ makes the transistor Q ₃ conductive and makes the transistors Q ₄ and Q ₅ non-conductive. The display capacitor _C2 of the power supply circuit 8 is charged. Then, the input voltage of the smoothing circuit 7 is applied to the capacitor.
The voltage rises due to the charging of C ₁ and the diodes D ₁ to _{D 9} of the voltage suppression circuit 6 become conductive.
The capacitor _{C3 of} the timer circuit 9 is charged by the output of the voltage dividing point b of Then, after a certain period of time (for example, 4 hours) from the frequency dividing circuit FD, the signal becomes “H”.
The level output signal is sent as an erase signal of the timer circuit 9, and the recovery transistor _Q7 is made conductive (at time _tR in FIG. 4). As a result, the electromotive force of the display element ECD is instantaneously discharged in the ECD → Q ₇ → ECD circuit,
As shown in Figure 4, this terminal voltage V _ECD drops instantaneously, and this instantaneous discharge current actively ionizes the hydrogen ions attached to the display electrode _P1 of the display element ECD. The colored display disappears, the overcurrent display disappears, and the system automatically recovers. This returns to the steady state described above and prepares for the next overcurrent detection.

In the above-mentioned overcurrent display operation, an overcurrent occurs during the period when the erase signal of the timer circuit 9 is being sent out (that is, the period when the recovery transistor Q ₇ is conducting), and the detection signal of the overcurrent detection circuit 10 causes an overcurrent to be generated. When the control transistor Q ₆ is turned on, the display capacitor C ₂ will be discharged in the circuit of C ₂ → Q ₆ → R ₁₃ → Q ₇ → C ₂ , but the discharge time is determined from the above explanation. As can be understood, the maximum time from detection of an overcurrent until the substation circuit breaker trips and transistor Q ₁ becomes non-conducting (from t ₂ to t ₃ in Figure 2) is time, e.g. 0.1sec)
Compared to this, the discharge time constant (C ₂ · R ₁₃ ) of the display capacitor C ₂ is set to be sufficiently long (for example, 30 seconds or more), so even if the circuit breaker trips, Even if a voltage is applied to the display element ECD after the transistor _Q1 becomes non-conductive, the overcurrent display is accurately performed without interfering with the colored display. Also, the timer circuit 9
If the circuit breaker trips while the circuit is operating (i.e., counting a certain period of time), the circuit breaker trips automatically (i.e., the circuit breaker automatically recloses, and the sectional switch on the power supply side at the fault point is turned on). If the disconnector trips again), the timer circuit stops responding, so the erasing signal is not sent, and there is no possibility of erasing the colored display on the display element ECD (that is, erasing the overcurrent display). .

Next, when the temperature inside the case (not shown) of this device attached to the power distribution line 1 rises or falls from room temperature (for example, 25°C) due to the influence of the outside temperature,
Thyristor Th ₁ detects this and changes its resistance value according to the temperature change, so the output V _OC of variable resistor VR ₁ is changed according to the temperature change and sent out. Even if the operating current value varies due to temperature changes in the base-emitter voltages V _BE2 and V _BE4 of _Q4 , this is compensated for by using the preset overcurrent detection value of the distribution line ₁ (e.g. 600A on the primary side of current transformer CT ₁ )
Detect accurately. The operation is performed in the same manner as described above, so a description thereof will be omitted.

According to the present invention, when an overcurrent occurs in a distribution line, it is quickly detected before the circuit breakers at the substation trip, and the display capacitor, which is charged during normal operation, is charged by the written amount of electricity. The overcurrent display is made by discharging the display element that displays color and maintains the color, so even if the circuit breaker trips and the power supply stops, the overcurrent display will be accurate. Not only can the overcurrent display be maintained, but the overcurrent display can also be restored by short-circuiting the terminals of the display element using the erase signal from the timer circuit, which is sent out after a certain period of time in response to the power supply after the distribution line where the accident occurred has been restored. Since the reset transistor that forms the bypass circuit is made conductive, the time accuracy of the overcurrent display is improved compared to a system in which the electromotive force generated by the written amount of electricity is discharged through a resistor and automatic reset is performed. Furthermore, since the overcurrent display is automatically reset after a certain period of time after the fault has been restored, the substation's circuit breakers and breakers are reclosed, and the fault point is automatically reset. Even if the exploration range expands and it takes time to find the fault point, the overcurrent display can be maintained in response to this, preventing misidentification between the display state and the recovery state, making it easier for maintenance personnel to investigate faults. Can be clearly communicated. In addition, since the circuit configuration is all static, it not only responds quickly, but also can be made smaller and lighter, and does not place any burden on the distribution line even if it is suspended from the distribution line. This eliminates the need for return operations on the pillar, making maintenance management convenient.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a time chart explaining the operation of FIG. 1, FIG. 3 is a characteristic diagram of the amount of electricity supplied to the display element of FIG. The figure is a discharge characteristic diagram of the display element of FIG. 1. 1: Distribution line, 2: Current detection section, 3: Control section,
4: Display section, 6: Voltage suppression circuit, 7: Smoothing circuit,
8: Display power supply circuit, 9: Timer circuit, 10: Overcurrent detection circuit, 11: Write/erase circuit, _Q6 : Control transistor, _Q7 : Recovery transistor,
CT: Current transformer.

Claims (1)

[Claims] 1. Consists of a current detection unit consisting of a feed-through current transformer removably attached to the distribution line, and a display element that produces a color display based on the amount of electricity written by energization and retains it by having an electromotive force. The control unit includes a display unit, and a control unit that causes the display element to display a color display in response to an overcurrent detection signal, and discharges an electromotive force in response to an erase signal to restore the color display. , a voltage suppressing circuit comprising a plurality of diodes connected in series and having first and second voltage dividing points is connected to the output end of the current transformer via a rectifier circuit, and a voltage suppressing circuit is connected to the output end of the current transformer to smooth the input and output it. and a display power supply circuit having a display capacitor at the output end of the smoothing circuit that charges the input through a diode for blocking reverse current, and After a certain period of time, an output signal of "H" level is sent out as an erase signal, and
A timer circuit connected to the first voltage dividing point of the voltage suppression circuit and configured to stop sending out the erase signal when the input becomes "L" level is connected to the first voltage division point of the voltage suppression circuit. An overcurrent detection circuit that sends out an overcurrent detection signal when the input reaches the detection level is connected to the voltage division point 2, and the control circuit is turned on by the detection signal of this overcurrent detection circuit. A transistor is inserted between the output terminal of the display power supply circuit and the terminal of the display element, and a reset transistor that is made conductive by the erase signal of the timer circuit and a high resistance transistor are inserted between the terminals of the display element. A power distribution line characterized in that it has a write/erase circuit inserted in parallel with a discharging resistor, and is configured to automatically reset an overcurrent display after a certain period of time by power transmission after recovery from an accident. Overcurrent indicator.