JPH021409B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transversal automatic equalizer that works in conjunction with a carrier recovery circuit in digital carrier band communications.

Conventionally, large-capacity transmission in the microwave band has been implemented using the FM method for analog transmission and the 4-phase phase modulation method for digital transmission, and in this range, there is no need to actively equalize transmission path distortion on the receiving side. Nakatsuta.

In recent years, there has been a movement to switch from high-capacity FM systems to digital systems, and development efforts are underway in various places. The modulation method is 16-value quadrature amplitude modulation (QAM), which carries four-value information in each in-phase and quadrature, and it is essential to equalize transmission path distortion, especially strong waveform distortion caused by selective fading. It became. As a waveform equalization device, a transversal automatic equalizer is common and has excellent characteristics, so it is considered a favorite as a future technology. Complex signal (two-dimensional signal, e.g. four-phase phase modulation, etc.)
Since the automatic equalizer for QAM has complex tap weights (C _iR , C _iI ), it has the ability to eliminate mutual interference between in-phase and quadrature components (referred to as "orthogonal interference"), and is a standard for coherent detection. It is also possible to absorb the rotation of the received signal point due to the phase shift of the carrier wave.

No problem occurs when the phase difference information to be supplied to the phase synchronization device provided for the reference carrier regeneration is obtained in a separate series from the automatic equalizer output. In order to eliminate waveform distortion and detect the phase difference with higher accuracy, it is preferable to perform phase control based on the automatic equalizer output.

In such a case, the carrier phase error will be absorbed at an arbitrary ratio by the automatic equalizer and the phase synchronizer. If the frequency characteristics of the taps used in the automatic equalizer are not very good, it is desirable that the central tap weight be connected as directly as possible. (Real part 1, imaginary part 0) For this purpose, it is necessary to devise a method so that the automatic equalizer does not absorb the phase difference between the carrier waves. Of course, sacrificing the equalization ability is not allowed.

An object of the present invention is to provide an automatic equalizer that operates without sacrificing equalization ability, and that does not absorb the phase difference between carrier waves, but allows the phase synchronizer to absorb it preferentially.

That is, the present invention includes a complex multiplier that multiplies by a variable tap weight C _i consisting of a real part C _iR and an imaginary part C _iI ;
A transversal type device which takes the tap weight C _i as the output and the tap weight update amount as input, and comprises an integrator provided corresponding to the real part and imaginary part of each tap output, and a complex multiplier output and an adder regarding each tap output. The automatic equalizer is characterized in that a part of the imaginary part of the tap weight has leakage characteristics. Here, the leakage characteristic means a characteristic in which the integral value always decreases at a constant rate. In other words, if the input becomes zero, the output decreases exponentially. In the case of FIG. 4, which will be described later, the perfect integral type occurs only when α=1, and the leakage characteristic occurs when 0<α<1. This applies to ordinary low-pass filters.

Here, the tap weight control algorithm for the automatic equalizer is described in "Automatic equalization for
The zero forcing method described in the paper titled "Digital Communication" is common.

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 shows how an automatic equalizer 3000 and a phase synchronized circuit for coherent detection 2000 operate in parallel, where a terminal 1000 is a carrier band signal input terminal and a terminal 1001 is a transmission code estimated value output terminal. In the automatic equalizer 3000, 1 and 2 are delay circuits equal to the pulse generation period T, and 3, 4, and 5 are variable complex taps [their values (weights) are C ₁ , C ₂ , and C ₃ . ], 6 is an adder. 14 is an automatic equalizer 30
A sampler that supplies sample values to 00 and 7
is a discriminator, and the transmission code is calculated from the automatic equalizer output X(t)
This is to estimate X^(t).

The phase synchronized circuit 2000 for synchronous detection includes a multiplication circuit 13 that performs synchronous detection, and a variable frequency oscillator (VCO).
12, and a low frequency amplifier 11.

4000 is a phase difference detection circuit that supplies a phase difference to the low frequency filter 11, which operates using the input and output of the discriminator 7 as two inputs. 8 is a complex conjugate circuit that inverts the polarity of the imaginary part to obtain the complex conjugate X^ ^* (t) of X^(t); 9 is a complex multiplier; 10 is a complex output of the complex multiplier; This is an imaginary part extractor that extracts only the imaginary part. If the discriminator input X(t) does not include distortion, then X(t)=X^(t)・e ^j 〓 ^e
It can be expressed as

Here, θ _e is the phase difference between the reference carrier waves.

Then, the output p of the imaginary part extractor 10 becomes p=I _n {X^(t)e ^-j 〓 ^e ·X^ ^* (t)} = |X^(t)| ² ·sinθ _e .

Now, in this circuit, if θ _e is absorbed by the center tap 4 of the automatic equalizer (Fig. 1), then the coefficient
C ₂ is set as ^{C 2} =cos·θ _e −jsinθ _e 1−jsinθ _e in order to make e j 〓 e· _{C 2} =1. At this time, it can be seen that the influence of θ _e is greatly expressed in the imaginary part of C ₂ . At this time, the output of the phase difference detector 4000 has already become zero. Therefore, if we conceive that the coefficient of the imaginary part C _2I of C ₂ approaches zero over time and leaks out Δθ at a time, this Δθ
Since this time appears in the output of the phase difference detector 4000, this phase difference is absorbed by the phase synchronization circuit 2000.

In this way, the steady phase difference θ _e absorbed by the automatic equalizer will eventually be absorbed only by the phase locking circuit, resulting in C ₂ = 1, and the center tap will be in the form of a direct connection. Now you can operate with
The poor frequency characteristics will no longer be exposed.

Figure 2 shows the actual model of center tap 4 in Figure 1, where the complex tap C ₂ is 40,4
This is realized by four real number taps: 1, 42, and 43. Here, the real part and imaginary part of the received signal are added to the signal lines 8000 and 9000, respectively, and the complex signal after equalization is divided into the real part and the imaginary part, and the signal line 8000 and 7000 are respectively added.
It goes out to the 00 terminal.

Delay circuits 1 and 2 are actually 10, 11, 20,
Each of the 21 delay circuits is composed of two delay circuits.

Here, taps 40 and 41 represent the real part C _2R of C ₂ , and taps 42 and 43 represent the imaginary part |C _iR | of C ₂ .

Therefore, the value of the taps 42 and 43 should be devised to gradually leak.

FIG. 3 shows an example of a conventional variable tap, including a multiplier 400 and a digital-to-analog converter 40.
1. It consists of a digital integrator 402.

Tap-wait control is performed by inputting a control input to the digital integrator 402 to change the integrated value, and this change is expressed as a change in the analog value by the digital-to-analog converter 401. It will control the amount of signal that passes through multiplier 400.

FIG. 4 shows a block diagram of an embodiment of the tap having leakage characteristics according to the present invention.
1,422 multiplier, digital-to-analog converter, and digital integrator are 400,40 in Figure 3.
It is the same as 1,402.

A subtracter 423 and a coefficient circuit 424 are newly added. Now, if the coefficient of the coefficient circuit is α, terminal 5
The transfer characteristic F(S) between 002 and 5003 is as follows from the figure: F(S)=α/S/1+α/S=α/S+α, and it can be seen that this is an integrator with leakage characteristics.

Then tap like this as tap 4 in Figure 2.
2.43 is an embodiment of the present invention.

In the above explanation, the imaginary part C _2I of tap weight C ₂
Although only the one corresponding to C i was replaced with one having leakage characteristics, it is also possible to replace it with one corresponding to the imaginary part C _iI of any tap weight C _i more generally.

As described above, the present invention provides an automatic equalizer that operates without sacrificing equalization ability and that does not absorb the phase difference between carrier waves, but instead allows the phase synchronizer to absorb it preferentially. be able to. Note that by selecting a small leakage amount of the integrator, the ability as an equalizer is not impaired.

[Brief explanation of drawings]

Fig. 1 is a diagram showing an example in which an automatic equalizer and a phase locked circuit for synchronous detection operate in parallel, and Fig. 2 is a block diagram showing an embodiment of the present invention, where taps 42 and 43 leak. It is a variable tap with characteristics,
FIG. 3 shows an embodiment of a conventional variable tap, and FIG. 4 shows an embodiment of a variable tap with leakage characteristics according to the present invention.

Claims (1)

[Scope of Claims] 1. An automatic equalizer with a leakage characteristic tap consisting of the following (a) to (c). (a) A carrier band signal is input, the oscillation frequency of a variable frequency oscillator is controlled based on the output of a phase difference detection circuit described later, and the carrier band signal is synchronously detected;
a synchronous detector that outputs a complex signal; (b) a delay line with a tap into which the complex signal is input; and a variable tap weight C consisting of a real part C _iR and an imaginary part C _iI (i is an integer) at each tap output. A complex multiplier that multiplies _i and the update amount of the tap weight C _i value corresponding to each tap is input, and each C _iR and C _iI
an integrator that outputs , an adder that adds the outputs of complex multipliers provided corresponding to each of the tap outputs and uses this as a final output, and a discriminator that identifies the output of the adder. (c) an input signal and output of the _{discriminator} ; (c) an input signal and an output of the discriminator; a phase difference detection circuit that detects a phase difference between the output of the variable frequency oscillator and a carrier wave of the carrier wave band signal from the signal;