JPH021445B2 - - Google Patents

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to a bias circuit, and in particular is used for a circuit that selects and amplifies one of two or more input signals, and is used to eliminate shock noise when switching inputs. This invention relates to a bias circuit that makes it possible to do this.

Background of the Technology For example, in a tape recorder having an auto-reverse mechanism, it is necessary to select and amplify one of the signals from two heads. Since such switching between two heads is performed in a circuit stage with a relatively low signal level, shock noise is often generated during switching, and it is necessary to remove this shock noise by appropriate means.

Prior Art and Problems FIG. 1 shows the configuration of a conventional input selection amplifier circuit. The circuit in the figure consists of transistors Q ₁ , Q ₂ , ...,
Q ₁₁ , constant current circuit CS ₁ , CS ₂ , CS ₃ , resistor R ₁ , R ₂ ,
..., _R12 , transistors _C1 , _C2 , _C3 , diodes _D1 , _D2 , _D3 , amplifier _A1 , changeover switch SW1 _, etc. The emitters of transistors Q ₁ , Q ₂ and Q ₄ , Q ₅ are commonly connected to form a differential circuit. Transistors Q ₁ , Q ₂ and
The common emitters of Q ₄ and Q ₅ are each transistor
Connected to constant current circuit CS ₁ via Q ₃ and Q ₆ . The collectors of transistors Q ₁ and Q ₅ are commonly connected and connected to the power supply Vcc via a constant current circuit CS 2 that constitutes a load circuit, and the collectors of transistors Q 1 and Q ₅ are connected to the power supply Vcc through a constant current circuit CS ₂ that constitutes a load circuit.
is connected to the input terminal of transistor
Q ₁₁ , Zener diode D ₃ and resistors R ₁₁ , R ₁₂
constitutes a bias voltage generation circuit, and the bias voltage generated by this circuit is applied to the bases of transistors Q ₁ and Q ₅ of each differential circuit via resistors R ₁ and R ₂ , respectively. Resistance R ₃ , R ₄
and capacitor _C3 constitute a feedback circuit that defines the gain, frequency characteristics, etc. of the amplifier circuit shown in FIG. Note that resistor _R4 is a transistor
It also serves to apply the base bias voltage of Q ₂ and Q ₄ . Transistors Q ₇ , Q ₈ , Q ₉ ,
_Q10 etc. constitute a circuit that generates a switching signal for input switching.

In the circuit shown in Figure 1, when the changeover switch SW ₁ is off, the transistor is removed from the constant current circuit CS ₃ .
Current is supplied to the base of _Q10 and the transistor
_Q10 turns on. Therefore, transistor Q ₇
The base voltage of becomes smaller than the base voltage of transistor _Q8 , transistor _Q7 is turned off and transistor _Q8 is turned on. Therefore, the collector voltage of transistor _Q7 is at a high level, the collector voltage of transistor _Q8 is at a low level, transistor _Q3 is turned on, and transistor _Q6 is turned off. This connects the common emitters of transistors Q ₁ and Q ₂ to constant current circuit CS ₁ , and the signal from input terminal IN ₁ to the differential circuit and amplifier A ₁ constituted by transistors Q ₁ and Q ₂ . Therefore, it is amplified and output from the output terminal OUT. On the other hand, when selector switch SW ₁ is on,
Transistor Q ₁₀ is turned off, transistor Q ₇
is on and transistor _Q8 is off. Therefore, the collector voltage of transistor Q ₇ is at a low level, the collector voltage of transistor Q ₈ is at a high level, transistor Q ₃ is turned off, and the transistor
_Q6 turns on. Therefore, transistor Q ₄
The common emitters of Q 5 and Q ₅ are connected to a constant current circuit CS ₁ , and the signal input from input terminal IN ₂ is amplified by a differential circuit constituted by transistors Q ₄ and Q ₅ and an amplifier A ₁ . output terminal
Output from OUT. In this way, in the circuit shown in Fig. 1, by turning the changeover switch SW ₁ on or off, the signal applied to either one of the two input terminals IN ₁ and IN ₂ is selectively amplified. becomes possible.

However, in the circuit of FIG. 1, the base bias current I _B of each input transistor Q ₁ and Q ₅
are the high resistance bias resistors R ₁ and R ₂ respectively
Supplied via. Therefore, when the input is switched by the changeover switch _SW1 , the base potentials of the input transistors _Q1 and _Q5 vary by _R1 ×I _B and _R2 ×I _B , respectively. For this reason,
The conventional circuit shown in FIG. 1 has the disadvantage that a pulse voltage is generated at the base of each input transistor Q ₁ and Q ₅ during input switching, resulting in unpleasant shock noise.

OBJECT OF THE INVENTION In view of the problems in the conventional type described above, an object of the present invention is to provide a bias circuit for an input selection amplifier circuit that selectively amplifies one of a plurality of input signals.
Based on the concept of supplying the bias current of the input transistor using a current mirror circuit, this prevents the base potential from changing when switching inputs.
The purpose is to prevent the occurrence of unpleasant shock noise.

Structure of the Invention According to the present invention, the present invention provides two or more sets of input differential circuit stages, a constant current circuit common to each input differential circuit stage, and a common emitter section of each input differential circuit stage. An input selection amplifier circuit comprising switching transistors each connected to a constant current circuit, and performing input switching by turning on one of the switching transistors of one set and operating the input differential circuit stage of the set. a bias circuit, wherein the bias circuit is based on a first current mirror circuit that supplies a base current of a corresponding switching transistor for each input differential circuit stage, and a current flowing through the first current mirror circuit; This is achieved by providing a bias circuit characterized in that it comprises a second current mirror circuit that supplies the base bias current of the transistors of the input differential circuit stage.

Examples of the invention Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 shows the configuration of an input selection amplifier circuit equipped with a bias circuit according to an embodiment of the present invention. The circuit shown in the figure is the same as the circuit shown in FIG. 1, with the addition of a current mirror circuit for supplying base bias currents to the input transistors _Q1 and _Q5 . i.e. transistors Q ₁₂ and Q ₁₃
Current mirror circuit and transistor consisting of
The base bias current I _B of transistor Q ₁ due to the current mirror circuit consisting of Q ₁₄ and Q ₁₅
A current mirror circuit composed of transistors _Q16 and _Q17 and a current mirror circuit composed of transistors _Q18 and _Q19 supply base current _IB of transistor _Q5 . The bias voltage generation circuit composed of the transistor Q ₁₁ , the Zener diode D ₃ and the resistors R ₁₁ and R ₁₂ supplies only the base bias voltage to each transistor Q ₁ and Q ₅ via the resistors R ₁ and R ₂ respectively. , and no direct current flows through each bias resistor R ₁ and R ₂ .
The other parts are the same as the circuit of FIG. 1, and the same parts are given the same reference numerals.

In the circuit shown in Figure 2, when _the changeover switch SW ₁ is off, _the transistor Q ₁₀ is on and the transistor Q _{7 is} off _. current flows into. Further, current flows from the power supply Vcc to the base of the transistor _Q3 via the transistor _Q13 and the transistor _Q15 . As a result, transistor Q ₃ becomes conductive, a differential circuit including transistors Q ₁ and Q ₂ operates, and the signal from input terminal IN ₁ is amplified by the differential circuit and amplifier A ₁ and output from output terminal OUT. be done.
At this time, transistor Q ₈ is on and its collector voltage is at a low level, so transistor Q ₁₉ and therefore transistor Q ₁₈ are cut off, and transistor Q ₆ is in a cut-off state. Furthermore, in this case, the base current I _B of the transistor Q ₁ is supplied from the power supply Vcc via the transistor Q ₁₂ . Conversely, when switch SW ₁ is on, transistor Q ₁₀ is cut off, transistor Q ₇ is on, and transistor Q ₈ is turned on.
is turned off. Therefore, the base current is supplied to the transistor Q ₆ via the transistors Q ₁₈ and Q ₁₉ , and the transistor Q ₆ is turned on. As a result, the differential circuit including transistors _Q4 and _Q5 operates, and the signal from the input terminal _IN2 is selectively amplified and output from the output terminal OUT.

By the way, in the circuit shown in Figure 2, Q ₁ to Q ₆
If the current amplification factor of is h _FE , then when the changeover switch SW ₁ is off and the differential circuit including transistors Q ₁ and Q ₂ is in the active state, the base current of transistor Q ₃ is approximately Io/h _FE . Become. here
Io is a current determined by the constant current circuit CS ₁ , and is set to a value approximately twice the current I ₁ determined by the constant current circuit CS ₂ . And since transistors _Q14 and _Q15 form a current mirror circuit, the collector of transistor _Q15 has
Io/2h _FE current flows, and this current flows through the transistor
This also applies to Q ₁₃ . Since transistors Q ₁₂ and Q ₁₃ also constitute a current mirror circuit, the same current Io/2h _FE also flows through the collector of transistor Q ₁₂ . Also, the base current I _B of transistor Q ₁ is I _B =
Io/2×(1/h _FE )=Io/2h _FE , which is equal to the collector current of transistor Q ₁₂ . Therefore, all of the base bias current of transistor Q ₁ is supplied from transistor Q ₁₂ , and no direct current flows through bias resistor R ₁ .

When the changeover switch SW ₁ is turned on, the same operation as described above is performed for the transistors Q ₄ , Q ₅ , Q ₆ and the transistors Q ₁₆ to Q ₁₉ ,
The base bias current of transistor Q ₅ is all supplied by transistor Q ₁₇ and bias resistor R ₂
No direct current flows through.

That is, in the circuit of FIG. 2, _the bias resistor R ₁
and each transistor because no current flows through R ₂
The base potentials of Q ₁ and Q ₅ do not fluctuate before and after switching of the changeover switch SW ₁ , and a pulse voltage and therefore no shock noise are generated at the time of switching.

In addition, in the above explanation, the current ratio of each current mirror circuit is assumed to be 1:1, but as long as the bias current of each transistor Q ₁ and Q ₅ can be supplied, the current ratio of each current mirror circuit is It is also possible to set it to other values.

Effects of the Invention As described above, according to the present invention, it is only necessary to add a current mirror circuit or the like to the conventional circuit, and the simple circuit configuration reduces the generation of pulse voltage when switching inputs, thereby reducing shock noise. This makes it possible to accurately prevent the occurrence of.

[Brief explanation of drawings]

FIG. 1 is an electric circuit diagram showing the configuration of an input selection amplifier circuit including a conventional bias circuit, and FIG. 2 is an electric circuit diagram showing the configuration of an input selection amplifier circuit including a bias circuit according to an embodiment of the present invention. It is a diagram. Q ₁ , Q ₂ , ..., Q ₁₉ : Transistor, CS ₁ ,
CS ₂ , CS ₃ : Constant current circuit, D ₁ , D ₂ , D ₃ : Diode, A ₁ : Amplifier, C ₁ , C ₂ , C ₃ : Capacitor,
R ₁ , R ₂ , ..., R: Resistor, SW ₁ : Changeover switch,
Vcc, Vcc ₂ : Power supply.

Claims (1)

[Claims] 1. A plurality of sets of input differential circuit stages, a constant current circuit common to each input differential circuit stage, and switching transistors each connected between the common emitter section of each input differential circuit stage and the constant current circuit. Equipped with
A bias circuit for an input selection amplifier circuit that performs input switching by turning on a switching transistor of one of the sets and operating the input differential circuit stage of the set, the bias circuit being connected to each input differential circuit stage. a first current mirror circuit that supplies the base current of the switching transistor; and a second current mirror circuit that supplies the base bias current of the transistor of the input differential circuit stage based on the current flowing through the first current mirror circuit; A bias circuit comprising a current mirror circuit.