JPH0220141B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a method for manufacturing a semiconductor device in which an unnecessary Al film on an organic insulating film is removed by dry etching in a lift-off method.

(Prior Art) As semiconductor devices become more highly integrated, it becomes necessary to adopt a multilayer wiring structure. Multilayer wiring refers to forming a first wiring on a semiconductor substrate, depositing an insulating film on top of it, and then forming a second wiring, and the insulating film between the wirings must be as flat as possible. is desirable.

FIG. 1 is a cross-sectional view of a multilayer wiring structure formed by a conventional semiconductor device manufacturing method. In this method, a first Al wiring 2 with a step difference of 5000 Å to 10000 Å is formed on a semiconductor substrate 1, a PSG film having approximately the same thickness as the first Al wiring 2 is deposited as an insulating film 3, and a second Al A state in which the wiring 4 is formed is shown.

If the insulating film 3 is not particularly planarized, the first Al
A fairly steep step (sometimes a concave depression) can be seen at the wiring 2. Therefore, the second Al wiring 4 formed thereon also has a steep step similar to the insulating film 3. In this stepped portion 5, there is a risk that the second Al wiring 4 may become disconnected or short-circuited.

As a method to solve this problem, there is a planarization method called lift-off method. FIG. 2 shows a process diagram of the lift-off method. First, as shown in FIG. 2A, a PSG film with a thickness of approximately 5000 Å to 10000 Å is formed as a first insulating film 12 on a semiconductor substrate 11, and a photosensitive organic film 13 patterned thereon is used as a mask to form the first insulating film 12. The film 12 is selectively etched.

Next, as shown in FIG. 2b, after forming the first Al wiring 14 on the entire surface, the photosensitive organic film 13 is removed, and the first Al wiring 14 on the photosensitive organic film 13 is
By removing , a flat surface is obtained as shown in Figure 2c.

Therefore, the second insulating film 15 to be formed next becomes a flat film with no steps as shown in FIG. 2d.

However, this method does not apply to the photosensitive organic coating 13.
By removing the first Al wiring 14 on the photosensitive organic film, excess material of the first Al wiring 14 remains in the removal solution for the photosensitive organic film 13.

For this reason, the etching solution for the photosensitive organic film 13 is contaminated, resulting in a disadvantage that it is unsuitable for mass processing.

Further, as another conventional planarization method, there is a planarization method using an etching method as shown in FIG.
FIG. 3a shows that after forming a first Al wiring 22 on a semiconductor substrate 21 and forming a PSG film as a first insulating film 23 on the entire surface, it is thin on the convex parts and thick on other parts.
An organic film 24 is spin-coated.

Next, dry etching is performed under conditions such that the organic film 24 and the PSG film have approximately the same etching rate, until the PSG film appears on the entire surface as shown in FIG. 3b, and the flat surface shape of the organic film 24 is There is a method of transferring to the PSG film 23'.

This method has the disadvantage that etching is stopped midway through the PSG film, making it difficult to detect the end point, and that the thickness of the insulating film changes due to variations in etching speed within the wafer.

Furthermore, it is difficult to obtain stable planarization due to fluctuations in the etching rate ratio between PSG and the organic film 24, and the surface shape of the organic film 24 depending on the underlying pattern.

(Purpose of the Invention) This invention was made to eliminate the above-mentioned conventional drawbacks, and it is possible to obtain a flat surface of an insulating film with good reproducibility, prevent wiring disconnections and short circuits, and improve LSI performance. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can achieve high integration, high speed, and high reliability.

(Summary of the Invention) The main point of this invention is that an insulating film on a semiconductor substrate is etched using the pattern of the first photosensitive organic film as a mask, and then a wiring layer is formed on the entire surface, and a second organic film with a flattened surface is etched. The films are sequentially formed, and then etching is performed until the wiring layer on the first photosensitive organic film is removed, and the remaining first photosensitive organic film and second organic film are further removed. This is what I did.

(Example) Hereinafter, an example of the method for manufacturing a semiconductor device of the present invention will be described based on the drawings.

FIGS. 4a to 4f are cross-sectional views showing the first embodiment of the present invention in the order of steps. First, Figure 4a
CVD is applied on the semiconductor substrate 31 as shown in
A PSG film 32 of approximately 1 μm is formed as an insulating film by the (Chemical Vapor Deposition) method, and a photoresist film 3 is patterned as an organic film.
3 as a mask, the PSG film 32 is selectively etched.

Next, as shown in FIG. 4B, an Al film 34 is formed as a wiring layer with approximately the same thickness as the PSG film 32 over the entire surface while leaving the photoresist film 33.

Next, as shown in FIG. 4c, an organic film such as a photoresist film 35 is spin-coated over the entire surface, and is formed to be thicker in the recesses and thinner in other parts so as to flatten the surface.

Next, as shown in FIG. 4d, until the unnecessary Al film 34 on the photoresist film 33 is removed,
The photoresist film 35 and the Al film 34 are etched. This etching is performed by dry etching.

A suitable etching rate ratio between the photoresist 35 and the Al film 34 is 1:1 to 4. To give an example of an etching method, a parallel plate type device is used, and the etching gas is BCl ₃ :CF ₄ +5%O ₂ =
When carried out at a pressure of about 20pa with a 4:1 mixed gas,
The etch rate ratio of photoresist:Al film is approximately 1:3, which is suitable for this embodiment.

The end point of this etching is when the unnecessary Al film 34 is gone, so the end point can be detected by detecting a decrease in the Al emission intensity at a wavelength of 396 μm.

After removing the unnecessary Al film 34, the remaining photoresist films 33' and 35' are removed by O ₂ plasma etching as shown in FIG. 4e, and then a PSG film 36 is formed on the entire surface by CVD method. As a result, a flat surface shape as shown in FIG. 4f is obtained.

As explained above, in the first embodiment, unlike the conventional lift-off method, unnecessary Al film is not left as a solid substance by dry etching, so there is no problem of contaminating the solution. It has the advantage of being able to be processed in large quantities.

In addition, not only is it possible to detect the end point of etching to remove the unnecessary Al film, but since there is an unnecessary photoresist film 33' under the Al film to be removed, some over-etching is required. There is no change in flatness even with aging, and flattening is achieved with good reproducibility.

Furthermore, according to the above embodiment, the photoresist film coated on the surface of the flat insulating film can be obtained as a uniform film thickness with no unevenness, so this can be applied as a technical means to obtain a highly accurate mask pattern. Is possible.

In the first embodiment, the case where the formation of the Al film 34 in FIG. 4b was completely separated by the photoresist film 33 was explained. The Al film may adhere to the side wall of the film 33.

In this case, most of the unnecessary Al film 34 can be removed by dry etching, but
A small amount may remain on the shoulder of the Al wiring. this
Al can be removed by performing a little isotropic etching (wet etching) during the step of FIG. 4e.

At this time, as shown in FIG.
A groove portion 46 is formed between the Al film 43 on the substrate 1 and the PSG film 42 . In order to fill this groove, the insulating film 36 in the first embodiment is filled with a silica film 44 formed by spin coating instead of only the PSG film formed by the CVD method, and then a PSG film 44 formed by the CVD method is used to fill the groove. By forming the insulating film in two steps, as shown in FIG. 5, a completely flat surface can be obtained.

This method has the advantage that it has almost no effect on the shape of the photoresist film 33 or the state of separation between the wiring portion and the unnecessary portion of the Al film 34, and that a surface shape with excellent flatness can be obtained.

(Effects of the Invention) As described above, according to the method for manufacturing a semiconductor device of the present invention, an insulating film on a semiconductor substrate is etched using the pattern of the first photosensitive organic film as a mask, and then a wiring layer is etched over the entire surface. , a second organic film with a flattened surface is sequentially formed, and then a first film is formed.
Dry etching was performed until the wiring layer on the photosensitive organic film was removed, and the remaining first and second photosensitive organic films were removed to flatten the surface, resulting in a multilayer wiring structure. In this case, this unnecessary first layer wiring does not remain as a solid substance, so it is easy to dispose of it.

In addition, in dry etching, since there is an organic film underlying the wiring layer as the first layer wiring to be removed, there is a margin for overetching, and it is possible to flatten the insulating film without the need for particularly technically difficult etching. Surfaces can be obtained with good reproducibility.

This not only solves the problems of disconnections in the second layer wiring and short circuits between the first and second layer wiring, but also as a method for forming multilayer wiring in semiconductor devices, as well as a highly accurate mask pattern. As a method of obtaining it, it has the effect of being able to obtain a wide range of utility values.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a multilayer wiring structure according to a conventional semiconductor device manufacturing method, FIGS. 2a to 2d are process explanatory diagrams of an example of a conventional semiconductor device manufacturing method, and FIGS. Figure b is a process explanatory diagram of another example of the conventional semiconductor device manufacturing method, and Figures 4a to 4 are respectively
FIG. 4f is a process explanatory diagram of one embodiment of the method for manufacturing a semiconductor device according to the present invention, and FIG. 5 is a sectional view for explaining another embodiment of the method for manufacturing a semiconductor device according to the present invention. 31, 41...semiconductor substrate, 32, 42, 4
4, 45... Insulating film, 33, 33', 35'... Photoresist film, 34, 43... Al film.

Claims (1)

[Claims] 1. A step of applying a patterned first photosensitive organic film on an insulating film formed on a semiconductor substrate and selectively etching the insulating film using the first photosensitive organic film as a mask, and this etching. Thereafter, a step of forming a wiring layer on the entire surface, a step of forming a second organic film on the wiring layer by flattening its surface, and a step of forming the wiring layer on the first photosensitive organic film. A method for manufacturing a semiconductor device, comprising the steps of: dry etching the entire surface until it is removed; and removing the first photosensitive organic film and the second organic film remaining by the dry etching. .