JPH0226472B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a control system for rotating a rotating body in phase synchronization with a predetermined reference signal.

Configuration of conventional example and its problems FIG. 1 shows a conventional example of a digitalized control system for a rotating body.

In Fig. 1, 1 is a rotating body and its drive motor, 2 is a frequency detection means (hereinafter referred to as FG) for detecting the rotation speed of the motor 1, and 3 is a frequency detection means for detecting the rotation speed of the motor 1 (FG signal), These components form a speed control loop. The speed control means 3 includes a digital frequency discrimination circuit (DF
D) 5, a mixing circuit (Mix) 6 that mixes the speed error signal which is DA converted and outputted from the DFD 5 and the phase error signal which is DA converted and outputted from the digital phase comparison circuit (DPC) 13, which will be described later.
and a drive circuit (MD) 7 that drives the motor 1 by inputting the output of the Mix 6.

8 is a phase detection means (hereinafter referred to as PG) for detecting the rotational phase of the motor 1, and 9 is a speed control means using a phase error obtained by comparing the phase of the output (PG signal) of PG8 with the internal reference signal O. 3 to control the rotational phase of the motor 1, and these components form a phase control loop. This phase control means 9 includes a latch pulse generation circuit (LPG) 11 which generates a latch pulse 7 and a clock pulse signal to which a predetermined inhibition is applied at the time of latch by inputting the PG signal E and a second clock pulse signal from an input terminal 10, and an internal reference. A preset pulse generation circuit (PPG) 12 that creates a preset pulse signal from the signal output and the second clock pulse signal, and an output clock of the LPG 11.
The output of the PPG is connected to the internal reference signal as input.
A digital phase comparator circuit (DPC) 13 that digitally compares the phase of the PG signal
The reference signal generation circuit (RSG) 14 detects a predetermined count value of and generates an internal reference signal O.

15 is a frequency discrimination detection circuit (F.
DD), 16 is a reference voltage generation circuit (RVG) that generates a reference voltage corresponding to the operating center voltage of the phase error key, 17 is a reference voltage generation circuit (RVG) that outputs the reference voltage when the output signal of the FDD 15 is "L", This is a switching circuit (SW) that outputs a phase error when the output signal is "H".

FIG. 2 shows operational waveforms of the main parts of FIG. 1. The symbols in FIG. 2 correspond to those in FIG. 1, and the operating waveform of the DPC 13 is expressed by DA conversion.

A trapezoidal wave is digitally created by the DPC 13 using the internal reference signal O, and this is latched by a latch pulse created from the PG signal E to obtain a phase error. DFD5 is outside the discrimination range and FDD
When the output signal of FDD15 is "L", the reference voltage of RVG16 is set as the output signal of S.W17, and when DFD5 enters the discrimination range and the output signal of FDD15 becomes "H", the phase error is set as the output signal of S.W17. I'm in the middle of the day.
This allows Mix outside the discrimination range of DFD5.
In step 6, the commonly used filter of the phase control loop is forced to the voltage at the center of phase locking, that is, the reference voltage of RVG16, to shorten the phase locking time of the phase control loop after DFD5 enters the discrimination range. ing.

However, in such a conventional configuration, there is no guarantee that the phase error voltage is necessarily a voltage that speeds up phase synchronization at the timing when the output signal of the FDD 15 changes from "L" to "H"; I don't know which one it will be. This is obvious because the phase comparison is performed between two different signals, and it is impossible to escape from the two-way (also called bidirectional) control that is the essence of the phase control loop. For this reason, there is a drawback that the phase synchronization pull-in time of the phase control loop becomes long after the output voltage of the FDD 15 is switched from the reference voltage to the phase error.

OBJECTS OF THE INVENTION It is an object of the present invention to eliminate such conventional drawbacks and shorten the phase synchronization pull-in time of the phase control loop.

Structure of the Invention The present invention includes a frequency detecting means for detecting the number of rotations of a rotating body, a speed control means for controlling the number of rotations of the rotating body by an output obtained by frequency discrimination of the output of the frequency detecting means, and a frequency detecting means for controlling the number of rotations of the rotating body based on an output obtained by frequency discrimination of the output of the frequency detecting means. frequency discrimination detection means for detecting whether the output frequency of the means is within or outside the discrimination range of the frequency discrimination in the speed control means; and phase detection means for detecting the rotational phase of the rotating body; Phase control means for generating a reference signal and controlling the rotational phase of the rotating body by controlling the speed control means using an output obtained by comparing the phases of the output of the phase detection means and the reference signal. death,
The phase control means includes a preset pulse generation circuit that generates a first preset pulse from the reference signal, and a latch pulse that generates a latch pulse from the output of the phase detection means, and a second preset pulse that precedes the latch pulse in timing. a digital phase comparator circuit that presets a preset value NP using the first preset pulse to create a trapezoidal wave for phase comparison, and latches the trapezoidal wave using the latch pulse to obtain a phase error. and only when the frequency discrimination detection means outputs a detection output indicating outside the discrimination range, the second preset pulse causes the digital phase comparison circuit to set the operating center value NC of the phase comparison. It is characterized by being configured to generate a preset pulse.

DESCRIPTION OF EMBODIMENTS FIG. 3 shows one embodiment of the present invention, FIGS. 4 and 5 are operational waveform diagrams for explanation, FIG. 6 shows another embodiment of the present invention, and FIG. ~FIG. 9 is an operational waveform chart for explanation. Hereinafter, the differences between the present invention and the conventional one will be explained with reference to the drawings.

Figure 3 shows RVG16 and S from the conventional example in Figure 1.
Remove W17 and change the output of FDD15 to LPG1
1 as a new input, the second preset pulse set newly created by the LPG 11 is selectively outputted, and the first preset pulse set of the PPG 12 is input to the OR gate 18, and its OR output source is inputted to the OR gate 18. is the new preset pulse of DPC13, and the second preset pulse set is the new preset pulse of DPC13.
It is configured to be used as a preset value (NP) switching signal for No. 3. Note that the other configurations are the same as those in FIG. 1, and the numbers and symbols also correspond.

The operation of the present invention will be explained with reference to FIG. In the present invention, a new second preset pulse set is created by the LPG 11, but this second preset pulse set is a pulse that at least precedes the latch pulse 7 in terms of timing, and the output signal of the FDD 15 is "L". The configuration is such that the signal is output when the signal is "H" and not output when the signal is "H". When presetting with the second preset pulse set, the second preset pulse sets DPD from the preset value NP used when presetting with the first preset pulse set.
By switching and presetting the value NC at the center of the phase comparison of step 13, the DPC13 is forcibly locked by the PG signal error, and the phase error outside the discrimination range of the DFD5 is set to the output step of S.W17 in Fig. 1. It is obtained as an equivalent.

Next, when the DFD5 is within the discrimination range, the second preset pulse set is not output and preset operation is possible using only the first preset pulse set.
This enables normal phase comparison in the DPC 13.

With such a configuration of the present invention, when the DFD 5 is outside the frequency discrimination range, the second preset pulse set sets the DPC 13 to the operation center value NC for phase comparison.
Since the phase error can be preset (centered on forced operation), the phase error obtained by latching with the latch pulse check can be set as the center value. This allows DP
C13 is locked to PG signal E,
Obtained by decoding the count value NF of DPC13
The internal reference signal O of the RSG 14 also becomes a signal with a certain time difference (NC-NF in the count value). That is, the internal reference signal O is also locked to the PG signal E. In addition,
Preset value NP by first preset pulse check
Presetting is done normally.

Even if the speed control means 3 is controlled by the phase error key in such a state, variable speed control for changing the speed will not be performed. Therefore, the speed control means 3 can control the rotating body 1 in one direction, acceleration or deceleration, to quickly bring it close to the target speed.

When the rotating body 1 approaches the target speed and falls within the frequency discrimination range, the output of the second preset pulse set is stopped and only the preset value NP is preset by the first preset pulse set. Therefore, the internal reference signal O after the forced operation center is released is obtained at regular intervals. At this time, if the period of the PG signal E is within the range of 1 to 1.5 times the period of the internal reference signal O, the phase error obtained by latching with the latch pulse signal will be at the "L" level as shown in Figure 4. . As a result, the speed control means 3
Since the rotating body 1 can be controlled to accelerate through
The trapezoidal wave, which is the target phase, can be pulled into the inclination center (operation center) only by acceleration.

On the other hand, if the period of the PG signal E is within the range of 1 to 0.5 times the period of the internal reference signal O, the phase error obtained by latching by the latch pulse signal becomes "H" level. Therefore, this time only the reverse deceleration to the above case can be performed. That is, one-way control can be realized.

As is clear from the above explanation, with the configuration of the present invention, one-way control by the phase control means 9 can be realized, and compared to the conventional two-way control, the synchronization pull to the target phase can be shortened. Can be done.

FIG. 5 is a waveform diagram showing DA conversion to explain how to use the counter of the DPC 13 shown in FIG.

Taking as an example a configuration in which an M-bit down counter A creates a slope part of a trapezoidal wave C to obtain a phase error from its lower N bits B, the count values NH and NL of the slope part and the operation center value NC are determined. Trapezoidal wave C
The count value is calculated from the ratio of the leading phase D and the slow phase E of
Determine NP and NF. NP is a preset value, and NF is a feedback count value that serves as an internal reference signal.

In this way, if the trapezoidal wave C is arbitrarily created from the M-bit counter A, the operation center value NC for phase comparison can be any binary number, so the third
As shown in the figure, when presetting with the second preset pulse set,
It is necessary to switch the preset value of DPC13 from NP to NC. Normally this operation is done in ROM.

FIG. 6 shows another configuration example in which the preset value switching shown in FIG. 3 is omitted. The difference from the configuration in Figure 3 is as follows:
Create a reset pulse generator and a set pulse pulse from the PPG 12, and a preset pulse pulse from the LPG 11, and use the ORed output of the reset pulse generator and the reset pulse pulse at the OR gate 18 as the reset input of the DPC 13, and use the set pulse pulse as the set input of the DPC 13. It is a point.

The reset pulse set is the same as the method for creating the second preset pulse set in Fig. 3, but the relationship between the reset pulse set and the set pulse set of PPG12 is such that there is a portion where they overlap in terms of timing, and at least the set pulse set is the same as the reset pulse set. It needs to be a trailing pulse.

7 to 9 show examples of the use of the M-bit counter applicable to FIG. 6.

First, in Figure 7, the operating center value NC of DPC13
If the count value of the M-bit counter is O, that is, in binary
The case where ALL “O” point is selected is shown. In such a configuration, the preset operating center value NC in Fig. 3 is set to R.
There is no need to switch the OM, and a reset operation can be used. Also, in Figure 8
This figure shows how to use the operating center value NC of the DPC 13 in which only the Nth bit is "1" and all other bits are "O". In this case, only the Nth bit may be used by replacing the set/resetner input. At this time, the polarity of the Nth bit of the preset value NP must be reversed. Furthermore, FIG. 9 shows an example of use in which the lower (N-1) bit of the operating center value NC of the DPC 13 is set to "O" and the upper bits from the Nth bit to the Mth bit are set to "1". In this case, the upper bits from the Nth bit to the Mth bit are set.
The reset inputs may be replaced, and the preset value NP may be obtained by inverting the polarity of all upper bits from the Nth bit to the Mth bit.

If used as above, the operating center value NC
This eliminates the need to switch preset values to set the value.

Note that the present invention can achieve the same effect even when applied in addition to the conventional configuration, and the phase detection means 8 is also used as the frequency detection means 2, and the output (FG signal) a of the frequency detection means 2 is set to a desired frequency. The same effect can be obtained even if it is used in a descending manner. Further, the M-bit counter is not limited to the illustrated down counter, and the control method for the rotating body is not limited to the digital method.

Effects of the Invention As described above, the present invention detects whether the output frequency of the frequency detection means (frequency of the FG signal) is within the discrimination range of frequency discrimination in the speed control means or outside the discrimination range, and performs discrimination. Only when it is outside the range, the output (PG signal) of the phase detection means, that is, the second preset pulse, causes the digital phase comparison circuit of the phase control means to set the operating center value of the phase comparison.
Since the NC is configured to be a preset pulse, the output of the phase control means (phase error) can be equal (or almost equal) to the operating center value of the phase comparison outside the discrimination range, and when it is within the discrimination range. Immediately after input, the output can be at the "L" level or "H" level, so it is possible to achieve the effect of shortening the phase synchronization pull-in time compared to the conventional case.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional control method for a rotating body, FIG. 2 is an operation waveform diagram of FIG. 1, and FIG. 4 and 5 are operation waveform diagrams of the same embodiment, FIG. 6 is a block diagram showing another embodiment of the present invention, and FIGS. 7, 8, and 9 are diagrams of the implementation of FIG. 6, respectively. FIG. 3 is an example operational waveform diagram. 1... Rotating body, 2... Frequency detection means, 3...
Speed control means, 8... Phase detection means, 9... Phase control means.

Claims (1)

[Scope of Claims] 1. Frequency detection means for detecting the number of rotations of the rotating body; Speed control means for controlling the number of rotations of the rotating body by the output obtained by frequency-discriminating the output of the frequency detection means; and the frequency Frequency discrimination detection means for detecting whether the output frequency of the detection means is within or outside the discrimination range of the frequency discrimination in the speed control means; and Phase detection means for detecting the rotational phase of the rotating body. , generating a reference signal and controlling the rotation of the rotating body by controlling the speed control means by mixing the output obtained by comparing the phase of the output of the phase detection means and the reference signal with the speed control means; A phase control means for controlling the phase, the phase control means comprising: a preset pulse generation circuit for creating a first preset pulse from the reference signal; and a latch pulse for creating a latch pulse from the output of the phase detection means and for generating the first preset pulse from the output of the phase detection means. a latch pulse generation circuit that generates a second preset pulse that precedes the latch pulse in timing; and a latch pulse generator that generates a preset value by the first preset pulse.
a digital phase comparison circuit that presets NP to create a trapezoidal wave for phase comparison, and latches the trapezoidal wave using the latch pulse to obtain a phase error, and the frequency discrimination detection means indicates that the frequency is outside the discrimination range. Only when the detection output is output, the second
1. A control method for a rotating body, characterized in that the digital phase comparison circuit is configured to preset an operation center value NC for phase comparison using a preset pulse. 2. A control system for a rotating body according to claim 1, wherein the phase detection means is configured to step down the output of the frequency detection means. 3. Frequency detection means for detecting the rotational speed of the rotating body; speed control means for controlling the rotational speed of the rotating body based on the output obtained by frequency discrimination of the output of the frequency detection means; and an output frequency of the frequency detection means. Frequency discrimination detection means for detecting whether the frequency is within or outside the discrimination range of the frequency discrimination in the speed control means; Phase detection means for detecting the rotational phase of the rotating body; Generating a reference signal. and a phase control means that compares the phase of the output of the phase detection means and the reference signal; a reference voltage generation means that generates a reference voltage substantially equal to the operating center value of the phase comparison; and the frequency discrimination detection means that performs the discrimination. Mixing the output of the reference voltage generating means with the speed control means when outputting a detection output indicating outside the range, and mixing the output of the phase control means with the speed control means when outputting a detection output indicating within the discrimination range. a switching means for controlling the rotational phase of the rotating body by means of the following: a preset pulse generation circuit for generating a first preset pulse from the reference signal; and a latch pulse for generating a first preset pulse from the output of the phase detection means. a latch pulse generating circuit that generates a second preset pulse that precedes the latch pulse in timing;
a digital phase comparison circuit that presets NP to create a trapezoidal wave for phase comparison, and latches the trapezoidal wave using the latch pulse to obtain a phase error, and the frequency discrimination detection means indicates that the frequency is outside the discrimination range. Only when the detection output is output, the second
1. A control method for a rotating body, characterized in that the digital phase comparison circuit is configured to preset an operation center value NC for phase comparison using a preset pulse.