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JPH022650B2 - - Google Patents
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JPH022650B2 - - Google Patents

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Publication number
JPH022650B2
JPH022650B2 JP56049376A JP4937681A JPH022650B2 JP H022650 B2 JPH022650 B2 JP H022650B2 JP 56049376 A JP56049376 A JP 56049376A JP 4937681 A JP4937681 A JP 4937681A JP H022650 B2 JPH022650 B2 JP H022650B2
Authority
JP
Japan
Prior art keywords
machining
voltage
gap
time
discharge machining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56049376A
Other languages
Japanese (ja)
Other versions
JPS57168833A (en
Inventor
Masakazu Kishi
Atsushi Oomori
Yasuo Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Via Mechanics Ltd
Original Assignee
Hitachi Seiko Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Seiko Ltd filed Critical Hitachi Seiko Ltd
Priority to JP4937681A priority Critical patent/JPS57168833A/en
Publication of JPS57168833A publication Critical patent/JPS57168833A/en
Publication of JPH022650B2 publication Critical patent/JPH022650B2/ja
Granted legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23HWORKING OF METAL BY THE ACTION OF A HIGH CONCENTRATION OF ELECTRIC CURRENT ON A WORKPIECE USING AN ELECTRODE WHICH TAKES THE PLACE OF A TOOL; SUCH WORKING COMBINED WITH OTHER FORMS OF WORKING OF METAL
    • B23H1/00Electrical discharge machining, i.e. removing metal with a series of rapidly recurring electrical discharges between an electrode and a workpiece in the presence of a fluid dielectric
    • B23H1/02Electric circuits specially adapted therefor, e.g. power supply, control, preventing short circuits or other abnormal discharges
    • B23H1/024Detection of, and response to, abnormal gap conditions, e.g. short circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)

Description

【発明の詳細な説明】 本発明は、放電加工電圧印加時間に対する無ア
ーク放電時間、アーク放電時間、短絡時間をそれ
ぞれ定性的あるいは定量的に検出するとともに、
放電加工電圧印加時間に対してアーク放電時間が
異常に長く連続して発生する場合はその旨を検出
する放電加工状態検出方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention qualitatively or quantitatively detects the non-arc discharge time, arc discharge time, and short circuit time with respect to the electric discharge machining voltage application time, and
The present invention relates to an electric discharge machining state detection method that detects when an abnormally long arc discharge time occurs continuously compared to the electric discharge machining voltage application time.

放電に伴う電極消耗の現象を積極的に利用した
放電加工法は灯油や変圧器油などの加工液中に被
加工物(以下単に加工物と称す)と工具としての
加工電極とを極めて狭いギヤツプ間隔を保つて対
峙させた状態で、そのギヤツプを介して衝撃的な
過渡アーク放電を周期的に繰り返し発生させて加
工物を加工するものとして周知であるが、放電加
工を状態良好にして行なうためには放電加工中放
電ギヤツプ間電圧は適当な波形に維持されなけれ
ばならない。パルス状放電加工印加電圧に対する
放電ギヤツプ間電圧は便宜上第1図a〜dに示す
如く4種類に大別し得るが、このうち第1図に示
すギヤツプ間電圧Vga波形は正常放電に対するも
のであつて理想的であるが、ギヤツプ間隔の調整
制御などが適当でない場合は第1図b〜dに示す
如くになる。
The electrical discharge machining method, which actively utilizes the phenomenon of electrode wear caused by electrical discharge, is a process in which the workpiece (hereinafter simply referred to as the workpiece) and the machining electrode as a tool are separated into an extremely narrow gap in a machining fluid such as kerosene or transformer oil. It is well known that the workpiece is machined by periodically and repeatedly generating an impactful transient arc discharge through the gap while facing each other at a distance, but in order to perform electrical discharge machining in good condition During electrical discharge machining, the voltage across the discharge gap must be maintained at an appropriate waveform. For convenience, the discharge gap voltage with respect to the applied voltage during pulsed electrical discharge machining can be roughly divided into four types as shown in Figures 1a to d. Of these, the gap gap voltage Vga waveform shown in Figure 1 is for normal discharge. However, if the gap interval adjustment control is not appropriate, the result will be as shown in FIGS. 1b to 1d.

即ち、第1図bは加工電圧印加中アーク放電が
持続する場合のギヤツプ間電圧Vgb波形を、ま
た、第1図cは加工物と加工電極とが接触して短
絡状態にある場合のギヤツプ間電圧Vgc波形を、
更に第1図dはギヤツプ間隔が大なるが故に過渡
アーク放電が生じない場合でのギヤツプ間電圧
Vgd波形を示す。これらギヤツプ間電圧Vgb〜
Vgd波形のうち、Vgdは加工状態には特に悪影響
を及ぼさないが、ギヤツプ間電圧VgbとVgc波形
は仕上面あらさを悪化させたり電極消耗を増大さ
せ、一方、Vga波形でのアーク放電時間を大きく
することは加工条件を良好にすることである。し
たがつて、以上の理由よりしてギヤツプ間電圧
Vgb,Vgc波形を検出して放電加工を制御するこ
とは極めて重要であるといえる。
That is, Fig. 1b shows the gap voltage Vgb waveform when arc discharge continues during application of the machining voltage, and Fig. 1c shows the gap gap voltage Vgb waveform when the workpiece and the machining electrode are in contact and in a short-circuit state. Voltage Vgc waveform,
Furthermore, Figure 1d shows the voltage between the gaps when transient arc discharge does not occur because the gap distance is large.
Shows Vgd waveform. The voltage between these gaps Vgb~
Of the Vgd waveforms, Vgd does not have a particularly negative effect on the machining conditions, but the inter-gap voltage Vgb and Vgc waveforms worsen the roughness of the finished surface and increase electrode wear.On the other hand, the arc discharge time with the Vga waveform Increasing the size means improving processing conditions. Therefore, for the above reasons, the gap voltage
It can be said that it is extremely important to control electrical discharge machining by detecting the Vgb and Vgc waveforms.

これまでのギヤツプ間電圧Vgb波形の如きもの
を検出することによつて放電加工を制御すること
は考えられていないわけではない。例えば昭和53
年特許願第122425号においては第1図a〜dに示
すようにギヤツプ間電圧波形を4種類に区別する
ことが開示されており、それら4種類の波形の発
生頻度を定量化して捉えることによつて現時点で
の加工状態の良否を把握したり加工状態が良好で
ない場合は加工液圧や加工電圧印加周期、加工電
圧値などについてのその後の放電加工の制御に定
量化値は供されるようになつている。しかし、加
工速度が変更された場合には検出された定量化値
と加工速度との間の対応付に若干の狂いがあり、
如何なる加工速度であつても正確に加工状態の良
否が把握し得ないばかりか、その後の制御も正確
に行ない得ないという欠点がある。なお、ここに
いう制御とは加工状態が良好であつて、しかも加
工速度が大である方向の制御を指す。
It is not unthinkable to control electrical discharge machining by detecting something like the conventional gap voltage Vgb waveform. For example, Showa 53
Patent Application No. 122425 of 2007 discloses that gap voltage waveforms are divided into four types as shown in Figures 1a to d, and the frequency of occurrence of these four types of waveforms is quantified and captured. Therefore, it is possible to understand whether the current machining condition is good or not, and if the machining condition is not good, the quantified values can be used to control the subsequent electric discharge machining with regard to machining fluid pressure, machining voltage application cycle, machining voltage value, etc. It's getting old. However, when the machining speed is changed, there is a slight discrepancy in the correspondence between the detected quantification value and the machining speed.
The drawback is that it is not possible to accurately determine whether the machining condition is good or bad at any machining speed, and it is also impossible to perform subsequent control accurately. Note that the control referred to here refers to control in a direction in which the machining condition is good and the machining speed is high.

本発明の目的は、如何なる加工速度であつても
正確に放電加工状態を定性的あるいは定量的に把
握することによつて、現時点での放電加工状態の
良否を正確に把握するとともに、その後の放電加
工制御が正確に行なわれるようにすることにあ
る。
The purpose of the present invention is to accurately grasp the electrical discharge machining state qualitatively or quantitatively at any machining speed, thereby accurately grasping the quality of the electrical discharge machining state at the present time, and also to accurately grasp the quality of the electrical discharge machining state at the present time. The purpose is to ensure that processing control is performed accurately.

この目的のため本発明は、放電加工電圧が加工
物と加工電極とに繰り返し周期的に印加されてい
る間、比較的長い加工時間に亘つて放電加工電圧
印加時間(あるいはその加工時間)に対する無ア
ーク放電時間、アーク放電時間、短絡時間の割合
を定性的あるいは定量的に、しかも一義的に対応
付して把握することにより所期の目的を達せんと
するものである。
For this purpose, the present invention aims to reduce the impact on the electrical discharge machining voltage application time (or its machining time) over a relatively long machining time while the electrical discharge machining voltage is repeatedly and periodically applied to the workpiece and the machining electrode. The purpose is to achieve the desired objective by qualitatively or quantitatively understanding the ratio of arc discharge time, arc discharge time, and short-circuit time in a unique manner.

以下、本発明を第2図、第3図により説明す
る。
The present invention will be explained below with reference to FIGS. 2 and 3.

第2図は本発明の一実施例に係る回路構成を、
また、第3図はその回路構成における要部での入
出力信号波形例を示したものである。
FIG. 2 shows a circuit configuration according to an embodiment of the present invention.
Further, FIG. 3 shows an example of input/output signal waveforms at the main part of the circuit configuration.

第2図に示す如く工具電極2と加工物3に対し
てはパルス電源1より周期的に矩形状の放電加工
電圧が印加され、これにより放電加工が行なわれ
ることになるが、その際でのギヤツプ間電圧信号
A波形は例えば第3図に示す如くである。このギ
ヤツプ間電圧信号Aは設定器4,5からのしきい
値電圧E1,E2が入力されているコンパレータ6,
7によつてしきい値処理される。しきい値電圧
E1,E2は第3図に示す如く設定されていること
から、信号Aがアーク放電状態にある間コンパレ
ータ6,7はそれぞれハイレベル状態の信号を出
力する。一方、パルス電源1からは放電加工電圧
に同期した信号が出力されており、したがつて
この信号とコンパレータ6,7の出力信号を論
理的に処理すれば、放電加工周期あるいは放電加
工電圧印加時間に占める無アーク放電時間、アー
ク放電時間、短絡時間の割合が知れるものであ
る。即ち、コンパレータ6,7の出力信号が入力
されているアンドゲート8はその出力信号Bとし
てアーク放電時間に応じてハイレベルの信号を、
また、コンパレータ6の出力信号と信号が入力
されているノアゲート17はその出力信号Gとし
て無アーク放電時間に応じてハイレベルの信号
を、更にコンパレータ7の出力信号と信号が入
力されているノアゲート18はその出力信号Hと
して短絡時間に応じてハイレベルの信号を出力す
るものである。しかして、適当な複数の放電加工
周期に亘つて出力信号B,G,Hが各々ハイレベ
ルの状態にある時間をカウンタあるいは積分回路
で以て積分し、各々の積分値をその複数の放電加
工電圧印加時間に相当した時間で除するようにす
れば、1回当りの放電加工におけるアーク放電、
無アーク放電、短絡それぞれの時間割合が求めら
れるものである。これらの時間割合はアナログ的
あるいはデイジタル的に表示され、現時点での放
電加工状態の把握や後の放電加工の制御に供され
るわけである。なお、放電加工電圧印加時間の積
分値は信号の反転信号を積分することによつて
求められる。
As shown in Fig. 2, a rectangular electric discharge machining voltage is periodically applied to the tool electrode 2 and the workpiece 3 from the pulse power source 1, and electric discharge machining is performed thereby. The waveform of the gap voltage signal A is as shown in FIG. 3, for example. This gap voltage signal A is sent to a comparator 6, which receives threshold voltages E 1 and E 2 from setters 4 and 5.
7. threshold voltage
Since E 1 and E 2 are set as shown in FIG. 3, the comparators 6 and 7 each output a high level signal while the signal A is in the arc discharge state. On the other hand, the pulse power supply 1 outputs a signal synchronized with the electrical discharge machining voltage, and therefore, if this signal and the output signals of the comparators 6 and 7 are logically processed, the electrical discharge machining cycle or the electrical discharge machining voltage application time can be determined. The ratio of non-arc discharge time, arc discharge time, and short circuit time to the total time is known. That is, the AND gate 8 to which the output signals of the comparators 6 and 7 are input, outputs a high level signal as its output signal B in accordance with the arc discharge time.
Further, the NOR gate 17 to which the output signal of the comparator 6 and the signal are inputted outputs a high level signal according to the non-arc discharge time as its output signal G, and the NOR gate 18 to which the output signal and the signal from the comparator 7 are inputted. outputs a high level signal as its output signal H in accordance with the short circuit time. Then, the time during which the output signals B, G, and H are each in a high level state over a plurality of appropriate electrical discharge machining cycles is integrated using a counter or an integrating circuit, and each integrated value is calculated for each of the plurality of electrical discharge machining cycles. If you divide it by the time equivalent to the voltage application time, the arc discharge in one electric discharge machining,
The time ratios of non-arc discharge and short circuit are determined. These time ratios are displayed in analog or digital form and are used to understand the current state of electrical discharge machining and to control later electrical discharge machining. Note that the integral value of the electric discharge machining voltage application time is obtained by integrating the inverted signal of the signal.

ところで、電圧印加と同時にアーク放電が開始
される放電加工は望ましいものではないから、そ
のような放電加工が連続して発生する場合はその
旨を検出し、放電加工制御の設定を変更する必要
がある。本発明ではその検出を考慮している。第
2図に示す如くフリツプフロツプ10は信号B,
Cが入力されているノアゲート9の出力信号Dの
立下りによつてリセツトされ、信号がハイレベ
ルよりローレベルに移行する時点でセツトされる
ようになつており、しかして上記した如くのアー
ク放電が連続発生する場合はフリツプフロツプ1
0はその間セツトされ、そのセツト出力信号は積
分回路11によつて積分される。その積分値が設
定器12からのしきい値電圧E3を上まわるだけ
の時間Tが経過する場合はコンパレータ13はそ
の出力信号Fとしてハイレベルの信号を出力する
ようになり、この出力信号Fをして異常なアーク
放電加工状態を検出するものである。因みに本例
では2回連続した場合は直ちに検出するようにな
つているが、何回連続した場合に検出するかは積
分回路11の時定数による。また、本例では積分
回路11やコンパレータ13などを使用して異常
を検出しているが、フリツプフロツプ10がセツ
トされている間カウント可能状態におかれている
カウンタによつて信号Bをカウントするようにし
てもよいことは勿論である。尚、アンドゲート1
4、ノアゲート15はそれぞれ信号Fがハイレベ
ル、ローレベルにある間信号Bを出力するもので
あり、インバータ16は信号Bを反転させるため
のものである。
By the way, electric discharge machining in which arc discharge starts at the same time as voltage is applied is not desirable, so if such electric discharge machining occurs continuously, it is necessary to detect this fact and change the electric discharge machining control settings. be. The present invention takes this detection into consideration. As shown in FIG. 2, the flip-flop 10 receives signals B,
It is reset by the fall of the output signal D of the NOR gate 9 to which C is input, and is set when the signal changes from high level to low level, thus causing arc discharge as described above. If occurs continuously, flip-flop 1
0 is set during that time, and the set output signal is integrated by the integrating circuit 11. When the time T for which the integral value exceeds the threshold voltage E3 from the setting device 12 has elapsed, the comparator 13 outputs a high level signal as its output signal F, and this output signal F This is to detect abnormal arc discharge machining conditions. Incidentally, in this example, if the detection occurs twice in a row, it is immediately detected, but the number of consecutive detections depends on the time constant of the integrating circuit 11. In addition, in this example, an abnormality is detected using the integrating circuit 11, the comparator 13, etc., but the signal B is counted by a counter that is kept in a countable state while the flip-flop 10 is set. Of course, it is also possible to do so. Furthermore, and gate 1
4. The NOR gate 15 outputs the signal B while the signal F is at high level and low level, respectively, and the inverter 16 is for inverting the signal B.

以上説明したように本発明は、ギヤツプ間電圧
をしきい値処理した後論理的に処理することによ
り電圧印加時間に対する無アーク放電、アーク放
電、短絡の時間割合を検出するとともに、異常な
アーク放電が連続する場合はその旨を検出するも
のであるから、現時点での放電加工状態の良否が
加工速度に無関係に即知り得るばかりか、それら
検出値を用いてその後の放電加工制御を適正なら
しめ得るという効果がある。
As explained above, the present invention is capable of detecting the time ratio of no-arc discharge, arc discharge, and short-circuit to the voltage application time by logically processing the inter-gap voltage after threshold processing, and detecting abnormal arc discharge. If these are continuous, this is detected, so not only can you immediately know whether the current electrical discharge machining condition is good or bad, regardless of the machining speed, but you can also use these detected values to properly control subsequent electrical discharge machining. It has the effect of gaining.

【図面の簡単な説明】[Brief explanation of drawings]

第1図a〜dは、典型的な4種類のギヤツプ間
電圧波形を示す図、第2図は、本発明の一実施例
に係る回路構成図、第3図は、その要部における
一例での入出力信号波形図である。 1…パルス電源、2…加工電極、3…加工物、
4,5,12…(しきい値電圧)設定器、6,
7,13…コンパレータ、8…アンドゲート、
9,17,18…ノアゲート、10…フリツプフ
ロツプ、11…積分回路。
Figures 1 a to d are diagrams showing four typical gap voltage waveforms, Figure 2 is a circuit configuration diagram according to an embodiment of the present invention, and Figure 3 is an example of the main part thereof. FIG. 2 is an input/output signal waveform diagram of FIG. 1... Pulse power supply, 2... Machining electrode, 3... Workpiece,
4, 5, 12... (threshold voltage) setter, 6,
7, 13...Comparator, 8...And gate,
9, 17, 18...Nor gate, 10...flip-flop, 11...integrator circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 繰り返し周期的にギヤツプ間に印加される電
圧によつて被加工物が加工電極により加工される
放電加工において、放電加工中被加工物と加工電
極との間に存するギヤツプにかかるギヤツプ間電
圧信号を2種類のしきい値で処理し、該処理に係
る出力信号と印加電圧に同期した信号とを論理的
に処理することにより電圧印加の度に該電圧印加
時間における無アーク放電、アーク放電、短絡の
それぞれの状態時間割合を平均的に検出するとと
もに、電圧印加直後よりアーク放電状態にあるこ
とが所定の電圧印加回数に亘つて連続的に検出さ
れたことを以て、無アーク放電状態を伴わない放
電加工が行なわれていることを検出することを特
徴とする放電加工状態検出方法。
1 In electrical discharge machining, in which a workpiece is machined by a machining electrode using a voltage that is repeatedly and periodically applied across the gap, the gap-to-gap voltage signal applied to the gap that exists between the workpiece and the machining electrode during electrical discharge machining. By processing the output signal using two types of threshold values and logically processing the output signal related to the processing and the signal synchronized with the applied voltage, arc-free discharge, arc discharge, and In addition to detecting the average time ratio of each state of short circuit, if the arc discharge state is continuously detected for a predetermined number of voltage applications immediately after voltage application, no arc discharge state is present. A method for detecting electrical discharge machining status, characterized by detecting that electrical discharge machining is being performed.
JP4937681A 1981-04-03 1981-04-03 Detecting method of electric discharge machining condition Granted JPS57168833A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4937681A JPS57168833A (en) 1981-04-03 1981-04-03 Detecting method of electric discharge machining condition

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4937681A JPS57168833A (en) 1981-04-03 1981-04-03 Detecting method of electric discharge machining condition

Publications (2)

Publication Number Publication Date
JPS57168833A JPS57168833A (en) 1982-10-18
JPH022650B2 true JPH022650B2 (en) 1990-01-18

Family

ID=12829300

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4937681A Granted JPS57168833A (en) 1981-04-03 1981-04-03 Detecting method of electric discharge machining condition

Country Status (1)

Country Link
JP (1) JPS57168833A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050247569A1 (en) * 2004-05-07 2005-11-10 Lamphere Michael S Distributed arc electroerosion

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51119597A (en) * 1975-04-14 1976-10-20 Inoue Japax Res Inc Method and apparatus of controlling gap in discharge processing

Also Published As

Publication number Publication date
JPS57168833A (en) 1982-10-18

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