JPH0227802B2 - - Google Patents
Info
- Publication number
- JPH0227802B2 JPH0227802B2 JP58184630A JP18463083A JPH0227802B2 JP H0227802 B2 JPH0227802 B2 JP H0227802B2 JP 58184630 A JP58184630 A JP 58184630A JP 18463083 A JP18463083 A JP 18463083A JP H0227802 B2 JPH0227802 B2 JP H0227802B2
- Authority
- JP
- Japan
- Prior art keywords
- thermistor
- electrode
- glass
- substrate
- resistance value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Thermistors And Varistors (AREA)
Description
【発明の詳細な説明】
技術分野
本発明は、サーミスタ（感熱抵抗素子）の製造
方法に関し、更に詳細には、特性の良いサーミス
タを抵抗値のバラツキの少ない状態で得ることが
可能な製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a method for manufacturing a thermistor (heat-sensitive resistance element), and more particularly, to a method for manufacturing a thermistor with good characteristics with little variation in resistance value. .
従来技術
サーミスタは、ウエハー状のサーミスタ基板
に、厚膜印刷によつて多数の素子を得るように対
向電極を形成し、ダイヤモンドカツタ等で個々の
素子に切断することによつて得られる。ところ
で、抵抗値のバラツキを10％以下にすることが困
難であつた。Prior Art A thermistor is obtained by forming counter electrodes on a wafer-shaped thermistor substrate by thick film printing so as to obtain a large number of elements, and cutting the wafer-shaped thermistor substrate into individual elements using a diamond cutter or the like. However, it has been difficult to reduce the variation in resistance value to 10% or less.
発明の目的
そこで、本発明の目的は、抵抗値のバラツキの
少ないサーミスタを容易に得ることが出来る製造
方法を提供することにある。OBJECT OF THE INVENTION Therefore, an object of the present invention is to provide a manufacturing method that can easily obtain a thermistor with little variation in resistance value.
発明の構成
上記目的を達成するための本発明は、サーミス
タ基板の同一表面上に第１及び第２の電極を対向
した状態に設ける工程と、少なくとも前記第１の
電極と前記第２の電極との間の前記サーミスタ基
板の表面にガラスを塗布し、しかる後焼付ける工
程と、前記ガラスの焼付工程の後に前記第１の電
極と前記第２の電極との少なくとも一方をトリミ
ングして抵抗値の調整を行う行程とを含むサーミ
スタの製造方法に係わるものである。Composition of the Invention The present invention to achieve the above object includes a step of providing first and second electrodes in opposing states on the same surface of a thermistor substrate, and a step of providing at least the first electrode and the second electrode. A step of applying glass to the surface of the thermistor substrate between the steps and then baking it, and trimming at least one of the first electrode and the second electrode after the glass baking step to increase the resistance value. The present invention relates to a method of manufacturing a thermistor including a step of making adjustment.
発明の作用効果 上記発明によれば、次の作用効果が得られる。Effects of invention According to the above invention, the following effects can be obtained.
(イ) 基板の露出表面をガラスで保護するので、第
１の電極と第２の電極との間に電極の金属イオ
ンが流出し、イオンの移動（マイグレーシヨ
ン）が生じる現象を防止することが出来る。従
つて対向電極間の絶縁抵抗の低下が少なくな
る。(b) Since the exposed surface of the substrate is protected with glass, it is possible to prevent metal ions from the electrode from flowing out between the first electrode and the second electrode, causing ion migration. I can do it. Therefore, the decrease in insulation resistance between the opposing electrodes is reduced.
(ロ) ガラスを焼付けた後に、トリミングするの
で、ガラスの焼付に基づいてサーミスタ基板の
抵抗変化が生じても、これをトリミングで補正
することが出来る。従つて、所定の抵抗値公差
に入るサーミスタを容易に得ることが出来る。(b) Since trimming is performed after the glass is baked, even if a change in resistance of the thermistor substrate occurs due to the baking of the glass, this can be corrected by trimming. Therefore, a thermistor that falls within a predetermined resistance value tolerance can be easily obtained.
実施例
次に、第１図〜第７図を参照して本発明の実施
例に係わるサーミスタの製造方法について述べ
る。Embodiment Next, a method for manufacturing a thermistor according to an embodiment of the present invention will be described with reference to FIGS. 1 to 7.
まず、１辺が４〜５cm程度のウエハー状のサー
ミスタ基板１を用意し、この基板１上に、第１図
及び第３図に示す如く、第１及び第２の電極２，
３をストライプ状に厚膜印刷技術で形成する。な
お、サーミスタ基板１は、MnO、NiO、CoOを
主成分とした組成物の焼結体であり、第１及び第
２の電極２，３は銀−パラジウムペーストを印刷
し、焼付けたものである。 First, a wafer-shaped thermistor substrate 1 with a side of about 4 to 5 cm is prepared, and on this substrate 1, as shown in FIGS. 1 and 3, first and second electrodes 2,
3 is formed into stripes using thick film printing technology. The thermistor substrate 1 is a sintered body of a composition mainly composed of MnO, NiO, and CoO, and the first and second electrodes 2 and 3 are printed and baked with silver-palladium paste. .
次に、第２図及び第４図に示す如く、第１及び
第２の電極２，３の間の基板露出面４及び第１及
び第２の電極２，３の一部を覆うようにホウケイ
酸ガラスを塗布し、好ましくは500〜550℃、より
好ましくは520〜530℃で焼付け、数μｍのガラス
被覆層５を形成する。 Next, as shown in FIG. 2 and FIG. Acid glass is applied and baked preferably at 500 to 550°C, more preferably at 520 to 530°C, to form a glass coating layer 5 of several micrometers.
次に、第２図及び第４図の鎖線の位置をダイヤ
モンドカツタで切断し、第５図に示すチツプ状の
サーミスタ６を得る。このようにして得られたサ
ーミスタ６の抵抗値が常に公差範囲に入るとは限
らない。ウエハー状サーミスタ基板の場所の変
化、ガラスの焼付条件の変化等によつて抵抗値の
バラツキがある。そこで、第６図及び第７図に示
す如く、例えば第１の電極２の一部をレーザによ
つてトリミングする。この場合、ガラス被覆層５
が電極２のトリミング部分の上にも設けられてい
るので、ガラス被覆層５を通して電極２をレーザ
ビームで除去する。 Next, the chip-shaped thermistor 6 shown in FIG. 5 is obtained by cutting with a diamond cutter at the positions indicated by chain lines in FIGS. 2 and 4. The resistance value of the thermistor 6 obtained in this way does not always fall within the tolerance range. The resistance value varies due to changes in the location of the wafer-shaped thermistor substrate, changes in the baking conditions of the glass, etc. Therefore, as shown in FIGS. 6 and 7, for example, a part of the first electrode 2 is trimmed using a laser. In this case, the glass coating layer 5
is also provided on the trimmed portion of the electrode 2, so the electrode 2 is removed with a laser beam through the glass covering layer 5.
上述の方法でサーミスタ６を形成すれば、トリ
ミング部分７はガラス被覆層５で被覆されない
が、その他の部分は被覆されているので、マイグ
レーシヨンの少ないサーミスタ素子を提供するこ
とが出来る。また、ガラス被覆層５を設けた後に
トリミングするので、ガラス被覆層５を設ける際
の加熱処理によるサーミスタ基板１の抵抗変化に
基づく抵抗値のバラツキをトリミングで少なくす
ることが出来、目標の抵抗値に対するバラツキが
少なく（約２％）なる。 If the thermistor 6 is formed by the above-described method, the trimming portion 7 is not covered with the glass coating layer 5, but the other portions are covered, so it is possible to provide a thermistor element with less migration. In addition, since trimming is performed after providing the glass coating layer 5, it is possible to reduce variations in the resistance value due to resistance changes of the thermistor substrate 1 due to heat treatment when providing the glass coating layer 5, and to achieve the target resistance value. There is less variation (approximately 2%).
次に、第８図及び第９図に示す本発明の別の実
施例について述べる。この実施例では、第８図に
示すようにサーミスタ基板１上に第１及び第２の
電極２，３を設け、更にこれ等の間の露出表面４
にガラス被覆層５を設ける。しかし、この例で
は、トリミング部分にはガラス被覆層５を設けな
い。そして、第９図に示す如く、電極２の一部を
サンドブラストで除去し、所望の抵抗値が得られ
るようにトリミングする。この方法によつても、
ガラス被覆層５をトリミング前に設けるので、抵
抗値のバラツキが少なくなる。またマイグレーシ
ヨンも防止される。 Next, another embodiment of the present invention shown in FIGS. 8 and 9 will be described. In this embodiment, first and second electrodes 2 and 3 are provided on the thermistor substrate 1 as shown in FIG.
A glass coating layer 5 is provided on. However, in this example, the glass coating layer 5 is not provided in the trimmed portion. Then, as shown in FIG. 9, a part of the electrode 2 is removed by sandblasting and trimmed to obtain a desired resistance value. Even with this method,
Since the glass coating layer 5 is provided before trimming, variations in resistance value are reduced. Migration is also prevented.
以上、実施例について述べたが、本発明はこれ
に限定されるものでなく、変形可能なものであ
る。例えば、第１図〜第７図の実施例に於いて、
トリミング部分にガラス被覆層を設けないように
してもよい。 Although the embodiments have been described above, the present invention is not limited thereto and can be modified. For example, in the embodiments of FIGS. 1 to 7,
The glass coating layer may not be provided on the trimmed portion.
第１図及び第２図は本発明の実施例に係わるサ
ーミスタを製造工程順に示す平面図、第３図は第
１図の−線断面図、第４図は第２図の−
線断面図、第５図は第４図のウエハーから得たサ
ーミスタを示す断面図、第６図はトリミングした
後のサーミスタを示す断面図、第７図は第６図の
サーミスタの平面図、第８図及び第９図は本発明
の別の実施例のサーミスタを工程順に示す断面図
である。
１……サーミスタ基板、２……第１の電極、３
……第２の電極、４……露出面、５……ガラス被
覆層、６……サーミスタ、７……トリミング部
分。
1 and 2 are plan views showing a thermistor according to an embodiment of the present invention in the order of manufacturing steps, FIG. 3 is a sectional view taken along the line -- in FIG. 1, and FIG. 4 is a - line sectional view in FIG. 2.
5 is a sectional view showing the thermistor obtained from the wafer shown in FIG. 4, FIG. 6 is a sectional view showing the thermistor after trimming, and FIG. 7 is a plan view of the thermistor shown in FIG. 8 and 9 are cross-sectional views showing a thermistor according to another embodiment of the present invention in the order of steps. DESCRIPTION OF SYMBOLS 1... Thermistor board, 2... First electrode, 3
... second electrode, 4 ... exposed surface, 5 ... glass coating layer, 6 ... thermistor, 7 ... trimming portion.
Claims (1)
の電極を対向した状態に設ける工程と、 少なくとも、前記第１の電極と前記第２の電極
との間の前記サーミスタ基板の表面にガラスを塗
布し、しかる後焼付ける工程と、 前記ガラスの焼付工程の後に前記第１の電極と
前記第２の電極との少なくとも一方をトリミング
して抵抗値の調整を行う工程と、 を含むサーミスタの製造方法。[Claims] 1. A first and a second thermistor board on the same surface of the thermistor substrate.
a step of providing electrodes facing each other, a step of applying glass to the surface of the thermistor substrate between at least the first electrode and the second electrode, and then baking the glass, and baking the glass. A method for manufacturing a thermistor, comprising: trimming at least one of the first electrode and the second electrode after the step to adjust the resistance value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58184630A JPS6076103A (en) | 1983-10-03 | 1983-10-03 | Method of producing thermistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58184630A JPS6076103A (en) | 1983-10-03 | 1983-10-03 | Method of producing thermistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6076103A JPS6076103A (en) | 1985-04-30 |
| JPH0227802B2 true JPH0227802B2 (en) | 1990-06-20 |
Family
ID=16156588
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58184630A Granted JPS6076103A (en) | 1983-10-03 | 1983-10-03 | Method of producing thermistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6076103A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4647182B2 (en) * | 2002-11-08 | 2011-03-09 | ローム株式会社 | Chip resistor manufacturing method and chip resistor |
| JP2009182144A (en) * | 2008-01-30 | 2009-08-13 | Koa Corp | Resistor and method of manufacturing the same |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5612702A (en) * | 1979-07-11 | 1981-02-07 | Tdk Electronics Co Ltd | Chip thermistor |
-
1983
- 1983-10-03 JP JP58184630A patent/JPS6076103A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6076103A (en) | 1985-04-30 |
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