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JPH0234546B2 - - Google Patents
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JPH0234546B2 - - Google Patents

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Publication number
JPH0234546B2
JPH0234546B2 JP59073811A JP7381184A JPH0234546B2 JP H0234546 B2 JPH0234546 B2 JP H0234546B2 JP 59073811 A JP59073811 A JP 59073811A JP 7381184 A JP7381184 A JP 7381184A JP H0234546 B2 JPH0234546 B2 JP H0234546B2
Authority
JP
Japan
Prior art keywords
circuit
signal
output
modulation
burst
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59073811A
Other languages
Japanese (ja)
Other versions
JPS60216654A (en
Inventor
Kyoshi Oota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP59073811A priority Critical patent/JPS60216654A/en
Priority to US06/716,270 priority patent/US4706262A/en
Priority to CA000477795A priority patent/CA1246253A/en
Priority to DE8585103848T priority patent/DE3587081T2/en
Priority to AU40521/85A priority patent/AU578082B2/en
Priority to EP85103848A priority patent/EP0156398B1/en
Publication of JPS60216654A publication Critical patent/JPS60216654A/en
Publication of JPH0234546B2 publication Critical patent/JPH0234546B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/10Arrangements for reducing cross-talk between channels
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00Demodulation of amplitude-modulated oscillations
    • H03D1/08Demodulation of amplitude-modulated oscillations by means of non-linear two-pole elements
    • H03D1/10Demodulation of amplitude-modulated oscillations by means of non-linear two-pole elements of diodes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/20Modulator circuits; Transmitter circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Power Engineering (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は、時分割多元接続通信方式のバースト
制御回路に関する。特に、バースト休止区間の搬
送波抑止特性のよいバースト制御回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a burst control circuit for a time division multiple access communication system. In particular, the present invention relates to a burst control circuit with good carrier wave suppression characteristics during burst pause periods.

〔従来技術の説明〕[Description of prior art]

一定包絡線のバースト信号をバースト制御信号
にてスイツチイングする場合に、搬送波の「オ
ン」「オフ」により瞬時的に周波数の範囲が拡散
して、他局の周波数帯や自局受信機への妨害が発
生する。これを防止するために、バースト信号の
立上りおよび立下りが急激に変化しないように制
御する回路が知られている。たとえばPSK
(Phase Shift Keying)方式の包絡線のように、
バースト信号区間での立上りおよび立下り特性を
なだらかに制御するバースト制御回路が一般に用
いられている。
When switching a burst signal with a constant envelope using a burst control signal, the frequency range is instantaneously spread by turning the carrier wave on and off, causing interference with other stations' frequency bands and the own station's receiver. A disturbance occurs. In order to prevent this, a circuit is known that controls the rise and fall of the burst signal so that they do not change suddenly. For example PSK
Like the envelope of the (Phase Shift Keying) method,
A burst control circuit that smoothly controls the rise and fall characteristics in a burst signal section is generally used.

第1図はこのための従来例回路構成図である。
入力端子1に与えられる高周波入力信号は、利得
制御回路2を介して電力増幅回路3に供給され、
電力増幅されて、出力端子4に送出される。この
とき、この出力は検出回路5により検出され、端
子6に与えられる制御信号により基準波形発生回
路7で発生する基準波形と、比較回路8により比
較されて誤差信号を得る。この誤差信号により利
得制御回路の増幅利得を制御する。
FIG. 1 is a conventional circuit configuration diagram for this purpose.
A high frequency input signal applied to the input terminal 1 is supplied to the power amplifier circuit 3 via the gain control circuit 2,
The power is amplified and sent to the output terminal 4. At this time, this output is detected by a detection circuit 5, and compared with a reference waveform generated by a reference waveform generation circuit 7 in response to a control signal applied to a terminal 6 by a comparison circuit 8 to obtain an error signal. This error signal controls the amplification gain of the gain control circuit.

この回路では、第2図aに示すような制御信号
に対して、出力信号波形は第2図bのようにな
る。すなわち、出力信号の振幅はループ利得制御
により、その立上り立下りはなだらかになるが、
バースト休止区間に搬送波の漏洩がある。この漏
洩量は、時分割多元接続通信方式では約−45dB
以下にすることが必要であるが、漏洩量は利得制
御回路2での搬送波の抑圧量によつて決定され
る。
In this circuit, for a control signal as shown in FIG. 2a, the output signal waveform is as shown in FIG. 2b. In other words, the amplitude of the output signal is controlled by the loop gain, so its rise and fall are gentle, but
There is carrier wave leakage in the burst pause period. This leakage amount is approximately -45 dB in time division multiple access communication system.
Although it is necessary to do the following, the amount of leakage is determined by the amount of carrier wave suppression in the gain control circuit 2.

このため、大きな抑圧効果を得るためにPIダ
イオードを多数個直列接続したスイツチング回路
を利得制御回路2に縦続接続する回路が知られて
いるが、このスイツチング回路自体に損失があ
り、効率が悪くなる欠点がある。
For this reason, a circuit is known in which a switching circuit in which a large number of PI diodes are connected in series is connected in cascade to the gain control circuit 2 in order to obtain a large suppression effect, but this switching circuit itself has losses and becomes inefficient. There are drawbacks.

〔発明の目的〕[Purpose of the invention]

本発明は、上記欠点を除去するもので、バース
ト休止区間の搬送波漏洩がなく、しかも利得制御
回路の増幅器としてCクラスの増幅器を使用し、
効率を高くすることができ、さらに、損失のある
高周波域のスイツチイング回路を使用する必要が
ないバースト制御回路を提供することを目的とす
る。
The present invention eliminates the above-mentioned drawbacks, has no carrier wave leakage in the burst pause period, and uses a C class amplifier as the amplifier of the gain control circuit.
It is an object of the present invention to provide a burst control circuit that can increase efficiency and does not require the use of a lossy switching circuit in a high frequency range.

〔発明の特徴〕[Features of the invention]

本発明は、中間周波数の搬送波信号と変調信号
とを入力して変調出力を得る変調回路と、この変
調回路の出力周波数を送信周波数に変換する周波
数変換回路と、この周波数変換回路の出力信号が
通過する利得制御回路と、この利得制御回路の出
力を増幅する電力増幅回路と、この増幅回路の出
力信号を分岐してその振幅を検出する検出回路
と、この検出回路の出力を一方の入力としバース
ト信号の制御信号を他方の入力とする比較回路と
を備え、この比較回路の出力により上記利得制御
回路の通過信号利得が制御されるように構成され
たバースト制御回路において、上記変調回路を通
過する中間周波数信号の通路に、上記制御信号に
より制御されるスイツチ回路を備え回路が簡易で
低価格であり、低消費電力でかつバースト休止区
間における搬送波を抑圧することができることを
特徴とする。
The present invention provides a modulation circuit that inputs an intermediate frequency carrier signal and a modulation signal to obtain a modulated output, a frequency conversion circuit that converts the output frequency of this modulation circuit to a transmission frequency, and an output signal of this frequency conversion circuit that converts the output frequency of the modulation circuit into a transmission frequency. A gain control circuit to pass through, a power amplifier circuit that amplifies the output of this gain control circuit, a detection circuit that branches the output signal of this amplifier circuit and detects its amplitude, and uses the output of this detection circuit as one input. and a comparison circuit whose other input is a control signal of the burst signal, and the output of the comparison circuit is configured to control the gain of the signal passing through the gain control circuit. A switch circuit controlled by the control signal is provided in the path of the intermediate frequency signal, and the circuit is simple and inexpensive, has low power consumption, and is capable of suppressing the carrier wave in the burst pause period.

〔実施例による説明〕[Explanation based on examples]

本発明の実施例について図面を参照して説明す
る。第3図は本発明一実施例バースト制御回路の
ブロツク構成図である。第3図において第1図と
同一の部分は同一の符号で示す。高周波信号が入
力する入力端子1は利得制御回路2に接続され、
利得制御回路2から利得制御された信号が電力増
幅回路3に接続される。電力増幅回路3から所要
の送信電力まで増幅されたバースト信号dが出力
端子4に接続され、また分岐されて検出回路5に
接続される。検出回路5は信号の振幅を検出する
回路である。バースト制御信号aが入力する制御
信号端子6は基準波形発生回路7に接続される。
基準波形発生回路7から包絡線の基準となる基準
波形信号と検出回路5からの包絡線の検出信号と
が比較回路8に接続される。比較回路8から誤差
信号が利得制御回路2に接続される。
Embodiments of the present invention will be described with reference to the drawings. FIG. 3 is a block diagram of a burst control circuit according to an embodiment of the present invention. In FIG. 3, the same parts as in FIG. 1 are designated by the same reference numerals. An input terminal 1 into which a high frequency signal is input is connected to a gain control circuit 2,
A gain-controlled signal from the gain control circuit 2 is connected to the power amplifier circuit 3. A burst signal d amplified to a required transmission power from the power amplification circuit 3 is connected to an output terminal 4, and is branched and connected to a detection circuit 5. The detection circuit 5 is a circuit that detects the amplitude of a signal. A control signal terminal 6 to which the burst control signal a is input is connected to a reference waveform generation circuit 7.
A reference waveform signal serving as a reference for the envelope from the reference waveform generation circuit 7 and an envelope detection signal from the detection circuit 5 are connected to the comparison circuit 8 . An error signal from the comparison circuit 8 is connected to the gain control circuit 2.

ここで、本発明の特徴とするところは、一点鎖
線で囲む変調部分にある。すなわち、制御信号端
子6からバースト制御信号aが分岐されて変調回
路9に接続され、変調出力信号がスイツチイング
される。変調回路9は入力端子11に与えられる
中間周波数搬送波入力と、入力端子12に与えら
れる変調信号入力により変調する回路であり、そ
の変調出力信号が周波数変換回路10により送信
搬送波周波数に変換される。その出力は入力端子
1に接続される。すなわち、本発明の回路では、
周波数変換を行う前の中間周波数の段階でスイツ
チングを併用するようにしたものであり、きわめ
て効率的となる。この例は変調回路9の搬送波信
号通路にダイオードスイツチ回路を設け、これを
制御信号により開閉するように構成されている。
Here, the feature of the present invention lies in the modulation portion surrounded by a dashed line. That is, the burst control signal a is branched from the control signal terminal 6 and connected to the modulation circuit 9, and the modulation output signal is switched. The modulation circuit 9 is a circuit that performs modulation using an intermediate frequency carrier input applied to an input terminal 11 and a modulation signal input applied to an input terminal 12, and its modulated output signal is converted to a transmission carrier frequency by a frequency conversion circuit 10. Its output is connected to input terminal 1. That is, in the circuit of the present invention,
Switching is also used at the intermediate frequency stage before frequency conversion, making it extremely efficient. In this example, a diode switch circuit is provided in the carrier wave signal path of the modulation circuit 9, and is configured to be opened and closed by a control signal.

第4図はこの実施例回路の動作波形図である。
端子6の制御信号aに従つて、変調回路9の動作
が制御されるので、入力端子1の入力搬送波Cは
第4図cのように断続波となる。これをループ利
得制御により立上りおよび立下りをなだらかにし
て周波数の拡がりを防止する。
FIG. 4 is an operational waveform diagram of this embodiment circuit.
Since the operation of the modulation circuit 9 is controlled according to the control signal a at the terminal 6, the input carrier wave C at the input terminal 1 becomes an intermittent wave as shown in FIG. 4c. Loop gain control is used to smooth the rise and fall to prevent frequency spread.

一般に、スイツチイング回路は使用周波数が低
いほど非導通時の漏洩は小さく、導通時の損失が
小さい。すなわち、従来例のように時分割多元接
続通信方式の出力周波数について、ダイオードス
イツチ回路を構成するならば、非導通時にも電極
間容量による信号漏洩があるので、多数のダイオ
ードを直列接続しなければならない。しかし、こ
の実施例のように、周波数変換の前に信号周波数
の低い段階でスイツチイングを行うには、かりに
同一の電極間容量のダイオードを用いても、十分
に非導通時の漏洩を小さくすることができる。し
たがつて接続するダイオードの数も少なく(この
例では1個)でよく、その導通時の損失を小さく
することができる。その使用ダイオードは低い周
波数のための安価なものでよいので、スイツチイ
ング回路の価格は著しく小さくなる。
Generally, the lower the operating frequency of a switching circuit, the smaller the leakage when it is not conducting, and the smaller the loss when it is conducting. In other words, if a diode switch circuit is configured for the output frequency of the time division multiple access communication system as in the conventional example, there will be signal leakage due to capacitance between electrodes even when non-conducting, so many diodes must be connected in series. It won't happen. However, in order to perform switching at a low signal frequency stage before frequency conversion, as in this embodiment, even if diodes with the same interelectrode capacitance are used, the leakage during non-conduction is sufficiently reduced. be able to. Therefore, the number of diodes to be connected may be small (one in this example), and the loss during conduction can be reduced. Since the diodes used can be inexpensive for low frequencies, the cost of the switching circuit is significantly reduced.

上記例は、変調回路において中間周波数の信号
をスイツチイングする例を示したが、変調回路の
入力より前段あるいは変調回路の出力より後段で
中間周波数の信号をスイツチイングすることとし
ても同様に本発明を実施することができる。
Although the above example shows an example in which an intermediate frequency signal is switched in a modulation circuit, the present invention can also be applied to switching an intermediate frequency signal at a stage before the input of the modulation circuit or at a stage after the output of the modulation circuit. can be carried out.

〔発明の効果〕〔Effect of the invention〕

本発明には、以上説明したように、バースト制
御信号により中間周波帯域でスイツチイングを行
う変調回路を設けることにより、回路が簡易、低
価格にされ、低消費電力でかつバースト休止区間
における搬送波抑圧ができる優れた効果がある。
また、電力増幅回路は特に大きな抑圧特性を必要
としないため、Cクラスの増幅器を用いて電力増
幅器の定損も減少しその設計が容易で、使用電力
を効率化する利点がある。
As explained above, the present invention is provided with a modulation circuit that performs switching in the intermediate frequency band using a burst control signal, thereby making the circuit simple and inexpensive, reducing power consumption, and suppressing the carrier wave in the burst pause period. It has excellent effects.
Further, since the power amplifier circuit does not require a particularly large suppression characteristic, the use of a C class amplifier reduces the constant loss of the power amplifier, which is easy to design, and has the advantage of increasing the efficiency of power usage.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来例のバースト制御回路のブロツク
構成図。第2図はその電気信号波形図。第3図は
本発明一実施例バースト制御回路のブロツク構成
図。第4図はその電気信号波形図。 1,11,12……入力端子、2……利得制御
回路、3……電力増幅回路、4……出力端子、5
……検出回路、6……制御信号端子、7……基準
波形発生回路、8……比較回路、9……変調回
路、10……周波数変換回路、a……バースト制
御信号、b,d……バースト信号、C……出力信
号。
FIG. 1 is a block diagram of a conventional burst control circuit. Figure 2 is a diagram of the electrical signal waveform. FIG. 3 is a block diagram of a burst control circuit according to an embodiment of the present invention. FIG. 4 is a diagram of the electrical signal waveform. 1, 11, 12...Input terminal, 2...Gain control circuit, 3...Power amplifier circuit, 4...Output terminal, 5
...Detection circuit, 6...Control signal terminal, 7...Reference waveform generation circuit, 8...Comparison circuit, 9...Modulation circuit, 10...Frequency conversion circuit, a...Burst control signal, b, d... ...Burst signal, C...Output signal.

Claims (1)

【特許請求の範囲】 1 中間周波数の搬送波信号と変調信号とを入力
して変調出力を得る変調回路と、 この変調回路の出力周波数を送信周波数に変換
する周波数変換回路と、 この周波数変換回路の出力信号が通過する利得
制御回路と、 この利得制御回路の出力を増幅する電力増幅回
路と、 この増幅回路の出力信号を分岐してその振幅を
検出する検出回路と、 この検出回路の出力を一方の入力としバースト
信号の制御信号を他方の入力とする比較回路と、 を備え、この比較回路の出力により上記利得制御
回路の通過信号利得が制御されるように構成され
たバースト制御回路において、 上記変調回路を通過する中間周波数信号の通路
に、上記制御信号により制御されるスイツチ回路
を備えたことを特徴とする バースト制御回路。
[Claims] 1. A modulation circuit that inputs an intermediate frequency carrier signal and a modulation signal to obtain a modulated output; a frequency conversion circuit that converts the output frequency of this modulation circuit to a transmission frequency; A gain control circuit through which the output signal passes; a power amplifier circuit that amplifies the output of this gain control circuit; a detection circuit that branches the output signal of this amplifier circuit and detects its amplitude; a comparison circuit having one input as an input and a control signal of the burst signal as the other input, and configured such that the passing signal gain of the gain control circuit is controlled by the output of the comparison circuit, A burst control circuit characterized in that a switch circuit controlled by the control signal is provided in a path of an intermediate frequency signal passing through a modulation circuit.
JP59073811A 1984-03-30 1984-04-12 Burst control circuit Granted JPS60216654A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP59073811A JPS60216654A (en) 1984-04-12 1984-04-12 Burst control circuit
US06/716,270 US4706262A (en) 1984-03-30 1985-03-26 FSK or FM burst signal generating apparatus
CA000477795A CA1246253A (en) 1984-03-30 1985-03-28 Fsk or fm burst signal generating apparatus
DE8585103848T DE3587081T2 (en) 1984-03-30 1985-03-29 FREQUENCY OR FREQUENCY REVERSE MODULATED BURST SIGNAL GENERATOR.
AU40521/85A AU578082B2 (en) 1984-03-30 1985-03-29 Tdma burst signal generation
EP85103848A EP0156398B1 (en) 1984-03-30 1985-03-29 Fsk or fm burst signal generating apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59073811A JPS60216654A (en) 1984-04-12 1984-04-12 Burst control circuit

Publications (2)

Publication Number Publication Date
JPS60216654A JPS60216654A (en) 1985-10-30
JPH0234546B2 true JPH0234546B2 (en) 1990-08-03

Family

ID=13528911

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59073811A Granted JPS60216654A (en) 1984-03-30 1984-04-12 Burst control circuit

Country Status (1)

Country Link
JP (1) JPS60216654A (en)

Also Published As

Publication number Publication date
JPS60216654A (en) 1985-10-30

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