JPH0235539B2 - ITSUSENCHIRAKUKENSHUTSUKEIDENKI - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a single line ground fault detection relay for detecting a single line ground fault in a high resistance grounding power system.

Conventionally, there is one shown in FIG. 1 as this type of single line ground fault detection relay. In the figure, 1 is a voltage transformer for phase voltage detection (hereinafter referred to as PT), 2-1
or 2-3 is the PT secondary line voltage introduction transformer, 3
is a PT 3rd order zero-phase voltage introduction transformer. 4-1 to 4-6 and 5-1 to 5-4 are resistors for vector synthesis, and 6 is a zero-phase overvoltage detection element that receives the input signal.
Obtained from the secondary side of the PT tertiary zero-phase voltage introduction transformer 3. 7-1, 7-2, 7-3, 8 are rectangular wave conversion circuits, 9-1 to 9-3 are NAND circuits, 10-
1 to 10-3 are phase discrimination circuits, and 11-1 to 11-3 are AND circuits, respectively.

Next, the operation of the conventional circuit shown in FIG. 1 will be explained. FIG. 2 is a single line ground fault detection characteristic diagram of the conventional relay shown in FIG. 1, and 12-1 to 12-3 are AND circuits 11-1 to 11- shown in FIG.
3, the characteristic 12-4 shows the output characteristic of the zero-sequence overcurrent detection element 6 in FIG. Further, the voltages -V _A to -V _C are reference voltages, and FIG. 3 shows the principle of deriving the reference voltages -V _A to -V _C.
That is, the voltages E _AB , E _BC , and E _CA are each line voltages, and the PT 1 secondary phase voltage in Fig. 1 is converted into a line voltage by the PT secondary line voltage introduction transformers 2-1 to 2-3. In order to obtain a composite current proportional to this line voltage, the composite currents are vector-combined via vector combination resistors 4-1 to 4-6 to obtain -V _A to -V _C as shown in FIG. The circuit is configured to obtain an amount of electricity proportional to . In other words, the amount of electricity proportional to the reference voltage _-V
The reference voltages -V _B and -V _C can be obtained in the same manner by vector synthesis of E _AB and E _CA. Next, the principle for deriving the output characteristics 12-1 to 12-3 of the AND circuits 11-1 to 11-3 of FIG. 1 shown in FIG. 2 is shown in FIG. 4 for the first phase. These characteristics 12-1 to 12-3 are the electrical quantity -K ₁ V _{A proportional to the reference voltage -V A derived} in Fig. 3 and the zero-sequence voltage 3 V ₀ obtained from the tertiary circuit of PT1 shown in Fig. 1. is received by the PT tertiary zero-phase voltage introduction transformer 3, and an output voltage proportional to the zero-sequence voltage _3V0 is derived through the vector synthesis resistor 5-1. −K ₂ V ₀ obtained by 1
Further vector synthesis of the electric quantities of −K ₂ V ₀ −K ₂ V ₀
I am getting . Then, the trajectory was shown so that the phase difference θ with the electrical quantity of −K ₂ V ₀ obtained from the output of the PT third-order zero-phase voltage introduction transformer 3 via the vector synthesis resistor 5-4 was a constant value. This is the left-right symmetrical arc shown in FIG. Furthermore, this −K ₂ V ₀ and −K ₁ V _A
The phase angle θ of the two vectors is greater than the specified value 180°>
FIG. 5 shows an example in which the operating output shown in FIG. 1 is obtained from the single line ground fault detection relay when θ>90°. The waveform -K ₂ V ₀ is the output waveform of the vector synthesis resistor 5-4 in Fig. 1, and the waveform -K ₂ V ₀ -K ₁ V _A is the input waveform of the rectangular wave conversion circuit 7-1 in Fig. 1. . By passing this input waveform -K ₂ V ₀ -K ₁ V _A through the rectangular wave converting circuits 7-1 to 7-3 and 8, respectively, the rectangular wave converting circuits 8 and 7-1 shown in FIG. Obtain the output signal of And these two square wave conversion circuits 8 and 7-
By applying the output signal of 1 to the NAND circuit 9-1 in FIG. 1, the output signal becomes high level only when the output of the rectangular wave conversion circuit 7-1 and the output of the rectangular wave conversion circuit 8 are in a low level state where both are not present. can be obtained. This is the NAND circuit 9-1 in Figure 5.
The output pulse width of the NAND circuit 9-1 is 180° if the phases of the waveforms -K ₂ V ₀ and -K ₂ V ₀ -K ₁ V _A are in the same phase, and 0 if they are in opposite phases. becomes. Therefore, this pulse width, i.e.
By detecting the output signal of the NAND circuit 9-1 by some method, it is possible to determine whether the phase angle of the two inputs -K ₂ V ₀ -K ₁ V _A is greater than or equal to a specified value. The waveform in Figure 5 shows the case where the phase angle θ is less than the specified value and the relay is inoperable.The pulse width is larger than the specified value and the output signal (H signal) of the NAND circuit 9-1 is used as the lock signal, so the phase The output of the discrimination circuit 10-1 is not being sent.
The zero-sequence overvoltage detection element 6 receives the output signal of the PT tertiary zero-sequence voltage introducing transformer 3 and operates when the zero-sequence voltage exceeds a specified value, and is used as a stopper for the phase discrimination circuit 10-1 or 10-3
It is used with the output of AND circuits 11-1 to 11-3.

In addition, the circuit diagram in Figure 6-1 is an equivalent circuit in the event of a single-line ground fault in an example of a high-resistance grounding system, where 13 is a neutral point grounding resistor (hereinafter referred to as NGR), and 14 is a neutral point grounding reactor. (hereinafter referred to as NGL), 15 is the ground capacitance of the cable system transmission line (hereinafter referred to as ground capacity), 16 is the fault point resistance, E _A is the generator induced voltage,
Zg is the back impedance. Said No. 6-1
If the diagram is replaced with an equivalent circuit in the object coordinate method, it will become as shown in Figure 6-2. Furthermore, since the rear impedance Zg can be ignored, if this is omitted, the 6th -
Figure 3 is shown.

Figure 7-1 shows a two-wire ground fault accident at the same location. If we replace this with the equivalent circuit in the object coordinate method in the same way as in Figure 6, we will see 7-2.
If it is further simplified, it can be expressed as shown in Fig. 7-3. Here, the above-mentioned 6-3
Comparing the zero-sequence voltage V ₀ in Figure 7-3 and Figure 7-3, there is clearly a difference in the magnitude and phase of V ₀ as described above.
It can be seen that the vector of the zero-sequence voltage V ₀ is influenced by the magnitude RF of the fault point resistance 16. The above situation is shown in FIGS. 8 and 9. First, Figure 8 shows the vector locus of the zero-sequence voltage -V ₀ at the time of an A-phase 1-wire ground fault, and shows the vector locus of the zero-sequence voltage -V 0 when the fault point resistance 3RF in Figure 6-3 is varied from zero to infinity. , Figure 9 shows the vector locus of the zero-sequence voltage -V ₀ at the same point two-wire ground fault of the BC phase, and represents the case where the fault point resistance RF in Figure 7-3 is varied from zero to infinity. ing. Therefore, as shown in Figure 10, the operating range of the relay is zero-sequence voltage -
It is necessary to have the characteristic 12-1 so that the trajectory 17-1 or 17-2 of V ₀ can be detected. On the other hand, the zero-sequence voltage at the time of a two-wire ground fault accident at the same point -
Since the V ₀ vector locus is as shown in FIG. 9, it is necessary to avoid erroneously detecting this. However, as shown in Figure 2, the characteristics of the relay are arcuate with respect to the reference voltages V _A , V _B , and V _C of each phase. If so, there is a possibility that the zero-sequence voltage -V ₀ vector will enter the characteristic range of the B-phase or C-phase of the relay, and this performance limit determines the quality of the performance as a one-wire ground fault detection relay. It will be decided. This situation is shown in FIG. Figure 11 is BC
In the case of a phase two-wire ground fault, the voltage triangle is E _A ,
E _B and E _C , and the line voltage of the BC phase decreases. Since the reference voltages V _A , V _B , and V _C are obtained by vector synthesis from the line voltages, the phases are directed from the center of gravity zero of the voltage triangle to the apex of the triangle, and the magnitude is proportional thereto. Therefore, characteristics of relay 1
2-1, 12-2, and 12-3 are also circular arcs with respect to the reference voltages V _A , V _B , and V _C as shown in FIG. _B.C.
They will move closer to each other depending on the size of the .
Therefore, if the line voltage E _BC falls below a certain level, characteristics 12-2 and 12-3 will overlap and it will operate even in the event of a two-wire ground fault. Although not shown, the circuit is devised so that it locks when the line voltage is below a certain value, or so that no output signal is output when two phases are activated.

In this way, the first drawback of the conventional one-line ground fault detection relay is that, as already mentioned in Fig. 10, in order to be able to reliably detect the power converter -V ₀ vector in the event of a one-line ground fault, The arc must be made considerably large, and the limit line voltage E _BC at which characteristics 12-2 and 12-3 in Fig. 11 overlap must be made considerably large.In other words, the line voltage drop detection lock value By increasing the value, the range in which the locking element is not relied on becomes narrower. Next, the second drawback of the conventional one-line ground fault detection relay is in the case of a two-wire ground fault at different points, such as at the close end of phase B and the far end of phase C. In this case, the phase of the zero-sequence voltage -V ₀ is large. This is shown by the vector OF in FIG. 11. In other words, in the case where the line voltage remains to such an extent that the line voltage drop detection lock element does not respond, the original phase characteristic 12-2 and
12-3, but in this case, the operating range of the relay characteristics 12-2 and 12-3 is wide, so it is very difficult to handle a two-wire ground fault at different supports.

The operating range of a conventional one-wire ground fault detection relay is an arc passing through the center point O shown in Figure 2, and the size of the arc needs to be sufficiently larger than the V ₀ vector locus at the time of a one-wire ground fault. As a result, there was a drawback that malfunctions could occur due to a two-wire ground fault at the close end.

The present invention was made in order to eliminate the above-mentioned drawbacks, and as a measure to improve the malfunction of conventional relays in the event of a close-end two-wire ground fault, the present invention does not require a special line-to-line voltage drop detection element, and has a voltage lock function. The purpose of the present invention is to provide a single line ground fault detection relay that does not require sensitivity or time coordination with elements.

An embodiment of the present invention will be described below with reference to the drawings.
In FIG. 12, the same parts as in FIG. 1 are designated by the same reference numerals.
3 is a resistor for the phase shift circuit, and 20-1 to 20-3 are capacitors for the phase shift circuit.

Next, the operation of the present invention will be explained below. Fig. 13 shows a characteristic diagram of the relay of the present invention. In the figure, characteristic 12-1 is the characteristic of the relay of the present invention, and the conventional characteristic diagram is shown in Fig. It is an arc with a size that encompasses the locus of the zero-sequence voltage -V ₀ at the time of the accident. On the other hand, characteristic 12- in Fig. 13
4, which is the same as the conventional one, represents the characteristics of the zero-sequence overvoltage detection element 6 shown in FIG. 12, and is provided to determine the detection sensitivity for ground faults. What is different from Figure 4, which shows the conventional characteristics, is the way the reference voltage is taken.The conventional reference voltage extracts the amount of electricity in the same phase as the phase voltage synthesized from the line voltage, as shown in Figure 3. In contrast, in the present invention, the line voltage E _BC is phase-shifted by 90° and used as K ₁ E _BC <90°. A specific example of this is shown in FIG. 12, where transformers 2-1 to 2-3 derive a voltage proportional to the secondary line voltage of PT1. Then, the derived voltage is converted into an appropriate leading current by the phase shift circuit resistors 19-1 to 19-3 and the phase shift circuit capacitors 20-2 to 20-3, and the phase shift circuit capacitor By extracting the voltage generated between the intermediate taps of the PT secondary line voltage introduction transformers 20-1 to 20-3 and the PT secondary line voltage introducing transformers 2-1 to 2-3, the voltage phase is shifted by 90 degrees. The mutual phase angle θ of the electric quantity obtained by vector synthesis of the reference voltage K ₁ E _BC <90° and the zero-sequence voltage −K ₂ V ₀ derived in this way and the zero-sequence voltage −K ₂ V ₀ is kept constant. The 13th drawing was drawn in
This is the arc in the figure. In other words, the output of the vector synthesis resistor 4-2 in Fig. 12 is used as the reference voltage of phase A (first phase), and is the secondary line voltage of PT1.
K 1 E _BC is proportional to E BC and delayed by 90 degrees, so that K ₁ E _BC <90 degrees, and has an antiphase relationship with the phase voltage of the A phase. Similarly, the output signals of the vector synthesis resistors 4-3 and 4-1 become reference voltages for phase B (second phase) and phase C (third phase), respectively, and for phase B, K ₁ E _CA <90° , for C phase
K ₁ E _AB <90°. The zero-sequence voltage derived from the vector synthesis resistors 5-1 to 5-3 via the respective reference voltages and the PT tertiary zero-sequence voltage introduction transformer 3.
If K ₂ V ₀ is vector-combined for each phase, the A phase is -
K ₂ V ₀ +K ₁ E _BC <90°, B phase is −K ₂ V ₀ +K ₁ E _CA <
90°, and the C phase is −K ₂ V ₀ +K ₁ E _AB <90°, which are respectively introduced into pulse waveform conversion circuits 7-1 to 7-3 and converted into pulse waveforms. Furthermore, the output of the vector synthesis resistor 5-4 -K ₂ V ₀ is converted into a rectangular wave conversion circuit 8.
As in the conventional example, if the time from the pulse conversion to the fall of the pulse is measured, an arc characteristic as shown in FIG. 13 can be obtained.

Next, the closest end 2, which was considered a drawback of conventional relays.
Embodiments of the present invention will be described below as a countermeasure against malfunctions caused by line-to-ground faults. In other words, 1 of the high resistance grounding system
In a line-to-ground fault, the voltage of the faulty phase usually decreases, but it is well known that the line voltage is the same three-phase balanced triangle as in normal conditions. Therefore, the reference voltage of the relay of the present invention at the time of a one-wire ground fault is A as described above.
The phase is proportional to E _BC <90°, the B phase is proportional to E _CA <90°, and the C phase is proportional to E BC <90°.
Since E _AB < 90°, the first
The characteristics are shown in Figure 3. However, in the case of a two-wire ground fault, the line voltage decreases as well as the phase voltage of the faulted phase, so the zero-sequence voltage -3V ₀ is in the opposite phase direction from that in the case of a one-wire ground fault, as described in Figure 9. Become. The characteristic changes of the relay of the present invention at this time are shown in Fig. 14 as an example of a BC phase two-wire ground fault accident. First, the A-phase reference voltage K ₁ E _BC <
The 90° phase is in the opposite phase direction to the A-phase voltage as in the case of a single-wire ground fault, and its magnitude varies depending on the fault point and will be zero if it is a near-end fault. Next, for the B-phase reference voltage K ₁ E _CA <90° and the C-phase reference voltage K ₁ E _AB <90°, the mutual phase angle widens as the BC-phase line voltage decreases, and the BC-phase line If the voltage between
It becomes 180°, and the size becomes smaller by √3/2. This means that the reference voltage, which is the basis for the arc characteristic of the relay, moves away from the zero-sequence voltage -3V ₀ vector that occurs at that time due to the drop in line voltage at the time of a two-wire ground fault, and as a relay, Just the opposite of the conventional system, the lower the line voltage, the narrower the operating range becomes. And since the operating range itself becomes far from the existence of the zero-sequence voltage vector at the time of a two-wire ground fault,
This eliminates malfunctions in the event of a ground fault in two wires at the close end.

Note that in the above embodiment, the line voltage is used as the reference voltage.
Although a value shifted by 90° is used, a minute zero-sequence voltage component is added to the reference voltage mentioned above, and the center point of the arc characteristic is appropriately moved by moving the origin of the reference voltage.Circular characteristic with offset You can also use it as

As described above, according to the present invention, the characteristics of the relay remain unchanged in a one-wire ground fault accident, and the operating range becomes narrower as the line voltage of the faulty phase decreases in a two-wire ground fault fault. After configuring the circuit,
This has the effect of providing a high-performance one-line ground fault detection relay that operates reliably at low cost without the need to newly provide a special circuit as a countermeasure against two-wire ground faults at the close end.

[Brief explanation of drawings]

Fig. 1 is a block circuit diagram of a conventional single line ground fault detection relay, Fig. 2 is a detection characteristic diagram of Fig. 1, Figs. 3 to 11 are supplementary explanatory diagrams for explaining the conventional one and the present invention, FIG. 12 is a principle circuit diagram of a single line ground fault detection relay showing an embodiment of the present invention, and FIGS. 13 and 14 are examples of zero-phase phase characteristic diagrams according to the present invention. 1...Instrument transformer, 2-1 to 2-3...
PT secondary line voltage introduction transformer, 3...PT tertiary zero-phase voltage introduction transformer, 4-1 to 4-6, 5-1
or 5-4... Resistor for vector synthesis, 6... Zero-phase overvoltage detection element, 7-1 or 7-3, 8...
Square wave conversion circuit, 9-1 to 9-3...
NAND circuit, 10-1 to 10-3...Phase discrimination circuit, 11-1 to 11-3...AND circuit, 19-1 to 19-3...Resistance for phase shift circuit, 20-1 without 20-3 ...Capacitor for phase shift circuit. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] 1 A reference voltage for each phase obtained by phase-shifting the quantity of electricity proportional to the secondary line voltage of the instrument transformer that detects the phase voltage of the AC power transmission system, and the tertiary winding of the instrument transformer. The first electrical quantity for each phase is obtained by vector-synthesizing the tertiary zero-sequence voltage of the instrument transformer derived from the line, the reference voltage, and the tertiary zero-sequence voltage of the instrument transformer for each phase. a second quantity of electricity proportional to the tertiary zero-sequence voltage of the instrument transformer; and a phase discrimination circuit that detects a phase difference between the first quantity of electricity and the second quantity of electricity. A single line ground fault detection relay equipped with