JPH023582B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power saving method in facsimile.

Due to the nature of facsimile machines, the standby time is much longer than the communication time, and therefore it is of great significance to reduce the power consumed during the standby time to reduce the overall power consumption. In particular, in the case of facsimile machines equipped with functions such as automatic reception and polling, it is impossible to operate the facsimile machine by connecting an external power source only during communication, so the above significance is particularly important.

The present invention focuses on the above-mentioned special characteristics of facsimile machines and has been devised to make the operability of the facsimile easier.Examples of the present invention will be described below with reference to the drawings.

In FIG. 1, the facsimile according to the present invention includes a backup power supply circuit 1, a main power supply circuit 2, and a power supply control circuit 3. The standby power supply circuit 1 is connected to an external power supply 4 of 100V AC, converts it to 5V DC, and outputs it to the power supply control circuit 3 at the next stage. Main power circuit 2
is connected to the external power supply 4 in parallel with the standby power supply circuit 1 via a controlled switch 5. The controlled switch 5 is opened and closed by the operation of the power supply control circuit 3.

Details of the power supply control circuit 3 are shown in FIG.

11 is a manually operable main power switch, which is connected to a J flip-flop circuit 13 via a waveform shaping circuit 12.
is connected to the CP terminal of Reference numeral 14 denotes a document detection switch for detecting that a document is set in the facsimile machine, which is provided at the document setting position, and is connected to the preset input of the flip-flop circuit 13 via a gate circuit 15 and a pulse generation circuit 16 consisting of a monostable multivibrator. It is connected.

Another input terminal 17 of the gate circuit 15
An incoming call signal indicating that there is an incoming call is input from the other party's transmitter. Flip-flop circuit 13
A preset circuit 18 for preventing malfunction of the power supply control circuit 3 and a CPU (not shown) are connected to the clear terminal of the power supply control circuit 3.
A terminal 19 for receiving a command signal from is connected via a gate circuit 20 .

The Q output of the flip-flop circuit 13 is connected to a drive circuit 21, and the controlled switch 5 of the main power supply circuit 2 is opened and closed by this output.

The basic operation of the facsimile machine configured as described above will be explained with reference to the flowchart shown in FIG.

When attempting to send a document, normally by setting the document with the main power switch 11 turned off, the document detection switch 14 closes and a single negative pulse is output to the terminal of the pulse generation circuit 16. , thereby flip-flop circuit 13
The Q terminal shows H, and the collector of the transistor T of the drive circuit 21 becomes approximately 0V, thereby closing the controlled switch 5 and connecting the main power supply circuit 2. Also, when the main power switch 11 is pressed once in this state, the flip-flop circuit 13
One pulse enters the CP terminal and the Q output changes from H to L.
Then, the controlled switch 5 is opened and the main power supply circuit 2 is disconnected. Main power switch 11 again
When is pressed, the Q output becomes H again, and the main power circuit 2 is connected.

If the main power switch 11 is pressed once with no document set, the Q output of the flip-flop circuit 13 indicates H even if the document detection switch 14 is off, and the main power circuit 2 is connected. If the button is pressed again, the Q output becomes L.

When this facsimile functions as a receiver, an incoming signal from the terminal 17 enters the pulse generation circuit 16 via the gate circuit 15, and its Q output is used as a negative single pulse to activate the drive circuit 21, and the main power supply Connect circuit 2.

Regarding the circuits connected to the clear terminal of the flip-flop circuit 13, the preset circuit 18
is from the standby power supply circuit 1 to the main power supply control circuit 3.
When 5VSUB is first turned on, the clear input is applied for a short period of time so that the drive circuit 21 does not operate.

The signal from the CPU from the terminal 19 is given as follows. That is, as shown in FIG. 3, when the CPU confirms that the communication has ended, it issues a signal to the terminal 19 after a certain period of time and outputs a signal to the flip-flop circuit 13.
Clear and disconnect main power circuit 2. Operations such as ejecting the original or recorded received paper are performed during the above-mentioned fixed time period. In addition to this, when the CPU confirms that there is an abnormality in the operation of this facsimile, it also sends a signal to the terminal 19 to clear the flip-flop circuit 13.

When polling is performed, the transmitting side sets the original, then presses the main power switch 14 to deactivate the main power circuit 2, and waits for an incoming call from the receiving side.
On the receiving side, the main power switch 14 may be pressed to start the receiving operation.

In this way, in this facsimile, the operation of the main power circuit 2 during transmission can be operated by both the document detection switch 14 and the main power switch 11, and the main power switch 11 can freely turn on and off the above operation. Therefore, it is possible to quickly respond to various operations during communication, and even if trouble occurs during communication, for example, communication can be stopped quickly.

In addition, during standby time, the backup power supply circuit 1 is used to keep power consumption low, and the main power supply circuit 2 is used only from the start of communication to the end of communication.
Overall power consumption can be reduced to the minimum level.

Note that the document detection switch 14 described above may be a limit switch, a photoelectric detection switch, or the like.

As explained above, according to the present invention, power consumption can be greatly reduced and operation can be made even easier.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the system of the present invention, FIG. 2 is a circuit diagram of a power supply control circuit, and FIG. 3 is a flowchart for explaining the system of the present invention. 1... Backup power supply circuit, 2... Main power supply circuit, 3... Power supply control circuit, 4... External power supply, 5... Controlled switch,
11...Main power switch, 14...Document detection switch.

Claims (1)

[Scope of Claims] 1. Consists of a main power supply circuit for facsimile operation, a switching circuit for switching the main power supply circuit to an operating state or a non-operating state, and a power supply control circuit for controlling the switching circuit, wherein the power supply control circuit is The state holding means is maintained in a first state when a facsimile document is set or an incoming signal is detected, and the state holding means is maintained in the first state in response to each manual operation of the power switch. and a second state, and is held in the second state at the end of communication, and the main power supply circuit is configured such that the state holding means is in the first state.
1. A power saving method in a facsimile machine, characterized in that it is switched to an active state when it is in one state, and switched to an inactive state when it is in a second state. 2. The state holding means comprises a flip-flop circuit, and when a facsimile document is set or an incoming signal is detected, the flip-flop circuit is preset, and the power switch operates to control the clock pulse (CP) of the flip-flop circuit.
2. The power saving system of claim 1, wherein said flip-flop circuit is connected to an input and is cleared at the end of a communication. 3. The power saving system according to claim 2, wherein the flip-flop circuit is cleared after a certain period of time has passed after the end of communication.