JPH0237268B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control method and a control device for AC, rectifier, and capacitor type resistance welding machines.

Conventionally, the three major factors in determining welding quality in resistance welding methods are considered to be energization time, pressurizing force, and welding current, and if these factors are set appropriately at the initial stage (when the welding chip is new), a large number of It was thought that the welding problems would be resolved.

However, when the dynamic pressurizing force was reduced, dust was generated during welding, and metal in the welded part was scattered, resulting in defective welding.

Furthermore, when welding galvanized steel, aluminized steel, and aluminum materials, as the number of welding points increases, the weld strength decreases and the welded appearance loses its initial beauty. In other words, a pick-up phenomenon occurred.

Conventionally, when such a pick-up phenomenon occurred, welding was interrupted, the tip of the welding tip was mechanically polished, and welding was performed again. This also required skilled welders.

In addition, if dust was generated and the welding strength decreased, a sample inspection of the workpiece was performed after welding, and the welded part was inspected.

Performing the above polishing and inspection has been a major impediment to labor-saving and rationalization of welding.

The present invention suppresses excessive welding dust in real time in the resistance welding method, and also eliminates pick spots.
Even if a rise phenomenon occurs, the strength will decrease due to the control method,
The purpose is to suppress defects in appearance. That is, the first objective of the present invention is to suppress excessive dust in real time,
The second purpose is to eliminate welding defects when a pick-up phenomenon occurs.

First, the outline of the present invention is shown in Fig. 1, Fig. 2, Fig. 3,
This will be explained using FIGS. 4 and 5. FIG. 1 is a block diagram of a control device according to the invention. In the figure, V _S is the input voltage to the resistance welding machine, SCR ₁ ,
SCR ₂ is a control rectifier element (hereinafter referred to as a thyristor) in the welding power supply circuit, TR is a welding transformer, 1 is the workpiece, 2 is a welding chip, 3 is a voltage detection circuit between chips, 4 is a defect recognition circuit, and 5 is a 6 is a dot count counter, 7 is a normal control circuit, 8 is a failure control circuit, 9 is a firing angle control circuit,
10 is an initial condition setting circuit, _S1 is a first switch,
S ₂ is the second switch, S ₃ is the third switch, S ₄ is the fourth switch, and S ₅ is the fifth switch.

FIG. 2 is a diagram illustrating the firing angle control method of the control device according to the present invention, and is a diagram illustrating the operation of the circuit 9 of FIG. 1. Figure 2A shows the V _S waveform in Figure 1, the ramp waveform (a waveform in which the voltage increases over time), and the firing angle adjustment signals T ₁ , T ₂ , T ₃ (this firing angle adjustment signal T ₁ , T ₂ ). , T ₃ is the input signal to the circuit 9). Note that t is the time axis. The angle between the time axis t and the ramp waveform is approximately constant. Firing angle adjustment signals T ₁ , T ₂ , T ₃ are V _S
= 0 volts, time T ₁ , T ₂ , T ₃ are counted, and a ramp waveform is generated from the end thereof. FIG. 2B shows the generation range of the ignition pulses θ ₁ , θ ₂ , and θ ₃ . The generation points of these ignition pulses θ ₁ , θ ₂ , and θ ₃ occur at the intersection of the ramp waveform and _VS. That is, when the firing angle adjustment signals T ₁ , T ₂ , T ₃ are large, the firing pulses θ ₁ , θ ₂ , θ ₃ are small, indicating an inversely proportional relationship.

The input signals to the circuit 9 in FIG. 1 are the firing angle adjustment signals T ₁ , T ₂ , and T ₃ as described above,
The outputs of circuit 9 are firing pulses θ ₁ , θ ₂ , θ ₃ . These pulses θ ₁ , θ ₂ , θ ₃ cause the thyristor to
Drives SCR ₁ and SCR ₂ .

Next, the relationship between the inter-chip voltage and the strength shown in FIG. 3 will be explained. Figure 3A shows the relationship between the energization time and the inter-chip voltage, and Figure 3B shows the welding currents i, i, and b, corresponding to A.
i-c, i-d and vertical tensile stress (cross tensile test results)
Indicates the relationship between

The A waveform in FIG. 3A is the dynamic characteristic of the inter-chip voltage when welding is performed with the i-current, the b-waveform with the i-b current, the c-waveform with the i-c current, and the d-waveform with the i-current. Assuming that 6 cycles are arbitrary N cycles and observing waveform 2, we can see that (N-1) cycles
The difference between the V _(N-1) voltage and the V _N voltage of N cycles is very large. In other words, this indicates that dust has occurred. Now, if the chili recognition value is V _F ,
The relationship V _(N-1) −V _N ≧V _F holds, and it is recognized that dust has occurred at this time. In other words, the welding current is i,
If the values are increased in the order of i-ro, i-c, and i-d, dust will start to occur at i-c, and 100% dust will occur at i-d.

The intensity at this time is as shown in FIG. 3B, and the intensity is highest when it is a waveform. In other words, it is shown that the best welding can be performed when the current is i0 before dust occurs.

By the way, returning to Figure 1, if the input voltage of the inter-chip voltage detection circuit 3 is V and the output voltage is V, then V = Mdi/dt + R・i (M is inductance, i is current, and R is DC resistance). , R·i components are input to the workpiece 1. Therefore, either extract V at the point where di/dt=0 or integrate V over a half cycle of current i to obtain ∫ ^t2 _t1 V dt, ∫ ^t2 _t1 V dt=∫ ^t2 _t1 Ri d
Find the true inter-chip voltage in the form of t (where i(t ₁ )=i(t ₂ )=0, and the period between t ₁ and t ₂ is a half cycle). That is, the output voltage V of the circuit 3 is V=R·i or V=∫ ^t2 _t1 Ri dt. The voltage V thus obtained is the inter-chip voltage shown in FIG. The circuit 3 is not necessarily required, and V may be directly applied to the input terminal of the defect recognition circuit 4.

The defect recognition circuit 4 is a circuit that recognizes dust in the waveforms C and 2 in Fig. 3. In this circuit 4, a dust recognition value V _F is set in advance, and V _(N-1) −V _N ≧V _F
If V _(N-1) −V _N <V _F , then a signal is output to inform the next stage circuit that dust has occurred, and if V (N-1) −V N <V F, that no dust has occurred. Note that the information may be notified every half cycle.

Next, FIG. 4 will be explained. The horizontal axis represents the number of welding points since the chip was almost new, and the vertical axis represents the firing angle adjustment signal explained in FIG. T _{A (0)} is the firing angle adjustment signal that was adjusted when the chip was almost new, T _{S (0)} is the firing angle adjustment signal when dust occurs, and α is the division of the firing angle adjustment signal. show. In other words, if the chip is new and welding is performed by increasing the output for each division of α, dust will start to occur at T _{S (0)} . However, the welding conditions are 2α lower output than T _S(0).
Indicates that T _A(0) has been determined. Also, let the difference between T _{A (0)} and T _{S (0)} be ΔT. ΔT=2α. Now like this
Knowing T _A(0) and T _S(0) in advance, welding is performed sequentially at T _A(0) starting from the number of dots 1. This interval is the A(0) interval. When the number of dots reaches X ₁ , the firing angle adjustment signal T S (1), which is the starting point of dust generation, is checked again in the S ₍₁ ) interval. That is, at X ₁ point of impact,
The output is increased to T _{S (0)} at the time of dust shown above.
Then, welding was performed by increasing α for each number of welding points, and now
If dust occurs in T _S(1) , check several points to see if dust occurs with high probability. If dust generation is officially confirmed, T _{S (1)} is recognized as the firing angle adjustment signal for dust generation in section S (1). And in actual welding, the ΔT output is lower than T _{S (1)}
Weld section _{A(1) using the firing angle adjustment signal of T A} (1).
Incidentally, it is expressed as T _{S (1)} = T _{S (0)} - m·α, where m indicates the number of times the output increases in the S (1) section. By the way, when the preset _X2 point is reached again, the firing angle adjustment signal T _{S (2)} for occurrence of dust is checked again in the S (2) period. If T _{S (2)} is officially recognized as the dust generation firing angle adjustment signal, then the firing angle adjustment signal T _{A (2) with an output ΔT lower than T S (2) will} be used as the next A ( 2) Weld the section. Furthermore, the number of hits increases in the A(2) section, and when it reaches X ₃ hits, the chili starting point is checked again in the S(3) section. First, welded with T _S(2) and no dust was generated, so welded with T _S(2) +α, then with T _S(2) +2α, and so on. By the way, if the firing angle adjustment signal when the thyristor is fully fired is T _Mio , and the firing angle adjustment signal T _{S (2)} + 4α is greater than this T _Mio , if dust does not occur, then
In the next section A(3), welding is performed using the firing angle adjustment signal of T _A(3) =T _Mio , and an instruction signal is issued to the operator indicating that no further welding will be compensated.

Summarizing the above, we get the following. A
(0), A(1), A(2), A(3) are normal control sections, S
(1), S(2), and S(3) indicate control sections during inspection. In the normal control section, the firing angle adjustment signal T _A(N) = T _S(N)
-ΔT (N indicates the section number), and the inspection control section is the section where the dust generation limit is checked, and the output at that time is T _S(N) = T _S(N-1) -m・α , and (N-1) indicates the previous section.

Note that welding may be performed with ΔT=0. Moreover, X ₁ , X ₂ , and X ₃ are predetermined numbers of dots.

As described above, the control method according to the present invention is characterized in that the presence or absence of dust is checked for each fixed welding point, and welding is performed using outputs before and after the occurrence of dust.

Next, returning to FIG. 1, the circuit will be explained. The inspection control circuit 5 is an inspection control section [S(N) section]
This is a circuit that controls the output of That is, X ₁ ,
When you reach X ₂ and X ₃ points, switch S ₁ for a certain number of points.
is closed, circuit 5 receives the recognition output from defect recognition circuit 4, and outputs T _S(N) . Once the S(N) section ends, the hit point number counter 6 is notified of the end. Next, counter 6 is X ₁ , X ₂ , X ₃
When the number of hits is reached, the switch _S1 is closed, and when the S(N) period ends, a signal is output to open the switch _S1 . Next, the normal control circuit 7 receives the firing angle adjustment signal T _{S (N)} signal when dust occurs, and generates a signal that controls the normal control section by T _{A (N)} = T _{S (N)} - ΔT. Output T _A(N) . Further, the switch _S2 is closed in the inspection control sections S(1), S(2), and S(3), and is open in the other sections. Further, the switch _S3 is normally closed in control sections A(0), A(1), A(2), and A(3), and open in other sections. Receive these signals T _A(N) and T _S(N) ,
The firing angle control circuit 9 is activated.

Next, FIG. 5 will be explained. FIG. 5A shows the inter-chip voltage when dust occurs, and FIG. 5B shows the firing angle adjustment signal when dust occurs. That is, it is a diagram showing control characteristics when a defect occurs.

Assume that welding is performed in section A(1) using the signal T _A(1) , and dust generation is confirmed in the 5th cycle. After dust occurs, welding is performed using the firing angle adjustment signal of T _A(1) +l・α. l indicates the number of stages of output reduction and is a positive integer. In this way, excessive dust generation is suppressed. Returning to FIG. 1 again, the failure control circuit 8 is a circuit that determines the firing angle adjustment signal when such dust occurs. That is, it receives the dust recognition signal from the circuit 4 and generates a signal that increases the firing angle adjustment signal by l·α so that welding is performed with an output l·α lower than the output at the start of welding. l is set in advance. In addition, the initial condition setting circuit 10 determines the firing angle adjustment signal when the chip is almost new, and T _{A (0)} , T _{S (0)}
etc., and calculate the difference ΔT, T _S(0) ,
ΔT is stored and the stored value is transmitted to circuits 5 and 7 as appropriate. Switch _S5 is closed only when such initial conditions are set.

FIG. 6 is an example of a circuit implementing another control method using the control method using the circuit shown in FIG. The circuit shown in FIG. 6 is a circuit that can be implemented by combining constant current control performed by feeding back the welding current and the control method of the present invention. CT is a current transformer (it may be a shunt) that detects the welding current, and this current transformer CT may be installed on either the primary side or the secondary side.

11 is a smoothing circuit, 12 is a differential correction circuit, 5' is a test control circuit, 7' is a normal control circuit, 8' is a failure control circuit, 9' is a firing angle control circuit, and 10' is an initial current setting circuit. , and other circuits with the same symbols as those in FIG. 1 function in exactly the same way. In addition, circuits 5', 7', 8', 9', and 10' are circuits 5 and 10 in FIG.
7, 8, 9, and 10 show the same function as a concept. That is, T _A(0) , T _S(0) , T _A(1) , T _S(1) in Fig. 4,
It can be considered that T _A(2) , T _S(2) , and T _A(3) are converted to welding current. Circuit 5' is I _S(N) = I _S(N-1) +m・α'(α'
is α
) is output and is considered to be replaced with the current value. Further, the circuit 7' outputs I _A(N) . That is, I _A(N) = I _S(N) + ΔI, and ΔI is considered to be ΔT replaced by current. Further, the circuit 8' outputs, for example, I _S(N) -l·α'. In other words, if dust occurs, the output is reduced.

Incidentally, the smoothing circuit 11 converts the ripple-containing current from the current transformer CT into a DC smoothed current I _B. Now, let I _C be the current set by the initial current setting circuit 10' when switches S ₂ , S ₃ , and S ₄ are opened and switch S ₅ is closed. I _B from the difference correction circuit 12
The difference between I B and I _C is detected, and a current correction value is calculated so that I _B and I _C match. Its output I _D is I _D = I _C ±
|I _C −I _B |・K. K is a proportionality constant. The firing angle control circuit 9' determines the firing pulse so that the thyristor fires at the set value _ID .

Next, the operation of the firing angle control circuit 9' will be explained with reference to FIG.

FIG. 7A shows the waveform of the power supply voltage _VS , and a voltage synchronization pulse is generated at the intersection of the time axis t and _VS.
In the same B, X is a pulse (power factor adjustment pulse) having a fixed time width from the synchronization pulse, and a ramp waveform (same as in FIG. 2) is output from the end time of the X waveform. By the way, the outputs of the firing angle control circuit 9' in FIG. 6 are assumed to be A, B, and C. In other words, I _D (a), I _D (b),
I _D (c). C is the ignition pulse (output),
Ignition pulses θ ₁ , θ ₂ , and θ ₃ are generated at the intersections of the ramp waveform and the DC output waveforms A, B, and C. That is, the inputs of circuit 9' are I _D (a), I _D (b), and I _D (c),
Its outputs are θ ₁ , θ ₂ , and θ ₃ .

Note that an A/D converter (a device that converts analog signals to digital signals) is installed between circuits 3 and 4 in Figure 1.
It is also possible to use a microcomputer to perform the steps up to the circuit 9. Further, an A/D converter may be further installed between the circuits 11 and 12 in FIG. 6, and controlled by a microcomputer as in FIG. 1.

According to the control method and control device for a resistance welding machine of the present invention as described above, the following effects can be obtained.

(1) Even if dust occurs, excessive dust is suppressed and welding quality is not impaired. It is also possible to improve welding at the time when dust occurs.

(2) Even if a pick-up phenomenon occurs, welding quality is compensated.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the control device for a resistance welding machine according to the present invention, FIGS. 2A and B are diagrams for explaining the firing angle control method using the device, and FIGS. 3A and B are Characteristic diagrams of inter-chip voltage and strength, Figure 4 is a diagram showing the control form of firing angle, Figures 5A and B are control characteristic diagrams when a failure occurs, and Figure 6 is a diagram showing other characteristics of the control device according to the present invention. A block diagram of the embodiment of FIG. 7A,
B and C are diagrams for explaining a firing angle control method using the same device. SCR ₁ , SCR ₂ ... Control rectifying element, TR ... Welding transformer, 1 ... Workpiece, 2 ... Welding chip, 3 ... Inter-chip voltage detection circuit, 4 ... Defective recognition circuit, 5, 5 '... control circuit during inspection, 6... number of dots counter, 7,7'... control circuit during normal time,
8, 8'... Failure control circuit, 9, 9'... Firing angle control circuit, 10, 10'... Initial condition setting circuit,
S ₁ ~ _{S 5} ... switch.

Claims (1)

[Claims] 1. The welding sequence is such that the initial condition setting section is first set, then the normal control section is set, and then the inspection control section is set after a predetermined number of welding points, and the latter two sections are alternately repeated; In the condition setting interval, the dust generation start output, the welding output in the normal time control interval, and the difference output between the two are determined, and the dust generation start output and the difference output are determined, and in the normal time control interval, the welding output in the normal time control interval is determined. If welding is continued at , and the inspection control interval is reached after a predetermined number of welding points, the output is increased by a predetermined output division unit for each welding point from the dust generation start output, and if the occurrence of dust is probabilistically large. Once the output value is found,
The stored value is updated using that output as the dust generation start output, and in the next normal control period, welding is performed at an output lower than the dust generation start output by the memorized difference output, and the above sequence is repeated to perform welding. If the welding output reaches the maximum output until dust occurs in the control section during inspection, subsequent welding will be performed at the maximum output, and an instruction signal to the operator to interrupt welding will be issued, and the power will not be energized in any section. 1. A control method for a resistance welding machine, characterized in that, if dust is detected in the welding cycle, the welding output is lowered by a predetermined amount than in the energization cycle, and the welding output is continued until welding at that welding point is completed. 2. The method of controlling a resistance welding machine according to claim 1, characterized in that the welding current is fed back and the welding current is controlled to be substantially constant during the energization period. 3. An inter-chip voltage detection circuit that detects the inter-chip voltage between welding chips, a defect recognition circuit that checks whether dust has occurred and outputs an occurrence signal, which is connected after the inter-chip voltage detection circuit, and a defect recognition circuit that detects the inter-chip voltage between welding chips. An inspection control circuit that functions as an inspection control section connected to the latter stage of the circuit, and a normal control circuit that functions as an energized control section connected to the latter stage of the inspection control circuit, are installed separately. an initial condition setting circuit that functions as an initial condition setting section; a firing angle control circuit connected to the inspection control circuit, the normal control circuit, and the initial condition setting circuit; and a firing angle control circuit connected to the failure recognition circuit; If dust occurs during the energized section, the welding current setting output is controlled at the subsequent stage so that the welding output is lower than the initially set welding output from the time the dust is recognized until the welding is completed. It consists of a failure control circuit that outputs to the circuit, and a strike number counter that selects the input to the firing angle control circuit each time, and outputs firing pulses from the firing angle control circuit to control the welding power supply circuit. A control device for a resistance welding machine, characterized in that it is configured to control a rectifying element.