JPH0238015B2 - CHUUNA - Google Patents
CHUUNAInfo
- Publication number
- JPH0238015B2 JPH0238015B2 JP17530283A JP17530283A JPH0238015B2 JP H0238015 B2 JPH0238015 B2 JP H0238015B2 JP 17530283 A JP17530283 A JP 17530283A JP 17530283 A JP17530283 A JP 17530283A JP H0238015 B2 JPH0238015 B2 JP H0238015B2
- Authority
- JP
- Japan
- Prior art keywords
- section
- mixer
- housing
- board
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000010355 oscillation Effects 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 9
- 238000001914 filtration Methods 0.000 claims description 2
- 230000000694 effects Effects 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000002955 isolation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/16—Multiple-frequency-changing
- H03D7/161—Multiple-frequency-changing all the frequency changers being connected in cascade
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D9/00—Demodulation or transference of modulation of modulated electromagnetic waves
- H03D9/06—Transference of modulation using distributed inductance and capacitance
- H03D9/0658—Transference of modulation using distributed inductance and capacitance by means of semiconductor devices having more than two electrodes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、TV信号を受信して希望するTVチ
ヤンネルを選択波して中間周波数に周波数変換
するTV受像機用のチユーナに関するもので、特
にダブル・スーパー・ヘテロダイン方式(以下ダ
ブル・スーパー方式と略す)のチユーナに関する
ものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a tuner for a TV receiver that receives a TV signal, selects a desired TV channel, and converts the frequency to an intermediate frequency. This relates to a tuner using a super-heterodyne system (hereinafter referred to as a double-super system).
従来例の構成とその問題点
第1図は、従来のダブル・スーパー方式のチユ
ーナにおける筐体の分解斜視図であり、長方形の
枠で囲まれた筐体1の内には、幅の方向を同一と
して、枠と平行、あるいは垂直に入れられた複数
個のシールド板2によつて区切られている。なお
3及び4は筐体1の上蓋と下蓋である。さて、と
りわけダブル・スーパー方式においては、存在す
る2つのミキサの部分、すなわち第1のミキサ部
以前の基板と第2のミキサ以降の基板を分離し、
その間を空間とする空間部5を設け、それぞれを
シールド板2a,2bで囲むという方法をとるこ
とが多い。Configuration of conventional example and its problems Figure 1 is an exploded perspective view of the housing of a conventional double super type tuner. They are separated by a plurality of shield plates 2 placed parallel to or perpendicular to the frame. Note that 3 and 4 are the upper and lower lids of the housing 1. Now, especially in the double super method, the two existing mixer parts, that is, the board before the first mixer part and the board after the second mixer part, are separated,
A method is often adopted in which a space 5 is provided between them, and each is surrounded by shield plates 2a and 2b.
この場合、シールド効果を優先すると、多数の
シールド板が必要となり、アースの周囲パターン
を確保する必要が生じ、またすべてほぼ同一平面
上に基板が並ぶために面積が大きくなり、小形化
に適さない。また特に第1のミキサ部と第2のミ
キサ部の間にシールドされた空間をあける場合に
は、その空間の分だけ体積が大きくなるという欠
点を有していた。さらには、構造が複雑なため、
製造上のコスト高も問題となる。 In this case, if the shielding effect is prioritized, a large number of shield plates will be required, and a surrounding ground pattern will need to be secured, and the area will become large because the boards are all arranged on almost the same plane, making it unsuitable for miniaturization. . Furthermore, especially when a shielded space is provided between the first mixer section and the second mixer section, the volume increases by the space. Furthermore, due to the complex structure,
High manufacturing costs also pose a problem.
発明の目的
本発明は以上のような問題点を解決し、小形化
に適し、シールド効果、温度特性が良好で、また
製造が容易なチユーナを提供するものである。OBJECTS OF THE INVENTION The present invention solves the above-mentioned problems and provides a tuner that is suitable for miniaturization, has good shielding effect and temperature characteristics, and is easy to manufacture.
発明の構成
本発明は、第1の局部発振部を含む第1のミキ
サ部の、マイクロストリツプ回路よりなるプリン
ト基板と、第2の局部発振部を含む第2のミキサ
部の、マイクロストリツプ回路よりなるプリント
基板とを分離し、前記二つのプリント基板とも片
面をアース面とし、前記アース面をそれぞれ別の
部分の筐体シヤーシ底面に接合し、前記二つの基
板のアース面側の筐体部分を背中合わせにして二
重構造とし、前記二重構造の一側面に隣接して、
第1中間周波バンドパスフイルタを有する濾波手
段を収納する収納部を設け、前記第1のミキサ部
と第2のミキサ部との間を接続し、前記第1のミ
キサ部筐体、第2のミキサ部筐体、及び収納部と
のいずれにも隣接する二つの側面の一方に広帯域
高周波増幅器を含む実装回路基板よりなる入力回
路部の筐体、他方に第2中間周波増幅器を含む実
装回路基板よりなる出力回路部の筐体を設けるこ
とにより、上記目的を達成するものである。Structure of the Invention The present invention provides a printed circuit board including a microstrip circuit of a first mixer section including a first local oscillation section, and a microstrip circuit of a second mixer section including a second local oscillation section. A printed circuit board consisting of a lip circuit is separated, one side of each of the two printed circuit boards is a ground surface, each of the ground surfaces is bonded to the bottom surface of the case chassis of a different part, and the ground surface side of the two printed circuit boards is The housing portions are placed back to back to form a double structure, and adjacent to one side of the double structure,
A storage part is provided for storing a filtering means having a first intermediate frequency bandpass filter, and the first mixer part and the second mixer part are connected, and the first mixer part housing and the second mixer part are connected to each other. The case of the input circuit section consists of two side surfaces adjacent to both the mixer section case and the storage section, one of which is a mounted circuit board that includes a broadband high frequency amplifier, and the other side that includes a mounted circuit board that includes a second intermediate frequency amplifier. The above object is achieved by providing a casing for the output circuit section consisting of the following.
実施例の説明
以下に本発明を図面を用いてその一実施例と共
に説明する。第2図は、本発明の一実施例におけ
るチユーナの回路系統図を示すものであり、広帯
域高周波増幅器を含む入力回路部6から送出され
る信号を、電圧制御発振器により発振周波数が可
能な第1の局部発振部を含むミキサ部7で第一中
間周波数に変換する。そしてその出力を第1中間
周波バンドパスフイルタ8で波し、さらにその
信号を第2の局部発振部を含むミキサ部9で第二
中間周波数に変換し、その後、第二中間周波増幅
器を含む出力回路部10を介して出力されるとい
う回路構成となつている。DESCRIPTION OF EMBODIMENTS The present invention will be described below along with one embodiment thereof using the drawings. FIG. 2 shows a circuit diagram of a tuner according to an embodiment of the present invention, in which a signal sent from an input circuit section 6 including a wideband high-frequency amplifier is transmitted to a first oscillator whose oscillation frequency can be set by a voltage-controlled oscillator. A mixer section 7 including a local oscillation section converts the frequency into a first intermediate frequency. Then, the output is waved by a first intermediate frequency band pass filter 8, and further, the signal is converted to a second intermediate frequency by a mixer section 9 including a second local oscillation section, and then an output including a second intermediate frequency amplifier. The circuit configuration is such that the signal is output via the circuit section 10.
次に上記構成を有したチユーナについて、その
筐体とともに説明する。 Next, the tuner having the above configuration will be explained together with its housing.
第3図は本発明の一実施例におけるチユーナの
外観を示すもので、第3図aは同平面図、第3図
bは点線Aにおける側断面図、第3図c点線Bに
おける側断面図である。第3図に示したチユーナ
において、マイクロストリツプ回路で構成された
基板11および基板12の一方の面、すなわち互
いに対向する面はアースとなつている。そして基
板11および12のアース面はシヤーシ13ある
いはシヤーシ14をはさんで、背中合わせにマイ
クロストリツプ回路を構成している。なおシヤー
シ14は必ずしも必要ではなくシヤーシ13で兼
ねてもよい。基板11および12の周囲は、長方
形の筐体枠15および16で囲まれている。そし
てシヤーシ13と筐体枠15とで作られる筐体内
部17、およびシヤーシ14と筐体枠16とで作
られる筐体内部18には、ダブルスーパー方式チ
ユーナの第1の局部発振部を含むミキサ部7およ
び第2の局部発振部を含むミキサ部9が収められ
る。なお筐体枠15と16は分離していても良
く、つながつていても良い。またシヤーシ13と
筐体枠15あるいはシヤーシ14と筐体枠16に
ついても同様である。そして筐体枠15および1
6の側面に隣接して、第一中間周波数バンドパス
フイルタ8の収容部19を設け、筐体内部17あ
るいは筐体内部18から信号を入力し、筐体内部
18あるいは筐体内部17へ出力する。筐体内部
17および18およびフイルタ収容部19とで、
また一つの筐体ブロツクを形成するが、その側面
のうち3つの部分とも隣接している側面が2つあ
る。その側面の一方に入力部筐体20を、もう一
方に出力部筐体21を接続する。なお、入力部筐
体20の枠幅、筐体枠15および16の合計幅、
フイルタ収容部19の枠幅、出力部筐体21の枠
幅をそろえておくと、第4図に示すように蓋3,
4をする場合に都合が良い。全体としては、第4
図のように中央の一部分が2重構造となる。 FIG. 3 shows the external appearance of a tuner according to an embodiment of the present invention, FIG. 3 a is a plan view thereof, FIG. 3 b is a side sectional view taken along dotted line A, and FIG. 3 c is a side sectional view taken along dotted line B. It is. In the tuner shown in FIG. 3, one surface of the substrate 11 and substrate 12, which are composed of microstrip circuits, ie, the surfaces facing each other, are grounded. The ground planes of the substrates 11 and 12 are placed back to back with a chassis 13 or 14 in between to form a microstrip circuit. Note that the chassis 14 is not necessarily required, and the chassis 13 may also serve as the chassis 14. The substrates 11 and 12 are surrounded by rectangular housing frames 15 and 16. A mixer including a first local oscillator of a double super tuner is provided in a housing interior 17 made of the chassis 13 and the housing frame 15 and a housing interior 18 made of the chassis 14 and the housing frame 16. A mixer section 9 including a section 7 and a second local oscillation section is housed therein. Note that the housing frames 15 and 16 may be separated or connected. The same applies to the chassis 13 and the housing frame 15 or the chassis 14 and the housing frame 16. and housing frames 15 and 1
A housing part 19 for the first intermediate frequency bandpass filter 8 is provided adjacent to the side surface of the filter 6, and a signal is inputted from the inside of the housing 17 or the inside of the housing 18 and output to the inside of the housing 18 or the inside of the housing 17. . With the housing interiors 17 and 18 and the filter housing section 19,
Also, although forming one housing block, there are two side faces that are adjacent to all three of the side faces. An input section casing 20 is connected to one side of the side, and an output section casing 21 is connected to the other side. Note that the frame width of the input unit housing 20, the total width of the housing frames 15 and 16,
If the frame width of the filter accommodating part 19 and the frame width of the output part housing 21 are made the same, the lid 3, as shown in FIG.
Convenient when doing 4. Overall, the 4th
As shown in the figure, a part of the center has a double structure.
このような構成をとることにより、入力回路部
6が設けられる入力部20と、ミキサ部7が設け
られる筐体内部17と、ミキサ部9が設けられる
筐体内部18と、出力回路部10が設けられる出
力部21とはすべて別基板となるが、筐体内部1
7と18に実装する基板、すなわち基板11およ
び12はマイクロストリツプ回路で構成するた
め、入力部の基板22あるいは出力部の基板23
とは、元来別基板とすべきものである。また、蓋
3,4を設けた場合、蓋と基板ならびに実装回路
部品との距離が他の部分に比べて、2重構造の部
分は約半分となるが、マイクロストリツプ回路
で、薄形に実装できるため、差しつかえない。さ
らに第1の局部発振部を含む第一ミキサ部7と、
第2の局部発振部を含むミキサ部9を筐体内部1
7と筐体内部18とに分離するので、筐体により
シールドが行なわれるという様に、それぞれシー
ルドをとるべき部分に、必然的に筐体が分かれて
いる構造となつている。また、入力部20、出力
部21における基板22,23はマイクロストリ
ツプ回路よりなる基板11,12とは別基板であ
り、二重構造とはなつていないため、製造上で基
板11,12を設ける前にハンダデイツプ工法が
可能であり、製造コストの低減が計れる。さら
に、ミキサ部7,9は、大増幅器を有する入力回
路部6、出力回路部10とは完全に分離されてい
るため、温度特性が良好である。 By adopting such a configuration, the input section 20 where the input circuit section 6 is provided, the inside of the casing 17 where the mixer section 7 is provided, the inside of the casing 18 where the mixer section 9 is provided, and the output circuit section 10 are separated. The output section 21 provided is all on a separate board, but inside the casing 1
Since the boards mounted on 7 and 18, that is, the boards 11 and 12, are composed of microstrip circuits, the input part board 22 or the output part board 23
should originally be a separate board. In addition, when lids 3 and 4 are provided, the distance between the lid and the board and mounted circuit components is approximately half that of the other parts, but the distance between the lid and the board and mounted circuit components is approximately half that of the other parts. This is not a problem since it can be implemented in Furthermore, a first mixer section 7 including a first local oscillation section,
The mixer section 9 including the second local oscillation section is placed inside the housing 1.
7 and the interior of the casing 18, the casing provides shielding, and the casing is inevitably separated into sections that should be shielded. Further, the substrates 22 and 23 in the input section 20 and the output section 21 are separate substrates from the substrates 11 and 12 made of microstrip circuits, and do not have a double structure, so the substrates 11 and 12 are It is possible to use the solder dip method before installing the wafer, reducing manufacturing costs. Further, since the mixer sections 7 and 9 are completely separated from the input circuit section 6 and the output circuit section 10 having large amplifiers, their temperature characteristics are good.
発明の効果
以上説明したように本発明はマイクロストリツ
プ回路構成となる第1のミキサ部と第2のミキサ
部とを背中合わせに二重構造としその二重構造を
つなぐ形で側面に隣接して第一中間周波バンドパ
スフイルタを有する波手段が実装されているた
め、小形化をはかることができるとともに、その
二重構造の筐体シヤーシによつて、必要とされる
第1のミキサ部と第2のミキサ部との充分なシー
ルド効果を得ることができる。また、それらの周
波数の高い部分を間にはさんで両側に入力回路部
と出力回路部とが設けられているため、入出力の
アイソレーシヨン特性上、あるいはシールド効果
上有利な構造となつている。さらに、本願発明の
構造によれば、ハンダデイツプ工法が可能であ
り、製造コストの低減が計れるとともに、第1、
第2のミキサ部は大増幅器を有する入力回路部、
出力回路部とは完全に分離されており、また双方
が同一筐体内に設けられているため温度特性が良
好となる。Effects of the Invention As explained above, the present invention has a microstrip circuit configuration in which the first mixer section and the second mixer section have a double structure back to back, and the double structure is connected to the side surfaces of the first mixer section and the second mixer section. Since the wave means having the first intermediate frequency bandpass filter is mounted in the casing, it is possible to achieve miniaturization, and the double-structure housing chassis allows for the first mixer section and the necessary A sufficient shielding effect with the second mixer section can be obtained. In addition, since the input circuit section and the output circuit section are provided on both sides with the high frequency part in between, the structure is advantageous in terms of input/output isolation characteristics and shielding effect. There is. Furthermore, according to the structure of the present invention, the solder dip method is possible, and the manufacturing cost can be reduced.
The second mixer section includes an input circuit section having a large amplifier;
Since it is completely separated from the output circuit section and both are provided in the same housing, the temperature characteristics are good.
第1図は従来のチユーナの筐体の外観図、第2
図は、本発明の一実施例におけるチユーナの回路
系統図、第3図aは同チユーナの平面図、第3図
b,cは同チユーナの側断面図、第4図は同チユ
ーナの外観図である。
6……入力回路部、7……ミキサ部、8……第
一中間周波バンドパスフイルタ、9……ミキサ
部、10……出力回路部、11,12……マイク
ロストリツプ回路基板、13,14……アース面
シヤーシ、15,16……基筐体枠シヤーシ、1
7,18……筐体内部、19……第一中間周波バ
ンドパスフイルタ収容部、20……入力部、21
……出力部、22,23……基板。
Figure 1 is an external view of the conventional tuner casing, Figure 2
The figures are a circuit diagram of a tuner according to an embodiment of the present invention, FIG. 3a is a plan view of the tuner, FIGS. 3b and c are side sectional views of the tuner, and FIG. 4 is an external view of the tuner. It is. 6... Input circuit section, 7... Mixer section, 8... First intermediate frequency band pass filter, 9... Mixer section, 10... Output circuit section, 11, 12... Microstrip circuit board, 13 , 14... Ground surface chassis, 15, 16... Base housing frame chassis, 1
7, 18... Inside the housing, 19... First intermediate frequency band pass filter housing section, 20... Input section, 21
...Output section, 22, 23... Board.
Claims (1)
マイクロストリツプ回路よりなるプリント基板
と、第2の局部発振部を含む第2のミキサ部の、
マイクロストリツプ回路よりなるプリント基板と
を分離し、前記二つのプリント基板とも片面をア
ース面とし、前記アース面をそれぞれ別の部分の
筐体シヤーシ底面に接合し、前記二つの基板のア
ース面側の筐体部分を背中合わせにして二重構造
とし、前記二重構造の一側面に隣接して、第1中
間周波バンドパスフイルタを有する、前記第1、
第2のミキサ部のプリント基板とは別基板の濾波
手段を収納する収納部を設け、前記第1のミキサ
部と第2のミキサ部との間を接続し、前記第1の
ミキサ部筐体、第2のミキサ部筐体、及び収納部
とのいずれにも隣接する二つの側面の一方に広帯
域高周波増幅器を含む、前記第1、第2のミキサ
部のプリント基板とは別基板の実装回路基板より
なる入力回路部の筐体、他方に第2中間周波増幅
器を含む、前記第1、第2のミキサ部のプリント
基板とは別基板の実装回路基板よりなる出力回路
部の筐体を設けたことを特徴とするチユーナ。1 of the first mixer section including the first local oscillation section,
A printed circuit board consisting of a microstrip circuit, and a second mixer section including a second local oscillation section.
A printed circuit board consisting of a microstrip circuit is separated, one side of each of the two printed circuit boards is a ground surface, each of the ground surfaces is bonded to the bottom surface of the case chassis of a different part, and the ground surfaces of the two boards are connected to each other. The first,
A storage section for accommodating a filtering means on a board separate from the printed circuit board of the second mixer section is provided, the first mixer section and the second mixer section are connected, and the first mixer section housing is connected to the second mixer section. , a mounted circuit on a board separate from the printed circuit boards of the first and second mixer sections, including a broadband high-frequency amplifier on one of two side surfaces adjacent to both the second mixer section housing and the storage section. A casing of the input circuit section is made of a substrate, and a casing of the output circuit section is provided with a casing of a mounted circuit board that is a separate board from the printed circuit boards of the first and second mixer sections and includes a second intermediate frequency amplifier on the other side. Chiyuna is characterized by that.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17530283A JPH0238015B2 (en) | 1983-09-22 | 1983-09-22 | CHUUNA |
| US06/652,678 US4661998A (en) | 1983-09-22 | 1984-09-19 | Double superheterodyne tuner |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17530283A JPH0238015B2 (en) | 1983-09-22 | 1983-09-22 | CHUUNA |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6066516A JPS6066516A (en) | 1985-04-16 |
| JPH0238015B2 true JPH0238015B2 (en) | 1990-08-28 |
Family
ID=15993719
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17530283A Expired - Lifetime JPH0238015B2 (en) | 1983-09-22 | 1983-09-22 | CHUUNA |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0238015B2 (en) |
-
1983
- 1983-09-22 JP JP17530283A patent/JPH0238015B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6066516A (en) | 1985-04-16 |
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