JPH0243222B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is directed to a programmable read-only memory as described in Japanese Patent Application No. 53-102790 (Japanese Unexamined Patent Publication No. 54-46447) related to the earlier application. The present invention relates to an improvement in a portable data carrier for storing and processing data, which, in combination with reading and writing means of a microprocessor for writing, is provided with means for providing protection against plagiarism.

The portable data carrier mentioned in said earlier application is a non-volatile memory, a programmable read only memory “PROM” (abbreviation for the English term “programmable read only memory”).
a microprocessor associated with a microprocessor having means for reading and writing to portions of the programmable read-only memory; and means for reading and writing from portions of the programmable read-only memory. It is characterized by comprising means for receiving and transmitting data to be written. In the portable data carrier as described above, the means for reading and writing further comprise first means to third means, the first means recognizing or checking the enabling key or access key. a second means, in combination with the first means, for writing an error bit in a zone of the programmable read-only memory when the key is in error; It is also characterized in that three means, in combination with the first means, write an access bit to another zone of the programmable read-only memory when the key is correct.

In creating the invention relating to a portable data carrier for storing and processing the data described in the specification of the prior application, the present inventor focused on the following:
The access key is a non-volatile programmable read-only memory PROM.
related to certain rights for reading and writing in specific zones of the
Accessing programmable read-only memory using keys has been a fact that needs to be protected in certain applications.

Various methods have been proposed in the past for discouraging illegal offenders from making various attempts to discover an access key to access memory. The most well-known of these methods is to permanently write key errors to non-volatile memory and take action when the number of errors exceeds a predetermined value. It is prohibited. However, this means is not effective when used alone. In fact, if we observe the variation of the write current in the memory and limit it appropriately so that no error recording can occur,
The correct key can be accurately determined. This problem is solved in the invention described in the above-mentioned specification by utilizing the symmetrical operation of the microprocessor in connection with automatic verification of write operations by the microprocessor.

That is, the memory is always written to, regardless of whether the access key is correct or incorrect. Therefore, tortfeasors cannot examine the results of their acts or work.

What is described in the above-mentioned prior application is completely satisfactory in writing operations. This is because the memory contents will be changed anyway. By using one error bit or one access bit as the code to write, symmetry is guaranteed.

In a read operation, if it is desired to protect access using a key, it is first necessary to write to a zone of memory reserved for this purpose.

In this way, all accesses, correct or incorrect, will be memorized or stored in the access memory, which may limit the number of protected read operations. Advantageous if important.

On the other hand, providing this function requires a relatively large memory capacity, which is disadvantageous in terms of memory. Furthermore, unless working memory (memoire de travail) is full,
This feature cannot be used if you want to protect read access an unlimited number of times.

In order to solve the above technical problem, the present invention adds an access memory and an error memory which are electrically rewritable ROMs.

According to the invention, a portable data carrier for storing and processing data includes a microprocessor, a non-volatile memory whose access is protected by an enabling key, and an electrically rewritable
The memory element is a ROM and the microprocessor has at least an internal first means for reading and writing in the protected memory and an internal second means for receiving external data.
and the internal first means comprises:
means for checking an enabling key received on said data carrier from an external device; means for writing into a memory element that is an electrically rewritable ROM;
A means for erasing a corresponding portion of the electrically rewritable ROM memory element immediately before each write to the electrically rewritable ROM memory element, and a means for erasing the corresponding portion of the electrically rewritable ROM memory element, and writing the code to the electrically rewritable ROM. A portable data carrier for storing and processing data is provided, characterized in that it also comprises means for checking what has actually been done.

EMBODIMENT OF THE INVENTION Below, one Example of this invention will be described in detail based on an accompanying drawing.

FIG. 1 shows a schematic structure of an embodiment of a portable data carrier according to the present invention. The microprocessor 1 is connected to a non-volatile memory programmable read-only memory 2 via a data address bus 34, and an error memory 3 and an access memory 4 are connected to the data address bus 34. connected directly. (The microprocessor 1, non-volatile memory 2 and data address bus 34 shown in FIG. 1 are similar to the microprocessor 1, programmable read-only memory 2 and FIG. ) The microprocessor 1 corresponds to the data and address bus 34.
through which the non-volatile memory 2, error memory 3 and access memory 4 are completely controlled. Non-volatile memory 2 stores general information and secret information.

Error memory 3 and access memory 4
is added according to the present invention and can be any capacitance, but it is important that it can be electrically erased by a function exclusive to the microprocessor 1.

Here, "exclusively" in "functions exclusive to microprocessor 1" means that these error memory 3 and access memory 4 cannot be erased by an external device of the portable data carrier. . The functions exclusive to this microprocessor 1 can be obtained by a locking device (dispositif de verrouillage) operated by a program, but this locking device is not related to the present invention. .

As the error memory 3 and the access memory 4, EAROM, which is a nonvolatile memory, can be used. EAROM is the English term “Electrically Alterable Read Only Memory”
(Electrically rewritable ROM). If you require further information regarding such memory, please contact the City of Paris.
Les microprocesseurs, co-authored by RODNAY ZAKS and PIERRE LE BEUX, published by SYBEX, 313 rue Lecourbe, 75015, pages 77 to 75015.
See page 81.

The operation of the portable data carrier according to the invention is as follows:
Although it can take several different forms,
In any case, the program is executed by a program stored in a control memory associated with the microprocessor 1 (corresponding to the control memory 20 in FIG. 5 attached to the specification of the prior application). Below, Figures 2 and 3
This will be explained using the flowchart shown in the figure.

In the example of FIG. 2, at the start of each access (step 100), the access memory 4 is erased. In step 101, microprocessor 1 checks whether the requested access was made with the correct key.

If the key is correct, the data bits are written to access memory 4 (step 102);
However, if the key is incorrect, this data bit is written to the error memory 3 (step 104). Step 103 and Step 105
At , it is checked whether a bit has actually been written to either the error memory 3 or the access memory 4. This is accomplished by monitoring the write time, write current, reading and verifying the written bits, etc. If no write operation is performed, an error occurs.

This mode of operation is characterized by a contrast in the actions performed, regardless of whether the key is correct or incorrect. Pre-erasing the access memory 4 allows unlimited reuse of this zone for each read. For error memory 3, error bits are written to successively larger addresses starting from a certain predetermined address. Therefore, traces of incorrect access are stored without being erased.

Figure 3 shows error memory 3 and access memory 3.
A modification example of the use of the memory 4 is shown. At the start of each access (step 106), the access
The codes that are the contents of the memory 4 and the error memory 3 are read out and stored in the A and B registers of the microprocessor 1 (corresponding to registers A and B in FIG. 5 of the specification of the prior application). .

In step 107 the key is checked and if it is the correct key, the contents of the access memory 4 are erased in step 108. The A register is then made to act as an access counter, incremented by one unit, and then
It is written again to the access memory 4 in step 109. If the key is incorrect, the contents of error memory 3 are erased in step 111. The B register is then made to act as an error counter, incremented by one unit and written back to the error memory 3 in step 112.

In steps 110 and 113, it is checked whether a write operation has actually occurred. To maintain symmetry of operation, it is preferable to use an n out of m code (code n parmi m) to record errors and number of accesses before and after increments. In this case, the increment of the counters in the A and B registers is
This is done based on a comparison table of n out of m codes and decimal numbers.

This mode of operation is also characterized by the fact that the operations performed are symmetrical, regardless of whether the key is correct or incorrect. Pre-erasing the access memory 4 or the error memory 3 allows an almost unlimited reuse of this zone for each read. Moreover, it can remember not only key errors but also the exact number of correct accesses.
Suitable for use as a coupon ticket.

[Brief explanation of the drawing]

FIG. 1 shows a schematic configuration of an embodiment of a portable data carrier according to the present invention, FIG. 2 is a flow chart showing one mode of operation thereof, and FIG. 3 is a flowchart showing another mode of operation. It is a flowchart showing an aspect. 1...Microprocessor, 2...Non-volatile memory, 3...Error memory, 4...Access memory
Memory, 34...data address bus.

Claims (1)

[Scope of Claims] 1. A portable data carrier for storing and processing data, comprising: a microprocessor; a non-volatile memory whose access is protected by an enabling key; and an electrically rewritable memory. a memory element that is a ROM; and the microprocessor has at least internal first means for reading and writing in the protected memory and internal second means for receiving external data. said internal first means include means for checking an enabling key received on said data carrier from an external device; Each time a trial is made, a certain code can be electrically rewritten.
a means for writing to a memory element that is a ROM;
means for erasing a corresponding portion of the memory element that is the electrically rewritable ROM immediately before each writing of the code into the memory element that is the electrically rewritable ROM; and a means for checking whether writing to the rewritable ROM has actually been carried out. Portable data for storing and processing data characterized by comprising: carrier. 2. The memory element, which is an electrically rewritable ROM, has a first part for writing a code indicating access when the transmitted enabling key is correct, and a first part for writing an error code when the enabling key is incorrect. Portable data carrier according to claim 1, characterized in that it comprises a second part for writing an indicating code. 3. The portable data carrier according to claim 1 or 2, wherein the code written in the electrically rewritable ROM is an n out of m code. 4. The internal first means further counts and writes codes indicative of access and error information in the first and second portions of the memory element to obtain respective values of the number of accesses and the number of errors. Claim 2 or 3 is characterized in that it comprises means for making the expression
Portable data carriers as described in Section.