JPH0245154B2 - DENRYUSOKUTEISOCHI - Google Patents

Description

[Detailed Description of the Invention] The present invention is a measuring device whose output is given as a current,
In particular, the aim is to improve the accuracy of a current measuring device that digitally displays the output.

When digitally displaying the output of a measuring device whose output is given as a current, such as an electromagnetic force balance scale, the output current changes due to disturbances, so accuracy is lost unless the actual measurement time is extended. In particular, when an electronic circuit generally called a double integration circuit is used, the actual measurement time is about 1/3 of one measurement cycle, but the present invention is designed to lengthen this time.

FIG. 1 shows an example of a conventional method, in which numeral 1 represents a source of measurement current and numeral 2 represents a load resistance. The voltage developed across 2 is 30 A-D
A converter converts it into a digital quantity proportional to the voltage. Although various configurations of the 30 A/D converter have been put into practical use, a double integral type circuit will be explained as an example. 4 is an operational amplifier, 5 is an integrating capacitor, 6 is an integrating resistor, 11 is a capacitor that determines the operating point of 4, 4, 5, 6,
11 constitutes an analog integration circuit. 7, 8, 1
0a and 10b indicate semiconductor switches. 3 is a reference power source which has the opposite polarity to the voltage generated across 2. When the switch 7 or 8 is closed, the integrated value voltage of the terminal voltage of 2 or the reference voltage of 3 is outputted from 4, respectively. 12 is a voltage comparison circuit whose (+) input side is grounded, and outputs a positive power supply voltage while integrating the (-) input, but suddenly changes to a negative power supply voltage when the input changes from negative to positive. do. 13 is a sequence control circuit, which is a semiconductor switch; 7, 8,
10a, 10b and the opening/closing of gate circuit 15. 14 is a clock pulse generator. When switches 7 and 8 are opened and switches 10a and 10b are closed, feedback is applied through 4 and 12, and the outputs of 4 and 12 become almost zero. First, the switches 10a and 10b
is opened and 7 is closed for a certain period of time _t1 (see Figure 4), the terminal voltage of load resistor 2 is integrated and the output V of operational amplifier 4 is: V=-1/C∫ ^t1 ₀ iRl/Ridt =-iRlt ₁ /CRi ...(1) However, Rl and Ri are resistance values of 2 and 6, respectively, and C
is the capacitance of 5, i is the current of 1 flowing through Rl, and _t1 is the time that switch 7 is closed.

Next, switch 7 is opened while switches 10a and 10b remain open, and switch 8 is closed. Time t ₂ until the output voltage of operational amplifier 4 becomes zero 2 Reference voltage 3 of opposite polarity
is added to the input, the output voltage of 4 in the middle is V=-iRlt ₁ /CR ₁ -1/C∫ ^t ₀ (-e)/R _t dt =-iRlt ₁ /CR _i +[et/CR _i ] ^t ₀ ...(2), and since V=0 at t=t ₂ , from equation (2), iRlt ₁ /CR _i =et ₂ /CR _i , that is, t ₂ =i(Rlt ₁ /e ) ...(3) Therefore, the time t ₂ for closing the switch 8 is proportional to the current i if Rl, t ₁ and e are constant. Therefore, if a clock pulse of _t2 hours is output from 15, the number of pulses will be proportional to the current i. However, as is clear from equation (3), if the value of the resistance value Rl of the load resistor 2 changes due to the influence of self-heating due to the current i, the integral time t ₂ is naturally affected as well.

Figure 2 shows a reference current 9 of opposite polarity to the measurement current 1 being alternately passed through the common load resistor 2 during the periods t ₁ and t ₂ above, and the terminal voltage is integrated to measure the change in resistance value due to self-heating of 2. This shows a circuit that prevents the effects of

Figure 4 shows switches 7a, 8a and 1 in Figure 2.
FIG. 4 is an explanatory diagram showing the relationship between the operation timing of 0 and the output of 4;

In FIG. 4, t ₀ is one cycle of measurement, of which current 1 is measured only during time t ₁ . Since the reference current is constant, the time t ₂ required to integrate with the opposite polarity and make the integral output zero becomes longer as the magnitude of the measurement current 1 becomes larger. Therefore, the time t ₃ for calibrating the zero point of the integrator becomes shorter as 1 becomes larger. However, it is necessary to set aside a minimum amount of time. t ₁ with t ₀ constant
To increase the value, it is possible to increase the reference current 9 and the frequency of the clock pulse 14, but both have their limits, and to ensure accuracy, t ₁ should be about 1/3 to 1/2 of t ₀ . There are many cases where this is unavoidable. Therefore, if there is fluctuation in the measured current, the variation between conversions will increase.

FIG. 3 shows an embodiment according to the present invention, which has the same configuration as FIG. 2 except for 31 and 32.

In FIG. 3, 32 is a voltage comparator that detects when the output of the integrator exceeds a certain voltage.
31 is a reference power supply for setting a constant voltage (Vm). In this circuit, 7a, 8b are closed, 8a,
7b is opened and the voltage that appears at terminal 2 is 4,
Integrate at 5 and 6. The output of 4 is 31 within the time of t ₁
If the set voltage (Vm) is not reached (in the case of FIG. 5A), the voltage comparator 32 does not operate. t The output of 4 reached the voltage of 31 within ₁ hour (Fig. 5B,
In case C), the comparator 32 operates, and the switch 8a is closed via the program setting circuit 13.
b is opened, and at the same time the gate circuit 15 is opened and a clock pulse is sent. After _t1 hour, switch 7a is opened and switch 7b is closed, and the integrator continues to operate until the output of 4 becomes zero. The magnitude of the reference current 9 is set to be approximately the same as the maximum value of the measurement current 1. In this way, the output of the integrator and the switches 7a, 8a and 10
The operation timing is as shown in FIG. The time that gate circuit 15 is open and transmits a clock pulse is _t2 .

The magnitude of the set voltage 31 of the voltage comparator 32 may be selected in relation to the magnitude of the reference current 9 so that the output polarity of the voltage comparator 4 does not change from negative to positive within the time _t4 .

Since the time during which the measurement current 1 is flowing through the load resistor 2 and the time during which the reference current 9 is flowing through the load resistor 2 can be made to overlap, the ratio of the integration time t 1 to t ₀ can be increased, and the ratio of the integration time t ₁ to t 0 can be increased. 1.5 to 2 compared to the method of
It becomes possible to double the ratio.

Since the actual measurement time of an A-D converter circuit, which is usually called a double integral type, is about 1/3 of one cycle,
When there is a disturbance, such as when using a scale, the measurement accuracy may be slightly inferior. The present invention can prevent this and reduce the influence of disturbance by 20% to 30%.

[Brief explanation of the drawing]

FIG. 1 is an example of a conventionally used circuit, and is an explanatory diagram in which a measurement current is passed through a load resistor 2, and the terminal voltage is converted into pulses by a double integral type AD converter for digital measurement. Figure 2 is an explanatory diagram of digitally measuring the measurement current and reference current by flowing them alternately through a common load resistor 2 and converting the current into pulses with a double integral type A-D converter, and Figure 3 is the invention of the present invention. In the implementation circuit example, a voltage comparator is installed at the output of the integrator 4 in Fig. 2, and after its operation, a period is set in which the measurement current and the reference current are simultaneously passed through the load resistor 2, so that the integration time can be increased, and the measurement accuracy is improved. FIG. 4 is an explanatory diagram showing the relationship between the operation timing of switches 7a, 8a and 10 in FIG. 2 and the output of the integrator 4, and FIG. 7
Operation timing of a, 8a and 10 and integrator 4
FIG. 1... Source of measurement current, 2... Load resistance (Rl), 3, 31... Reference voltage source, 4... Arithmetic amplifier, 5... Integrating capacitor (C), 6... Integrating resistor ( Ri), 7, 8, 10a, 10b, and 7a,
7b, 8a, 8b, 10...Electronic switch controlled ON-OFF by 13, 9...Reference current source, 11
...Capacitor that determines the operating point of 4, 12,3
2... Voltage comparison circuit, 13... Sequence control circuit, 14... Clock pulse generator,
15...AND gate circuit.

Claims (1)

[Claims] 1. The measurement current is applied to a load resistor, the terminal voltage of the load resistor is accumulated in a capacitor for a certain period of time via an integrator, and the integrated value output from the reference power source is superimposed on this accumulated charge with the opposite polarity. In a current measuring device equipped with means for erasing charges and converting the time required for erasing into pulses, a voltage comparison circuit that operates at a predetermined voltage level when the measurement current is applied to a load resistor is connected to the output of the integrator. A switch means is provided on the side, and after the comparison circuit is activated, the reference current is superimposed on the measurement current and the same is applied to the load resistor, and the pulse conversion means is operated from the time when the superimposed reference current is applied. Current measuring device.