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JPH0245261B2 - JIKIDEISUKUSOCHI - Google Patents
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JPH0245261B2 - JIKIDEISUKUSOCHI - Google Patents

JIKIDEISUKUSOCHI

Info

Publication number
JPH0245261B2
JPH0245261B2 JP22568783A JP22568783A JPH0245261B2 JP H0245261 B2 JPH0245261 B2 JP H0245261B2 JP 22568783 A JP22568783 A JP 22568783A JP 22568783 A JP22568783 A JP 22568783A JP H0245261 B2 JPH0245261 B2 JP H0245261B2
Authority
JP
Japan
Prior art keywords
speed
control section
target
generation circuit
deceleration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP22568783A
Other languages
Japanese (ja)
Other versions
JPS60117459A (en
Inventor
Keiichi Kono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP22568783A priority Critical patent/JPH0245261B2/en
Publication of JPS60117459A publication Critical patent/JPS60117459A/en
Publication of JPH0245261B2 publication Critical patent/JPH0245261B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B21/00Head arrangements not specific to the method of recording or reproducing
    • G11B21/02Driving or moving of heads
    • G11B21/08Track changing or selecting during transducing operation
    • G11B21/081Access to indexed tracks or parts of continuous track
    • G11B21/083Access to indexed tracks or parts of continuous track on discs

Landscapes

  • Moving Of Head For Track Selection And Changing (AREA)
  • Control Of Position Or Direction (AREA)

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明は、記録/再生ヘツドの目標位置への位
置付け動作であるシーク動作の減速制御区間の基
準速度を制御する機能を有する磁気デイスク装置
に関する。
Detailed Description of the Invention (a) Technical Field of the Invention The present invention relates to a magnetic disk device having a function of controlling a reference speed in a deceleration control section of a seek operation, which is an operation of positioning a recording/reproducing head to a target position. .

(b) 技術の背景 磁気デイスク装置において、記録/再生ヘツド
を目標位置に位置決めする機構としては一般的
に、ボイスコイル型の直進モータによる場合と回
転軸の回りに自由に回転し得るように配置された
アームに固定された回転型のボイスコイルモータ
による場合とが実用化されている。これらの機構
によるシーク動作には、例えばボイスコイルモー
タを加速制御する加速制御区間とボイスコイルモ
ータを減速制御する減速制御区間とがあり、加速
制御区間ではボイスコイルモータの両端に一定電
圧をかける定電圧方式を、減速制御区間は現在位
置と目標位置までの位置(距離)の差に応じて目
標速度を与え、現在の速度と目標速度との差に応
じてボイスコイルモータに電流を流す速度制御方
式を採用している。
(b) Background of the technology In magnetic disk devices, the mechanism for positioning the recording/reproducing head at the target position generally includes a voice coil type linear motor and a mechanism arranged so that it can freely rotate around a rotation axis. A rotary voice coil motor fixed to a rotary arm has been put into practical use. The seek operation by these mechanisms includes, for example, an acceleration control period in which the voice coil motor is accelerated and a deceleration control period in which the voice coil motor is decelerated.In the acceleration control period, a constant voltage is applied to both ends of the voice coil motor. Speed control uses a voltage method, and in the deceleration control section, a target speed is given according to the difference between the current position and the position (distance) to the target position, and current is applied to the voice coil motor according to the difference between the current speed and the target speed. method is adopted.

上記制御方式により、記録/再生ヘツドを目標
位置へ高速度で且つ高精度に位置決めする必要が
あるが、ボイスコイルモータを用いた機構には一
定の限界があり、これらの限界を補強したより高
速度で且つ高精度に位置決めする方法の開発が要
望される。
With the above control method, it is necessary to position the recording/playback head to the target position at high speed and with high precision. However, the mechanism using a voice coil motor has certain limitations, and a higher There is a need to develop a method for positioning at high speed and with high precision.

(c) 従来技術と問題点 磁気デイスク装置におけるシーク動作の減速制
御区間での従来の制御方法について、図面を参照
して説明する。
(c) Prior Art and Problems A conventional control method in a deceleration control section of a seek operation in a magnetic disk device will be explained with reference to the drawings.

第1図はシーク動作の従来の制御方法で、Aは
回路ブロツク図、Bは特性図をそれぞれ示す。
FIG. 1 shows a conventional control method for a seek operation, in which A shows a circuit block diagram and B shows a characteristic diagram.

図において、1は基準速度発生回路、2は速度
誤差検出回路をそれぞれ示す。
In the figure, 1 indicates a reference speed generation circuit, and 2 indicates a speed error detection circuit.

尚〜は第1図Aのそれぞれの位置での記号
を示し、は目標速度、は実速度、は速度誤
差、は目標地点までの距離の差、は減速制御
区間信号、はボイスコイルモータ(図示してな
い)に流す電流をそれぞれ示す。
In addition, ~ indicates the symbol at each position in Fig. 1A, where is the target speed, is the actual speed, is the speed error, is the difference in distance to the target point, is the deceleration control section signal, and is the voice coil motor (Fig. (not shown).

第1図はシーク動作の減速制御区間における目
標速度を設定する基準速度発生回路1と関係回
路を示すもので、第1図Bで示す目標地点までの
距離の差が基準速度発生回路1に入力される
と、これにより目標速度が速度誤差検出回路2
に出力される。尚目標地点までの距離の差は加
速制御区間制御前に決定入力され、加速制御区間
でも基準速度発生回路1により目標速度が出力
されるが、この目標速度は参考とする程度であ
り、実質は図示していない他の制御回路により制
御される。
Figure 1 shows the reference speed generation circuit 1 and related circuits that set the target speed in the deceleration control section of the seek operation.The difference in distance to the target point shown in Figure 1B is input to the reference speed generation circuit 1. Then, the target speed is determined by the speed error detection circuit 2.
is output to. Note that the difference in distance to the target point is determined and input before the acceleration control section control, and the target speed is output by the reference speed generation circuit 1 even in the acceleration control section, but this target speed is only for reference, and the actual It is controlled by another control circuit not shown.

一方、速度誤差検出回路2には実速度も入力
される。速度誤差検出回路2では目標速度に対
する実速度の差、即ち速度誤差が出力され、
この速度誤差に応じた電流がボイスコイルモ
ータ(図示してない)に流れ実速度を制御す
る。従来、短時間にシーク動作を終了させるため
にアクセスタイム(現在地点から目標地点まで行
くのに必要な時間)を短縮する方向にあり、アク
セスタイムを短縮するためには、加速制御区間を
長く、減速制御区間を短くして来た。
On the other hand, the actual speed is also input to the speed error detection circuit 2. The speed error detection circuit 2 outputs the difference between the actual speed and the target speed, that is, the speed error.
A current corresponding to this speed error flows to a voice coil motor (not shown) to control the actual speed. Conventionally, the trend has been to shorten the access time (the time required to go from the current point to the target point) in order to complete the seek operation in a short time. The deceleration control section has been shortened.

一方、目標地点までの距離の差が大きいとボ
イスコイルモータ(図示してない)に流す減速電
流も大きくなるが、第1図Bの電流の点線で示
す部分のようにボイスコイルモータ(図示してな
い)に流す電流には一定の制限がある。即ち、減
速電流をId、ボイスコイルモータ(図示してな
い)の両端に与えられる電圧をVc、ボイスコイ
ルモータ(図示してない)の速度に比例した誘起
電圧をVi、ボイスコイルモータ(図示してない)
のコイル抵抗をRcとすると、減速電流Id≦Vc+
Vi/Rcの関係があり、速度誤差信号がVc+
Vi/Rcより大きい電流を要求してもVc+Vi/
Rcまでしか電流は流れずクランプされた状態と
なり、制御不可能となつてしまうと言う欠点があ
つた。
On the other hand, if the difference in distance to the target point is large, the deceleration current flowing through the voice coil motor (not shown) will also increase; There are certain limits to the current that can flow through the That is, the deceleration current is Id, the voltage applied across the voice coil motor (not shown) is Vc, the induced voltage proportional to the speed of the voice coil motor (not shown) is Vi, and the voice coil motor (not shown) is the induced voltage proportional to the speed of the voice coil motor (not shown). (Not)
If the coil resistance of is Rc, then the deceleration current Id≦Vc+
There is a relationship of Vi/Rc, and the speed error signal is Vc+
Even if a current larger than Vi/Rc is required, Vc+Vi/
The drawback was that the current only flowed up to Rc, resulting in a clamped state and uncontrollability.

尚このような状態は目標地点までの距離の差
が所定以上大きい場合に発生し、所定以下の場合
は発生しない。即ち、Vc+Vi/Rc以内の電流で
あれば発生しないと言う特性がある。
Note that such a state occurs when the difference in distance to the target point is larger than a predetermined value, and does not occur when the difference in distance to the target point is greater than a predetermined value. That is, there is a characteristic that if the current is within Vc+Vi/Rc, it will not occur.

(d) 発明の目的 本発明は、上記欠点を解消した新規な磁気デイ
スク装置を提供することを目的とし、特にシーク
動作の目標地点までの距離の差が所定値以上であ
つても、ボイスコイルモータに流す電流を常に飽
和電流以下に制御し、安定したシーク動作が可能
な磁気デイスク装置を実現することにある。
(d) Purpose of the Invention An object of the present invention is to provide a new magnetic disk device that eliminates the above-mentioned drawbacks, and in particular, even if the difference in distance to the target point of the seek operation is more than a predetermined value, the voice coil The object of the present invention is to realize a magnetic disk device that can always control the current flowing through a motor to be below the saturation current and perform stable seek operations.

(e) 発明の構成 本発明は、記録/再生ヘツドの目標位置への位
置付け動作であるシーク動作を加速制御する区間
と減速制御する区間とで分割制御し、前記減速制
御区間の基準速度を発生する基準速度発生回路
と、前記基準速度と実速度を比較し速度誤差信号
を発生する速度誤差検出回路とを備えてなる磁気
デイスク装置であつて、前記加速制御区間の始ま
りと同時に動作を開始して所定信号を出力し、前
記減速制御区間の始まりと同時に前記所定信号の
出力を解除する手段を設け、前記手段の出力を前
記基準速度発生回路に付加し、前記基準速度を変
位させることにより、該シーク動作機構に流す減
速電流を常に飽和電流以下に制御し、安定したシ
ーク動作が可能となることを特徴とする磁気デイ
スク装置により達成することが出来る。
(e) Structure of the Invention The present invention divides and controls a seek operation, which is an operation for positioning a recording/reproducing head to a target position, into an acceleration control section and a deceleration control section, and generates a reference speed for the deceleration control section. and a speed error detection circuit that compares the reference speed with the actual speed and generates a speed error signal, the magnetic disk device starts operating at the same time as the start of the acceleration control section. By providing means for outputting a predetermined signal at the same time as the deceleration control section and canceling the output of the predetermined signal at the same time as the start of the deceleration control section, and adding the output of the means to the reference speed generation circuit to displace the reference speed, This can be achieved by a magnetic disk device characterized in that the deceleration current flowing through the seek operation mechanism is always controlled to be below the saturation current, thereby making it possible to perform stable seek operations.

(f) 発明の実施例 以下本発明を図面を参照して説明する。(f) Examples of the invention The present invention will be explained below with reference to the drawings.

第2図は本発明に係るシーク動作の制御方法
で、Aは回路ブロツク図、Bは特性図をそれぞれ
示す。
FIG. 2 shows a seek operation control method according to the present invention, in which A shows a circuit block diagram and B shows a characteristic diagram.

図において、3は減速制御区間検出回路、4は
オフセツト発生回路、5は判定回路、6はパワー
アンプ、7はボイスコイルモータ(以下VCMと
略称する)をそれぞれ示す。
In the figure, 3 indicates a deceleration control section detection circuit, 4 an offset generation circuit, 5 a determination circuit, 6 a power amplifier, and 7 a voice coil motor (hereinafter abbreviated as VCM).

尚第1図と同一記号は同一内容を示し、又は
オフセツト信号を示す。
Note that the same symbols as in FIG. 1 indicate the same contents or indicate offset signals.

本実施例はシーク動作時、現在地点より目標地
点までの距離の差を入力して目標地点までの目
標速度を設定する基準速度発生回路1、目標速
度と実速度との差により速度誤差を出力す
る速度誤差検出回路2、目標速度と実速度と
により減速制御区間突入を検出して減速制御区間
信号を出力する減速制御区間検出回路3、判定
回路5からの出力によりオフセツト信号(目標
速度特性を微少に上下移動させ、見掛け上の特
性を変位させる信号)を基準速度発生回路1に出
力し減速制御区間信号によりオフセツト信号
出力を解除するオフセツト発生回路4、目標地点
までの距離の差が所定値より大きい場合オフセ
ツト発生回路4に信号を出力する判定回路5、速
度誤差値を増幅して速度誤差値に応じた駆動
電流をVCM7に流すパワーアンプ6、駆動電流
に応じて記録/再生ヘツド(図示してない)を目
標位置に移動させるVCM7から構成されている。
In this embodiment, during a seek operation, a reference speed generation circuit 1 inputs the difference in distance from the current point to the target point to set the target speed to the target point, and outputs a speed error based on the difference between the target speed and the actual speed. The speed error detection circuit 2 detects entry into the deceleration control period based on the target speed and actual speed and outputs the deceleration control period signal. An offset generation circuit 4 outputs a signal that slightly moves up and down and displaces the apparent characteristics to the reference speed generation circuit 1, and cancels the output of the offset signal according to the deceleration control section signal, and the difference in distance to the target point is set to a predetermined value. If it is larger, a determination circuit 5 outputs a signal to the offset generation circuit 4, a power amplifier 6 amplifies the speed error value and sends a drive current corresponding to the speed error value to the VCM 7, and a recording/reproduction head (Fig. (not shown) to the target position.

次に本実施例の動作を説明する。尚加速制御区
間中に基準速度発生回路1から出力される目標速
度は参考速度であり、加速制御は図示してない
他回路で制御される。
Next, the operation of this embodiment will be explained. Note that the target speed output from the reference speed generation circuit 1 during the acceleration control section is a reference speed, and the acceleration control is controlled by another circuit not shown.

上位装置(図示してない)から目標位置までの
距離の差が与えられシーク動作を開始し、加速
制御となる。この時点で、目標位置までの距離の
差が所定距離より大きいかどうかの判定を判定
回路5が行い所定距離より大きい場合は出力信号
をオフセツト発生回路4に出力する。オフセツト
発生回路4は判定回路5からの信号が入力したこ
とにより動作を開始し、オフセツト信号を基準
速度発生回路1に出力する。オフセツト信号は
基準速度発生回路1が出力する目標速度を見掛
け上目標位置までの距離の差が所定値より小さ
いように目標速度カーブを変位制御する信号で
ある。尚第2図Bの点線で示す部分がオフセツト
信号による制御を受けない目標速度カーブを
示す。
A seek operation is started based on the difference in distance from the host device (not shown) to the target position, resulting in acceleration control. At this point, the determination circuit 5 determines whether the difference in distance to the target position is greater than a predetermined distance, and if it is greater than the predetermined distance, outputs an output signal to the offset generation circuit 4. The offset generation circuit 4 starts operating upon receiving the signal from the determination circuit 5, and outputs an offset signal to the reference speed generation circuit 1. The offset signal is a signal for controlling the displacement of the target speed curve so that the difference in distance between the target speed output from the reference speed generating circuit 1 and the apparent target position is smaller than a predetermined value. Note that the portion indicated by the dotted line in FIG. 2B shows the target speed curve that is not controlled by the offset signal.

減速制御区間に突入すると減速区間検出回路3
からオフセツト発生回路4に信号が出力し、オフ
セツト信号の出力を解除させ、オフセツト信号
により制御を受けた目標速度と実速度とに
より得られた速度誤差にてVCM7に流す電流
を制御して正確にしかも迅速に目標地点へ記録/
再生ヘツド(図示してない)の位置決めを行う。
When entering the deceleration control section, the deceleration section detection circuit 3
A signal is output to the offset generation circuit 4, which cancels the output of the offset signal, and controls the current flowing through the VCM 7 accurately using the speed error obtained between the target speed controlled by the offset signal and the actual speed. And quickly record to the target point/
Position the playback head (not shown).

(g) 発明の効果 以上のような本発明によれば、目標までの距離
の差が所定値以上の場合もボイスコイルモータに
流す電流を常に飽和電流以下に制御し、安定した
シーク動作が可能な磁気デイスク装置を提供出来
ると言う効果がある。
(g) Effects of the Invention According to the present invention as described above, even if the difference in distance to the target is greater than a predetermined value, the current flowing through the voice coil motor is always controlled to be below the saturation current, and stable seek operation is possible. This has the advantage that it is possible to provide a magnetic disk device with a high level of performance.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はシーク動作の従来の制御方法、第2図
は本発明に係るシーク動作の制御方法をそれぞれ
示す。 図において、1は基準速度発生回路、2は速度
誤差検出回路、3は減速制御区間検出回路、4は
オフセツト発生回路、5は判定回路、6はパワー
アンプ、7はVCMをそれぞれ示す。
FIG. 1 shows a conventional method for controlling a seek operation, and FIG. 2 shows a method for controlling a seek operation according to the present invention. In the figure, 1 is a reference speed generation circuit, 2 is a speed error detection circuit, 3 is a deceleration control section detection circuit, 4 is an offset generation circuit, 5 is a determination circuit, 6 is a power amplifier, and 7 is a VCM.

Claims (1)

【特許請求の範囲】[Claims] 1 記録/再生ヘツドの目標位置への位置付け動
作であるシーク動作を加速制御する区間と減速制
御する区間とで分割制御し、前記減速制御区間の
基準速度を発生する基準速度発生回路と、前記基
準速度と実速度を比較し速度誤差信号を発生する
速度誤差検出回路とを備えてなる磁気デイスク装
置であつて、前記加速制御区間の始まりと同時に
動作を開始して所定信号を出力し、前記減速制御
区間の始まりと同時に前記所定信号の出力を解除
する手段を設け、前記手段の出力を前記基準速度
発生回路に付加し、前記基準速度を変位させるこ
とを特徴とする磁気デイスク装置。
1. A reference speed generation circuit that divides and controls a seek operation, which is an operation for positioning a recording/playback head to a target position, into an acceleration control section and a deceleration control section, and generates a reference speed for the deceleration control section; A magnetic disk device comprising a speed error detection circuit that compares speed and actual speed and generates a speed error signal, which starts operation at the same time as the start of the acceleration control section and outputs a predetermined signal to detect the deceleration. A magnetic disk device characterized in that means is provided for canceling the output of the predetermined signal at the same time as the start of a control section, and the output of the means is added to the reference speed generation circuit to displace the reference speed.
JP22568783A 1983-11-30 1983-11-30 JIKIDEISUKUSOCHI Expired - Lifetime JPH0245261B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22568783A JPH0245261B2 (en) 1983-11-30 1983-11-30 JIKIDEISUKUSOCHI

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22568783A JPH0245261B2 (en) 1983-11-30 1983-11-30 JIKIDEISUKUSOCHI

Publications (2)

Publication Number Publication Date
JPS60117459A JPS60117459A (en) 1985-06-24
JPH0245261B2 true JPH0245261B2 (en) 1990-10-08

Family

ID=16833214

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22568783A Expired - Lifetime JPH0245261B2 (en) 1983-11-30 1983-11-30 JIKIDEISUKUSOCHI

Country Status (1)

Country Link
JP (1) JPH0245261B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6088188A (en) * 1997-02-10 2000-07-11 International Business Machines Corporation System and method for determining when hard disk drive power amplifier is saturated
US10109308B1 (en) * 2018-03-22 2018-10-23 Western Digital Technologies, Inc. Data storage device using programmable deglitch window to detect saturation of VCM current control

Also Published As

Publication number Publication date
JPS60117459A (en) 1985-06-24

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