JPH0250197B2 - - Google Patents
Info
- Publication number
- JPH0250197B2 JPH0250197B2 JP179283A JP179283A JPH0250197B2 JP H0250197 B2 JPH0250197 B2 JP H0250197B2 JP 179283 A JP179283 A JP 179283A JP 179283 A JP179283 A JP 179283A JP H0250197 B2 JPH0250197 B2 JP H0250197B2
- Authority
- JP
- Japan
- Prior art keywords
- flat plate
- electrode
- etching
- upper electrode
- plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000001020 plasma etching Methods 0.000 claims description 16
- 239000011148 porous material Substances 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 7
- 239000000919 ceramic Substances 0.000 claims description 4
- 238000005530 etching Methods 0.000 description 19
- 229910052581 Si3N4 Inorganic materials 0.000 description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 239000007789 gas Substances 0.000 description 6
- 238000010849 ion bombardment Methods 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- -1 for example Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000003292 diminished effect Effects 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000013077 target material Substances 0.000 description 1
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32623—Mechanical discharge control means
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- ing And Chemical Polishing (AREA)
- Drying Of Semiconductors (AREA)
Description
【発明の詳細な説明】
本発明は、改良されたプラズマエツチング方法
及びその装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improved plasma etching method and apparatus.
近年、半導体素子の製造に際し、ガスプラズマ
エツチングを利用することが一般的に行われるよ
うになつてきた。このガスプラズマエツチングを
行うための電極構造としては、これまで円筒同軸
型、円筒誘導方式型、平行平板型などが知られて
いるが、この中で平行平板型電極は、他の形式の
電極に比べ、サイドエツチングが少なく超微細パ
ターンに忠実な精度の高いエツチングが得られる
という長所があるため、特に注目されている。 In recent years, gas plasma etching has become commonly used in the manufacture of semiconductor devices. The electrode structures used to perform this gas plasma etching include the cylindrical coaxial type, the cylindrical induction type, and the parallel plate type. Among these, the parallel plate type electrode is different from other types of electrodes. In comparison, this method is attracting particular attention because it has the advantage of producing highly accurate etching that is faithful to ultra-fine patterns with less side etching.
しかし、この平行平板型電極は、(1)エツチング
速度が遅く、生産性が低い、(2)レジストマスクや
被処理試料がプラズマイオンの衝撃により損傷さ
れやすいため、処理電力の出力を低くおさえなけ
ればならない、(3)エツチング処理後にプラズマイ
オンによる損傷を回復するためを後処理を必要と
する、(4)半導体素子の絶縁ゲート膜や保護膜とし
て重要な窒化ケイ素(Si3N)膜をエツチングす
る場合、そのマスクとして用いられているホトレ
ジストの膜べりが大きく、さらにその下地として
多く用いられている二酸化ケイ素(SiO2)膜に
対する選択性が低い等の実用上の問題点を有す
る。 However, with this parallel plate type electrode, the processing power output must be kept low because (1) the etching speed is slow and productivity is low, and (2) the resist mask and sample to be processed are easily damaged by plasma ion bombardment. (3) Requires post-treatment to recover from damage caused by plasma ions after etching; (4) Etching silicon nitride (Si 3 N) films, which are important as insulating gate films and protective films for semiconductor devices. In this case, there are practical problems such as the photoresist used as the mask has a large film loss and also has low selectivity with respect to the silicon dioxide (SiO 2 ) film that is often used as the underlayer.
これらの問題点を解決するものとして、平行平
板電極の中間に多孔板より成る電極板を一方の電
極と接続させて挿入し中間電極として作用させる
装置が開発された(特開昭56−76242号公報)。こ
の装置は、プラズマ放電棒で生じる活性種を均一
かつ高密度とし、均一性の高い精密なエツチング
を可能にするとともに、試料をプラズマイオンの
衝撃から保護し、しかもエツチング速度を従来の
5〜10倍に向上させ得る利点を有するが、この中
間電極を用いる装置には、次のような問題点が生
ずることが明らかになつた。すなわち、中間電極
としてアルミニウム多孔板を用いた場合、アルミ
ニウムがスパツターされて被エツチング材料を汚
染し、その電気特性を悪くするという新たな問題
が発生することがわかつた。 In order to solve these problems, a device was developed in which an electrode plate made of a porous plate was inserted between parallel plate electrodes and connected to one electrode to function as an intermediate electrode (Japanese Patent Laid-Open No. 56-76242). Public bulletin). This device makes the active species generated by the plasma discharge rod uniform and high-density, enables highly uniform and precise etching, protects the sample from plasma ion bombardment, and increases the etching rate from 5 to 10 times faster than the conventional etching rate. Although it has the advantage of doubling the improvement, it has become clear that the following problems occur in a device using this intermediate electrode. That is, it has been found that when an aluminum porous plate is used as an intermediate electrode, a new problem arises in that aluminum is sputtered and contaminates the material to be etched, degrading its electrical properties.
本発明者らは、このような実情に鑑み、従来の
平行平板電極型を用いるプラズマエツチング方法
の欠点を克服し、窒化ケイ素とホトレジスト膜及
び二酸化ケイ素膜に対する選択性を高め、かつ被
エツチング材料を汚染することを防止する平行平
板電極型装置によるプラズマエツチング方法につ
いて鋭意研究を重ねた結果、電極間に絶縁板を介
在させることによりその目的を達成しうることを
見出し、本発明をなすに至つた。 In view of these circumstances, the present inventors have overcome the shortcomings of the conventional plasma etching method using parallel plate electrodes, improved the selectivity for silicon nitride, photoresist films, and silicon dioxide films, and improved the etching target material. As a result of extensive research into a plasma etching method using a parallel plate electrode type device that prevents contamination, it was discovered that the objective could be achieved by interposing an insulating plate between the electrodes, and the present invention was developed. .
すなわち、本発明は、レジストパターンを有す
る電子部品形成材料をプラズマエツチングするに
当り、下部電極上に、前記被処理物を載置し、こ
れに対向して上部電極を配置し、かつ両電極間に
多数の細孔を有する絶縁性平板を介在させて上部
電極に高周波電圧を印加することを特徴とするプ
ラズマエツチング方法及びその実施に好適な多数
の細孔を有する絶縁性平板を備えた装置を提供す
るものである。 That is, in plasma etching an electronic component forming material having a resist pattern, the present invention places the object to be processed on a lower electrode, arranges an upper electrode opposite to this, and places a gap between the two electrodes. A plasma etching method characterized by applying a high frequency voltage to an upper electrode through an insulating flat plate having a large number of pores, and an apparatus equipped with an insulating flat plate having a large number of pores suitable for carrying out the method. This is what we provide.
次に、添付図面により本発明をさらに具体的に
説明する。 Next, the present invention will be explained in more detail with reference to the accompanying drawings.
第1図は、本発明の装置の構造と要部を説明す
るための断面図であつて、ベル型蓋部1と底板2
から成る密閉容器内に、平板状の上部電極3と下
部電極4が平行に配設され、それらの中間に多孔
を有する絶縁性の平板5が挿入されている。上部
電極3は、その支持柱6をベル型蓋部1の頂部に
設けられた孔7に嵌合、固定することによつて懸
吊され、下部電極4は底板2の中央部に嵌合され
るかあるいは底板2と一体的に構成され、その上
面はレジストパターンを有する電子部品形成材料
被処理物の載置台を兼ねている。そして、上記上
部電極3は支持柱6を介して高周波電源に接続
し、下部電極4はアースされている。 FIG. 1 is a cross-sectional view for explaining the structure and main parts of the device of the present invention, showing a bell-shaped lid 1 and a bottom plate 2.
A flat upper electrode 3 and a lower electrode 4 are arranged in parallel in a sealed container, and an insulating flat plate 5 having a hole is inserted between them. The upper electrode 3 is suspended by fitting and fixing its support column 6 into a hole 7 provided at the top of the bell-shaped lid 1, and the lower electrode 4 is fitted into the center of the bottom plate 2. Alternatively, it is constructed integrally with the bottom plate 2, and its upper surface also serves as a mounting table for an electronic component forming material to be processed having a resist pattern. The upper electrode 3 is connected to a high frequency power source via a support column 6, and the lower electrode 4 is grounded.
上部電極3と下部電極4の中間に配設される多
数の孔を有する絶縁性の平板5は、適当な支持体
8,8′により支持されるが、その支持手段は知
られたどんな方法を用いてもよい。この平板5の
支持位置は、例えば、上下両電極板の距離が50mm
の場合、上部電極3から下方に30mm以上で、かつ
被処理物が栽置される下部電極4から上方10mm以
上の位置であることが好ましく、特に下部電極4
から上方15〜20mmの範囲内に配置することが好適
である。またこの平板5の形状は、通常プラズマ
エツチング装置に適合する形状が好ましく採用さ
れ、例えば第1図のベル型には円板状のものが好
適である。 An insulating flat plate 5 having a large number of holes disposed between the upper electrode 3 and the lower electrode 4 is supported by suitable supports 8, 8', and the supporting means may be any known method. May be used. The supporting position of this flat plate 5 is, for example, a distance of 50 mm between the upper and lower electrode plates.
In this case, the position is preferably 30 mm or more below the upper electrode 3 and 10 mm or more above the lower electrode 4 where the object to be treated is placed, especially the lower electrode 4.
It is preferable to arrange it within a range of 15 to 20 mm above. Further, the shape of the flat plate 5 is preferably a shape that is compatible with a normal plasma etching apparatus, and for example, a disk-like shape is suitable for the bell shape shown in FIG.
しかし、本発明の目的が阻害されない限り、そ
の形状は特に制限されるものではなく、またその
平板5の面の大きさは、本発明の効果が効果的に
達成される限り特に制限はないが、通常下部電極
4及びその上面に置かれる被処理物、すなわち、
レジストパターンを有する電子部品形成材料を十
分カバーするように選択することが好ましい。 However, the shape is not particularly limited as long as the object of the present invention is not hindered, and the size of the surface of the flat plate 5 is not particularly limited as long as the effects of the present invention are effectively achieved. , usually the lower electrode 4 and the object to be processed placed on its upper surface, that is,
It is preferable to select the material so as to sufficiently cover the electronic component forming material having the resist pattern.
本発明の方法及び装置に用いられるこの絶縁性
の多数の細孔を有する平板5は、絶縁性材料でつ
くられ、かつ板全体にわたつて多数の小さな貫通
孔9,…が形成された板状体であつて、板全体に
均一に細孔を分布させたものが好ましい。絶縁性
材料としては、例えばセラミツクス、ガラス等が
用いられるが、特にセラミツクスが好ましい。 The insulating flat plate 5 having a large number of pores used in the method and apparatus of the present invention is made of an insulating material and has a plate-like shape in which a large number of small through holes 9 are formed throughout the plate. It is preferable that the pores are uniformly distributed throughout the plate. As the insulating material, for example, ceramics, glass, etc. are used, and ceramics are particularly preferred.
第2図は、本発明に用いられる平板5の好まし
い1例を示す平面図で、また第3図は平板の他の
例を示す平面図である。第2図においては、円形
の平板5に円板全体にわたつて多数の細孔9,…
が実質的均一に分布形成されているが、第3図に
示すように、目的によつては円板の中央部に比較
的大きな孔9′を形成させドーナツ状とした平板
を有利に用いることもできる。 FIG. 2 is a plan view showing a preferred example of the flat plate 5 used in the present invention, and FIG. 3 is a plan view showing another example of the flat plate. In FIG. 2, a circular flat plate 5 has a large number of pores 9,...
However, as shown in FIG. 3, depending on the purpose, it may be advantageous to use a donut-shaped flat plate with a relatively large hole 9' formed in the center of the disk. You can also do it.
絶縁性の平板に多数形成させる細孔は、正方
形、長方形、円形、三角形など任意の形状とする
ことができるが、平板全体に均一に分布させるこ
とが望ましい。また、この細孔の大きさは、孔径
10mm未満、好ましくは5〜8mmの範囲であつて、
1cm2当たり1〜5個程度の割合に穿設するのが適
当である。 A large number of pores formed in an insulating flat plate can have any shape such as square, rectangular, circular, triangular, etc., but it is desirable that the pores be uniformly distributed over the entire flat plate. In addition, the size of this pore is
less than 10 mm, preferably in the range of 5 to 8 mm,
It is appropriate to make holes at a rate of about 1 to 5 per 1 cm 2 .
このような本発明の装置を用い、プラズマガス
の雰囲気下に上部電極に高周波電圧を印加してプ
ラズマエツチングを行うときは、上部電極と両電
極間に配設された多数の細孔を有する絶縁性の平
板との間でプラズマ放電が行われ、発生した活性
種が絶縁性の平板の細孔を通り抜け、下部電極の
上面に載置された被処理物、例えばウエハーに達
し、効果的にエツチングが行われる。本発明の装
置を用いるときは、被処理物が直接プラズマ放電
領域にさらされず、しかも中間に介在する平板が
絶縁性材料で構成されているので、導電性平板の
場合と異なり、被処理物に達する活性種は適度に
抑制されて減少し、緩和された作用力で被処理物
をエツチングする。このため均一性の高い精密な
エツチングが得られ、さらにレジストや各種被処
理物のプラズマイオンの衝撃による損傷が効果的
に防止できるので、ホトレジストや下地への選択
性が顕著に向上する。このような効果は平板に導
電性材料を用いた場合には被処理物が汚染される
ので実用的でない。また、本発明の装置を用いて
プラズマエツチングを行うときは、処理電力の出
力を高めてエツチング速度をはやめ、しかもプラ
ズマイオンの衝撃による悪影響も抑制できるので
生産性を向上させることができる。 When performing plasma etching by applying a high frequency voltage to the upper electrode in an atmosphere of plasma gas using the apparatus of the present invention, it is necessary to perform plasma etching by applying a high frequency voltage to the upper electrode in an atmosphere of plasma gas. Plasma discharge is generated between the insulating flat plate, and the generated active species pass through the pores of the insulating flat plate and reach the object to be processed, such as a wafer, placed on the top surface of the lower electrode, effectively etching it. will be held. When using the apparatus of the present invention, the object to be treated is not directly exposed to the plasma discharge region, and the flat plate interposed in the middle is made of an insulating material, so unlike the case of a conductive flat plate, the object to be treated is not exposed directly to the plasma discharge region. The reaching active species are moderately suppressed and reduced, and the object to be etched is etched with a relaxed force. As a result, highly uniform and precise etching can be obtained, and furthermore, damage to the resist and various objects to be processed due to plasma ion bombardment can be effectively prevented, so that selectivity to the photoresist and the underlying material is significantly improved. Such an effect is not practical if a conductive material is used for the flat plate because the object to be processed will be contaminated. Furthermore, when plasma etching is performed using the apparatus of the present invention, the processing power output is increased to reduce the etching rate, and the adverse effects of plasma ion bombardment can also be suppressed, thereby improving productivity.
本発明によれば、従来問題があつた窒化ケイ素
膜のドライエツチングも容易に行うことができ、
中間電極を用いることに起因する被処理物の特性
の悪化、その他の不利益が好都合に克服できる。 According to the present invention, dry etching of silicon nitride films, which has been problematic in the past, can be easily performed.
Deterioration of the properties of the processed object and other disadvantages caused by using the intermediate electrode can be advantageously overcome.
本発明の装置を陰極結合型の平行平板型装置と
して用い、上部電極をアースし、被処理物を載置
した下部電極に高周波電圧を印加した場合には、
中間に支持された絶縁性の多数の細孔を有する平
板と下部電極との間でプラズマが発生して作用す
るので、レジストや被処理物は直接プラズマイオ
ンの衝撃を受けて損傷し、下地層の選択性の向上
は望めない。したがつて、本発明の装置において
は上部電極に高周波電圧を印加することが重要で
ある。 When the apparatus of the present invention is used as a cathode-coupled parallel plate apparatus, the upper electrode is grounded, and a high-frequency voltage is applied to the lower electrode on which the object to be processed is placed.
Plasma is generated and acts between the lower electrode and the insulating flat plate with many pores supported in the middle, so the resist and the object to be processed are directly bombarded with plasma ions and are damaged, causing damage to the underlying layer. No improvement in selectivity can be expected. Therefore, in the device of the present invention, it is important to apply a high frequency voltage to the upper electrode.
以上の説明においては、上部及び下部電極を水
平に置いた平行平板電極型について述べたが、本
発明においては特に水平にする必要はなく、垂直
であつても何ら支障はない。 In the above description, a parallel plate electrode type in which the upper and lower electrodes are placed horizontally has been described, but in the present invention, it is not particularly necessary to make them horizontal, and there is no problem even if they are placed vertically.
次に、実施例により本発明をさらに詳細に説明
する。 Next, the present invention will be explained in more detail with reference to Examples.
実施例
直径140mmの上部電極、直径140mmの被処理物載
置台兼用の下部電極を50mm間隔に平行に配置した
枚葉自動処理型プラズマエツチング装置OAPM
−301B(東京応化工業社製)に、直径160mm、厚
さ2mmのセラミツクス板に直径6mmの孔を1.5
個/cm2の割合で均一に形成させた平板を、上部電
極の下方30mmの位置に電極板と平行に配設した。
4インチシリコンウエハー上に1000Åの窒化ケイ
素膜を形成させた被処理物を下部電極面のほぼ中
央に置き、プラズマ用処利ガスとして酸素ガス8
重量%を含む四フツ化炭素ガスを用い、反応室内
の真空度を0.5Torrに保つて、高周波発振器出力
200Wで窒化ケイ素膜を75秒間プラズマエツチン
グした。マスクとしては厚さ1μmのOMR85(商
品名、東京応化工業社製)のレジスト膜を用い、
下地層としては厚さ1000Åの二酸化ケイ素層を用
いたが、レジスト膜の減少はほとんどなく、ウエ
ハー全面にわたつてむらのない均一な高精度エツ
チング処理がなされた。Example: OAPM, a single-wafer automatic plasma etching device in which an upper electrode with a diameter of 140 mm and a lower electrode with a diameter of 140 mm that also serves as a workpiece mounting table are arranged in parallel at 50 mm intervals.
−301B (manufactured by Tokyo Ohka Kogyo Co., Ltd.), a 1.5-inch hole with a diameter of 6 mm is made in a ceramic plate with a diameter of 160 mm and a thickness of 2 mm.
A flat plate uniformly formed at a ratio of 30 mm/cm 2 was placed parallel to the electrode plate at a position 30 mm below the upper electrode.
A 4-inch silicon wafer with a silicon nitride film of 1000 Å to be processed is placed approximately in the center of the lower electrode surface, and oxygen gas 8 8 is used as the plasma treatment gas.
Using carbon tetrafluoride gas that contains
The silicon nitride film was plasma etched at 200W for 75 seconds. As a mask, a resist film of OMR85 (trade name, manufactured by Tokyo Ohka Kogyo Co., Ltd.) with a thickness of 1 μm was used.
Although a silicon dioxide layer with a thickness of 1000 Å was used as the underlayer, there was almost no reduction in the resist film, and high-precision etching was performed evenly and uniformly over the entire wafer surface.
窒化ケイ素膜のエツチング速度は800Å/分、
また下地層である二酸化ケイ素層のエツチング速
度は300Å/分であり、窒化ケイ素膜との選択比
は2.7であつた。 The etching rate of silicon nitride film is 800 Å/min.
The etching rate of the underlying silicon dioxide layer was 300 Å/min, and the selectivity with respect to the silicon nitride film was 2.7.
比較のために、上記装置から多数の細孔を有す
る絶縁性の平板を取り除いて、上記と同一条件で
エツチング処理を行つたところ、エツチング時間
は67秒で十分であつたが、レジスト膜は3000Å減
少した。また、窒化ケイ素膜及びホトレジスト膜
のエツチング速度はそれぞれ900Å/分及び2700
Å/分で、選択比は0.3であり、下地層のエツチ
ング速度は600Å/分で窒化ケイ素との選択比は
1.5であつた。 For comparison, when an insulating flat plate with many pores was removed from the above device and etching was performed under the same conditions as above, the etching time was 67 seconds, but the resist film was only 3000 Å thick. Diminished. In addition, the etching rates of the silicon nitride film and photoresist film were 900 Å/min and 2700 Å/min, respectively.
The etching rate of the underlayer is 600Å/min, and the selectivity with silicon nitride is 0.3.
It was 1.5.
第1図は、本発明装置の要部を示す側方断面
図、第2図は、絶縁性の平板の1例を示す平面
図、第3図は絶縁性の平板の別の例を示す平面図
である。
図中符号1はベル型蓋部、2は底板、3は上部
電極、4は下部電極、5は多数の細孔を有する絶
縁性の平板である。
FIG. 1 is a side sectional view showing the main parts of the device of the present invention, FIG. 2 is a plan view showing one example of an insulating flat plate, and FIG. 3 is a plan view showing another example of an insulating flat plate. It is a diagram. In the figure, numeral 1 is a bell-shaped lid, 2 is a bottom plate, 3 is an upper electrode, 4 is a lower electrode, and 5 is an insulating flat plate having many pores.
Claims (1)
をプラズマエツチング処理するに当り、下部電極
上に、被処理物を載置し、それに対向して上部電
極を配置し、かつ両極間に多数の細孔を有する絶
縁性平板を介在させ上部電極に高周波電圧を印加
することを特徴とするプラズマエツチング方法。 2 高周波電圧を印加する上部電極と、それに対
向して配置され、かつ被処理物が載置される下部
電極を有する平行平板型プラズマエツチング装置
において、上記上部電極と下部電極との間の空間
に多数の細孔を有する絶縁性の平板を配設したこ
とを特徴とするプラズマエツチング装置。 3 絶縁性平板がセラミツクス板である特許請求
の範囲第2項記載の装置。[Claims] 1. When performing plasma etching on an electronic component forming material having a resist pattern, an object to be processed is placed on a lower electrode, an upper electrode is placed opposite it, and an object is placed between the two electrodes. A plasma etching method characterized by applying a high frequency voltage to an upper electrode through an insulating flat plate having a large number of pores. 2. In a parallel plate plasma etching apparatus having an upper electrode for applying a high-frequency voltage and a lower electrode disposed opposite to the upper electrode and on which the object to be processed is placed, a space between the upper electrode and the lower electrode is A plasma etching apparatus characterized by having an insulating flat plate having a large number of pores. 3. The device according to claim 2, wherein the insulating flat plate is a ceramic plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP179283A JPS59126778A (en) | 1983-01-11 | 1983-01-11 | Method and device for plasma etching |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP179283A JPS59126778A (en) | 1983-01-11 | 1983-01-11 | Method and device for plasma etching |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59126778A JPS59126778A (en) | 1984-07-21 |
| JPH0250197B2 true JPH0250197B2 (en) | 1990-11-01 |
Family
ID=11511424
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP179283A Granted JPS59126778A (en) | 1983-01-11 | 1983-01-11 | Method and device for plasma etching |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59126778A (en) |
Families Citing this family (98)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63164433A (en) * | 1986-12-26 | 1988-07-07 | Matsushita Electric Ind Co Ltd | Dry etching system |
| DE3708717A1 (en) * | 1987-03-18 | 1988-09-29 | Hans Prof Dr Rer Nat Oechsner | METHOD AND DEVICE FOR PROCESSING SOLID BODY SURFACES BY PARTICLE Bombardment |
| US7459098B2 (en) * | 2002-08-28 | 2008-12-02 | Kyocera Corporation | Dry etching apparatus, dry etching method, and plate and tray used therein |
| US9324576B2 (en) | 2010-05-27 | 2016-04-26 | Applied Materials, Inc. | Selective etch for silicon films |
| US10283321B2 (en) | 2011-01-18 | 2019-05-07 | Applied Materials, Inc. | Semiconductor processing system and methods using capacitively coupled plasma |
| US9064815B2 (en) | 2011-03-14 | 2015-06-23 | Applied Materials, Inc. | Methods for etch of metal and metal-oxide films |
| US8999856B2 (en) * | 2011-03-14 | 2015-04-07 | Applied Materials, Inc. | Methods for etch of sin films |
| US9267739B2 (en) | 2012-07-18 | 2016-02-23 | Applied Materials, Inc. | Pedestal with multi-zone temperature control and multiple purge capabilities |
| US9373517B2 (en) | 2012-08-02 | 2016-06-21 | Applied Materials, Inc. | Semiconductor processing with DC assisted RF power for improved control |
| US9132436B2 (en) | 2012-09-21 | 2015-09-15 | Applied Materials, Inc. | Chemical control features in wafer process equipment |
| US10256079B2 (en) | 2013-02-08 | 2019-04-09 | Applied Materials, Inc. | Semiconductor processing systems having multiple plasma configurations |
| US9362130B2 (en) | 2013-03-01 | 2016-06-07 | Applied Materials, Inc. | Enhanced etching processes using remote plasma sources |
| US20140271097A1 (en) | 2013-03-15 | 2014-09-18 | Applied Materials, Inc. | Processing systems and methods for halide scavenging |
| US9773648B2 (en) | 2013-08-30 | 2017-09-26 | Applied Materials, Inc. | Dual discharge modes operation for remote plasma |
| US9576809B2 (en) | 2013-11-04 | 2017-02-21 | Applied Materials, Inc. | Etch suppression with germanium |
| US9520303B2 (en) | 2013-11-12 | 2016-12-13 | Applied Materials, Inc. | Aluminum selective etch |
| US9299537B2 (en) | 2014-03-20 | 2016-03-29 | Applied Materials, Inc. | Radial waveguide systems and methods for post-match control of microwaves |
| US9903020B2 (en) | 2014-03-31 | 2018-02-27 | Applied Materials, Inc. | Generation of compact alumina passivation layers on aluminum plasma equipment components |
| US9309598B2 (en) | 2014-05-28 | 2016-04-12 | Applied Materials, Inc. | Oxide and metal removal |
| US9496167B2 (en) | 2014-07-31 | 2016-11-15 | Applied Materials, Inc. | Integrated bit-line airgap formation and gate stack post clean |
| US9659753B2 (en) | 2014-08-07 | 2017-05-23 | Applied Materials, Inc. | Grooved insulator to reduce leakage current |
| US9613822B2 (en) | 2014-09-25 | 2017-04-04 | Applied Materials, Inc. | Oxide etch selectivity enhancement |
| US9355922B2 (en) | 2014-10-14 | 2016-05-31 | Applied Materials, Inc. | Systems and methods for internal surface conditioning in plasma processing equipment |
| US9966240B2 (en) | 2014-10-14 | 2018-05-08 | Applied Materials, Inc. | Systems and methods for internal surface conditioning assessment in plasma processing equipment |
| US11637002B2 (en) | 2014-11-26 | 2023-04-25 | Applied Materials, Inc. | Methods and systems to enhance process uniformity |
| US10573496B2 (en) | 2014-12-09 | 2020-02-25 | Applied Materials, Inc. | Direct outlet toroidal plasma source |
| US10224210B2 (en) | 2014-12-09 | 2019-03-05 | Applied Materials, Inc. | Plasma processing system with direct outlet toroidal plasma source |
| US11257693B2 (en) | 2015-01-09 | 2022-02-22 | Applied Materials, Inc. | Methods and systems to improve pedestal temperature control |
| US9728437B2 (en) | 2015-02-03 | 2017-08-08 | Applied Materials, Inc. | High temperature chuck for plasma processing systems |
| US20160225652A1 (en) | 2015-02-03 | 2016-08-04 | Applied Materials, Inc. | Low temperature chuck for plasma processing systems |
| US9881805B2 (en) | 2015-03-02 | 2018-01-30 | Applied Materials, Inc. | Silicon selective removal |
| US9691645B2 (en) | 2015-08-06 | 2017-06-27 | Applied Materials, Inc. | Bolted wafer chuck thermal management systems and methods for wafer processing systems |
| US9741593B2 (en) | 2015-08-06 | 2017-08-22 | Applied Materials, Inc. | Thermal management systems and methods for wafer processing systems |
| US9349605B1 (en) | 2015-08-07 | 2016-05-24 | Applied Materials, Inc. | Oxide etch selectivity systems and methods |
| US10504700B2 (en) | 2015-08-27 | 2019-12-10 | Applied Materials, Inc. | Plasma etching systems and methods with secondary plasma injection |
| US10522371B2 (en) | 2016-05-19 | 2019-12-31 | Applied Materials, Inc. | Systems and methods for improved semiconductor etching and component protection |
| US10504754B2 (en) | 2016-05-19 | 2019-12-10 | Applied Materials, Inc. | Systems and methods for improved semiconductor etching and component protection |
| US9865484B1 (en) | 2016-06-29 | 2018-01-09 | Applied Materials, Inc. | Selective etch using material modification and RF pulsing |
| US10062575B2 (en) | 2016-09-09 | 2018-08-28 | Applied Materials, Inc. | Poly directional etch by oxidation |
| US10629473B2 (en) | 2016-09-09 | 2020-04-21 | Applied Materials, Inc. | Footing removal for nitride spacer |
| US9721789B1 (en) | 2016-10-04 | 2017-08-01 | Applied Materials, Inc. | Saving ion-damaged spacers |
| US9934942B1 (en) | 2016-10-04 | 2018-04-03 | Applied Materials, Inc. | Chamber with flow-through source |
| US10546729B2 (en) | 2016-10-04 | 2020-01-28 | Applied Materials, Inc. | Dual-channel showerhead with improved profile |
| US10062585B2 (en) | 2016-10-04 | 2018-08-28 | Applied Materials, Inc. | Oxygen compatible plasma source |
| US10062579B2 (en) | 2016-10-07 | 2018-08-28 | Applied Materials, Inc. | Selective SiN lateral recess |
| US9947549B1 (en) | 2016-10-10 | 2018-04-17 | Applied Materials, Inc. | Cobalt-containing material removal |
| US10163696B2 (en) | 2016-11-11 | 2018-12-25 | Applied Materials, Inc. | Selective cobalt removal for bottom up gapfill |
| US9768034B1 (en) | 2016-11-11 | 2017-09-19 | Applied Materials, Inc. | Removal methods for high aspect ratio structures |
| US10242908B2 (en) | 2016-11-14 | 2019-03-26 | Applied Materials, Inc. | Airgap formation with damage-free copper |
| US10026621B2 (en) | 2016-11-14 | 2018-07-17 | Applied Materials, Inc. | SiN spacer profile patterning |
| US10566206B2 (en) | 2016-12-27 | 2020-02-18 | Applied Materials, Inc. | Systems and methods for anisotropic material breakthrough |
| US10431429B2 (en) | 2017-02-03 | 2019-10-01 | Applied Materials, Inc. | Systems and methods for radial and azimuthal control of plasma uniformity |
| US10403507B2 (en) | 2017-02-03 | 2019-09-03 | Applied Materials, Inc. | Shaped etch profile with oxidation |
| US10043684B1 (en) | 2017-02-06 | 2018-08-07 | Applied Materials, Inc. | Self-limiting atomic thermal etching systems and methods |
| US10319739B2 (en) | 2017-02-08 | 2019-06-11 | Applied Materials, Inc. | Accommodating imperfectly aligned memory holes |
| US10943834B2 (en) | 2017-03-13 | 2021-03-09 | Applied Materials, Inc. | Replacement contact process |
| US10319649B2 (en) | 2017-04-11 | 2019-06-11 | Applied Materials, Inc. | Optical emission spectroscopy (OES) for remote plasma monitoring |
| US11276590B2 (en) | 2017-05-17 | 2022-03-15 | Applied Materials, Inc. | Multi-zone semiconductor substrate supports |
| JP7176860B6 (en) | 2017-05-17 | 2022-12-16 | アプライド マテリアルズ インコーポレイテッド | Semiconductor processing chamber to improve precursor flow |
| US11276559B2 (en) | 2017-05-17 | 2022-03-15 | Applied Materials, Inc. | Semiconductor processing chamber for multiple precursor flow |
| US10497579B2 (en) | 2017-05-31 | 2019-12-03 | Applied Materials, Inc. | Water-free etching methods |
| US10049891B1 (en) | 2017-05-31 | 2018-08-14 | Applied Materials, Inc. | Selective in situ cobalt residue removal |
| US10920320B2 (en) | 2017-06-16 | 2021-02-16 | Applied Materials, Inc. | Plasma health determination in semiconductor substrate processing reactors |
| US10541246B2 (en) | 2017-06-26 | 2020-01-21 | Applied Materials, Inc. | 3D flash memory cells which discourage cross-cell electrical tunneling |
| US10727080B2 (en) | 2017-07-07 | 2020-07-28 | Applied Materials, Inc. | Tantalum-containing material removal |
| US10541184B2 (en) | 2017-07-11 | 2020-01-21 | Applied Materials, Inc. | Optical emission spectroscopic techniques for monitoring etching |
| US10354889B2 (en) | 2017-07-17 | 2019-07-16 | Applied Materials, Inc. | Non-halogen etching of silicon-containing materials |
| US10170336B1 (en) | 2017-08-04 | 2019-01-01 | Applied Materials, Inc. | Methods for anisotropic control of selective silicon removal |
| US10043674B1 (en) | 2017-08-04 | 2018-08-07 | Applied Materials, Inc. | Germanium etching systems and methods |
| US10297458B2 (en) | 2017-08-07 | 2019-05-21 | Applied Materials, Inc. | Process window widening using coated parts in plasma etch processes |
| US10283324B1 (en) | 2017-10-24 | 2019-05-07 | Applied Materials, Inc. | Oxygen treatment for nitride etching |
| US10128086B1 (en) | 2017-10-24 | 2018-11-13 | Applied Materials, Inc. | Silicon pretreatment for nitride removal |
| US10256112B1 (en) | 2017-12-08 | 2019-04-09 | Applied Materials, Inc. | Selective tungsten removal |
| US10903054B2 (en) | 2017-12-19 | 2021-01-26 | Applied Materials, Inc. | Multi-zone gas distribution systems and methods |
| US11328909B2 (en) | 2017-12-22 | 2022-05-10 | Applied Materials, Inc. | Chamber conditioning and removal processes |
| US10854426B2 (en) | 2018-01-08 | 2020-12-01 | Applied Materials, Inc. | Metal recess for semiconductor structures |
| US10679870B2 (en) | 2018-02-15 | 2020-06-09 | Applied Materials, Inc. | Semiconductor processing chamber multistage mixing apparatus |
| US10964512B2 (en) | 2018-02-15 | 2021-03-30 | Applied Materials, Inc. | Semiconductor processing chamber multistage mixing apparatus and methods |
| TWI766433B (en) | 2018-02-28 | 2022-06-01 | 美商應用材料股份有限公司 | Systems and methods to form airgaps |
| US10593560B2 (en) | 2018-03-01 | 2020-03-17 | Applied Materials, Inc. | Magnetic induction plasma source for semiconductor processes and equipment |
| US10319600B1 (en) | 2018-03-12 | 2019-06-11 | Applied Materials, Inc. | Thermal silicon etch |
| US10497573B2 (en) | 2018-03-13 | 2019-12-03 | Applied Materials, Inc. | Selective atomic layer etching of semiconductor materials |
| US10573527B2 (en) | 2018-04-06 | 2020-02-25 | Applied Materials, Inc. | Gas-phase selective etching systems and methods |
| US10490406B2 (en) | 2018-04-10 | 2019-11-26 | Appled Materials, Inc. | Systems and methods for material breakthrough |
| US10699879B2 (en) | 2018-04-17 | 2020-06-30 | Applied Materials, Inc. | Two piece electrode assembly with gap for plasma control |
| US10886137B2 (en) | 2018-04-30 | 2021-01-05 | Applied Materials, Inc. | Selective nitride removal |
| US10872778B2 (en) | 2018-07-06 | 2020-12-22 | Applied Materials, Inc. | Systems and methods utilizing solid-phase etchants |
| US10755941B2 (en) | 2018-07-06 | 2020-08-25 | Applied Materials, Inc. | Self-limiting selective etching systems and methods |
| US10672642B2 (en) | 2018-07-24 | 2020-06-02 | Applied Materials, Inc. | Systems and methods for pedestal configuration |
| US11049755B2 (en) | 2018-09-14 | 2021-06-29 | Applied Materials, Inc. | Semiconductor substrate supports with embedded RF shield |
| US10892198B2 (en) | 2018-09-14 | 2021-01-12 | Applied Materials, Inc. | Systems and methods for improved performance in semiconductor processing |
| US11062887B2 (en) | 2018-09-17 | 2021-07-13 | Applied Materials, Inc. | High temperature RF heater pedestals |
| US11417534B2 (en) | 2018-09-21 | 2022-08-16 | Applied Materials, Inc. | Selective material removal |
| US11682560B2 (en) | 2018-10-11 | 2023-06-20 | Applied Materials, Inc. | Systems and methods for hafnium-containing film removal |
| US11121002B2 (en) | 2018-10-24 | 2021-09-14 | Applied Materials, Inc. | Systems and methods for etching metals and metal derivatives |
| US11437242B2 (en) | 2018-11-27 | 2022-09-06 | Applied Materials, Inc. | Selective removal of silicon-containing materials |
| US11721527B2 (en) | 2019-01-07 | 2023-08-08 | Applied Materials, Inc. | Processing chamber mixing systems |
| US10920319B2 (en) | 2019-01-11 | 2021-02-16 | Applied Materials, Inc. | Ceramic showerheads with conductive electrodes |
-
1983
- 1983-01-11 JP JP179283A patent/JPS59126778A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59126778A (en) | 1984-07-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0250197B2 (en) | ||
| JPH0718438A (en) | Electrostatic chuck device | |
| JPS6337193B2 (en) | ||
| JPS6136589B2 (en) | ||
| JPH04279044A (en) | Sample-retention device | |
| JPH05160076A (en) | Dry etching device | |
| JPS6210687B2 (en) | ||
| JP2004319972A (en) | Etching method and etching apparatus | |
| JPS6247130A (en) | Reactive ion etching equipment | |
| JPH0618182B2 (en) | Dry etching equipment | |
| JPS59144133A (en) | Plasma dry processing apparatus | |
| JPH0760815B2 (en) | Dry etching method | |
| JP5094307B2 (en) | Plasma processing equipment | |
| JPH074718B2 (en) | Electrostatic adsorption device | |
| JPH0437125A (en) | Dry etching apparatus | |
| JPS59172236A (en) | Reactive ion etching device | |
| JPH0513290A (en) | Semiconductor wafer | |
| JPH0344028A (en) | Apparatus for plasma etching | |
| JPH01200629A (en) | Dry etching apparatus | |
| JPH0479220A (en) | Dry etching method | |
| JPS596544A (en) | Semiconductor substrate mounting jig for plasma etching | |
| JPS6218727A (en) | Semiconductor processor | |
| JPH033251A (en) | Sample holder | |
| JPH10209126A (en) | Plasma etching equipment | |
| JPH01188672A (en) | Rf sputtering device |