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JPH0252408B2 - - Google Patents
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JPH0252408B2 - - Google Patents

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Publication number
JPH0252408B2
JPH0252408B2 JP23402686A JP23402686A JPH0252408B2 JP H0252408 B2 JPH0252408 B2 JP H0252408B2 JP 23402686 A JP23402686 A JP 23402686A JP 23402686 A JP23402686 A JP 23402686A JP H0252408 B2 JPH0252408 B2 JP H0252408B2
Authority
JP
Japan
Prior art keywords
slit
ceramic
precursor
varistor
molded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP23402686A
Other languages
Japanese (ja)
Other versions
JPS6387706A (en
Inventor
Kyoshi Matsuda
Yohachi Yamashita
Takeshi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Marcon Electronics Co Ltd
Original Assignee
Marcon Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marcon Electronics Co Ltd filed Critical Marcon Electronics Co Ltd
Priority to JP23402686A priority Critical patent/JPS6387706A/en
Publication of JPS6387706A publication Critical patent/JPS6387706A/en
Publication of JPH0252408B2 publication Critical patent/JPH0252408B2/ja
Granted legal-status Critical Current

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  • Laminated Bodies (AREA)
  • Thermistors And Varistors (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

[発明の目的] (産業上の利用分野) 本発明は内部電極形成手段を改良した積層セラ
ミツクバリタスの製造方法に関する。 (従来の技術) 一般にセラミツクバリスタのサージ耐量は、同
一組成からなる場合は有効面積(相対向する電極
面積)にほぼ比例する。したがつてバリスタ素体
の形状を大型化せずサージ耐量の大きな特性を得
るものとして積層セラミツクバリスタが種々提案
されている。 積層セラミツクバリスタにおける初期技術は特
開昭51−18849号公報に開示されているように、
あらかじめ焼結を完了した板状焼結体の表裏両面
に一対の電極を形成し該電極と連続して側面の一
部に引出部を形成したバリスタ素子を並列接続な
るよう積層し、接触電極間を接着剤を介して接続
したもので、電極引出部以外の電極部が外部に露
出したものであるため、それらの保護を目的とし
て外装用樹脂でコーテイングしている。しかしな
がら上記構成によるものは積層化作業に多くの手
間を要すると同時に外部環境よる保護する点に困
難性を有することはもとより焼結体自体の厚さを
0.3mm以下にすることが困難であるためバリスタ
電圧に限度があり用途もおのずと制限されてしま
う欠点を有していた。そのためこれらの欠点をな
くすものとして特開昭54−106894号公報に開示さ
れたものがある。該技術はドクターブレード法で
成形した生シートに内部電極を印刷し、これを積
み重ね圧着し焼結するもので内部電極の外部への
取り出し部分以外は焼結体で囲まれているように
したものであり、上記欠点を解消できる点で有効
である。しかしながら酸化亜鉛を主成分とするバ
リスタの場合1)1100℃以上の温度で焼結する必
要があるため内部電極材料 金,白金,パラジウ
ムを主成分とする必要から、電極材料が高価とな
りコストアツプを引き起こす。2)焼結温度が
110℃以上であるためバリスタ組成に酸化ビスマ
ス,酸化プラセオジウムを含むものは特にパラジ
ウムを主成分とする内部電極と反応し電極を侵食
する結果電極厚みが確保できなかつたり、面積が
確保できない問題が生ずる。3)したがつてこの
構造を持つたバリスタ組成としては酸化ビスマス
または酸化プラセオジウムを全く含まないか0.05
モル%以下の極微量である必要があるがそれでは
現在実用に供されているバリスタと比較し非直線
性,耐サージ,負荷寿命,耐環境性などの特性が
極度に劣り、市場が要求するレベルの特性を得る
ことは困難である。4)素体部と内部電極を110
℃以上の高温で同時焼成するため、内部電極の構
成原素がバリスタ焼結体に拡散する拡散量をコン
トロールする必要があり、組成設計が困難であ
る。5)内部電極金属の線膨張係数はバリスタ焼
結体より一桁大きいため使用中高温下にさらされ
た場合、電極金属の膨張により内部電極マージン
部に応力が集中しクラツクが発生する危険性を有
するなど多くの解決すべき問題を有していた。 しかして、以上のような状況の中で前記1)の
欠点すなわち内部電極材料として高価な貴金属の
使用によるコストアツプ要因を除去する目的で特
開昭56−1501号公報技術が開示されている。該公
報に開示された技術は表面に焼成によつて焼失す
るかまたは溶剤によつて溶失する材料からなるペ
ースト状物質を印刷したセラミツクバリスタ未焼
成成形体を積み重ね加圧した後熱処理または溶剤
処理により前記ペースト状物質を除去した後焼結
し、層状に形成した空隙部に導電塗料を充填して
電極を形成する積層セラミツクバリスタの製造方
法である。しかしながらこのような技術には 内部電極から電極を引出す外部電極も導電塗
料を使用しなければならず電気的抵抗が高いた
めサージ電流が流れた場合発熱し、導電塗料が
セラミツクより剥離する。 導電塗料の抵抗値が高いため、制限電圧特性
が非常に悪い。 内部電極に導電塗料を使用するため長期間高
温状態で使用した時塗料に含まれる有機物が炭
化し、バリスタ材料薄層とのコンタクトが保持
できなくなり、コンタクト面で放電が生じ、炭
化した有機物が変質しバリスタ材料を部分的に
還元し、漏れ電流が大きくなりバリスタ材料が
自己発熱し、最後には熱暴走し、破壊に到るな
ど多くの欠点を有し信頼性に欠けるものであつ
た。 (発明が解決しようとする問題点) 以上のように従来開示されている技術では、
種々の欠点を有し実用に供し得るものではなかつ
た。本発明は上記の点に鑑みてなされたもので作
業性容易にしてコストダウンに貢献できることは
もとよりすぐれた特性を発揮できる積層セラミツ
クバリスタの製造方法を提供することを目的とす
るものである。 [発明の構成] (問題点を解決するための手段) 本発明の積層セラミツクバリスタの製造方法
は、表面にバリスタ組成と同一組成からなる焼成
粒子,カーボン粒子,熱可塑性樹脂および揮発性
分を含むスリツト前駆ペーストを印刷−乾燥しス
リツト前駆膜を複数形成した成形シートを前記ス
リツト前駆膜の一方端が交互に反対側に突出する
ようにして複数積層し加熱圧着し成形シート積層
体を得る手段と、該シート成形体を所定寸法に切
断し前記スリツト前駆膜端部が交互に対向面から
導出した未焼成チツプを得る手段と、該未焼成チ
ツプを徐々に昇温−高温焼結し前記スリツト前駆
膜の揮発成分を除去しこの部分に複数の柱状セラ
ミツク粒子を有するスリツトを形成した焼結体チ
ツプを得る手段と、該焼結体チツプのスリツト導
出面に連続した細孔を有する多孔質外部電極を形
成手段とし、しかる後予備加熱し溶融金属中に浸
漬−減圧−加圧し前記スリツト内に溶融金属を圧
入−除冷し内部電極を形成する手段からなること
を特徴とするものである。 (作用) 以上の構成によれば焼結工程時内部電極が存在
しないためバリスタ組成と内部電極材料の相互反
応はなくなり、どのような組成のものでも積層化
が容易となり積層セラミツクバリスタに適用でき
る組成が拡大される。また、スリツト内に形成さ
れる柱状セラミツク粒子によつて成形シート積層
間が騎合されることになり熱ストレスによる内部
電極マージン部へのクラツク発生が防止される。
さらに内部電極が焼付けでないため内部電極材料
が高価な金,白金,パラジウムなどの貴金属に限
定することなく内部電極材料の使用範囲が大幅に
拡大される。 (実施例) 以下本発明の一実施例につき詳細に説明する。
まず多種類の金属酸化物からなる組成の仮焼粉体
を水を溶媒としてボールミルで粉砕−混合−乾燥
してなる乾燥粉体にエチルセルローズとトルエン
を加えて攪拌−混合し一様な混合物を得る。その
後この混合物の空気を除去しドクターブレード法
でセラミツクグリーンシートを成形し、乾燥し成
形シートを得る。つぎに第2図に示すように該成
形シート1表面に該成形シート1を構成する組成
と同一組成からなりあらかじめ焼結され、所定の
大きさ(5〜100μ)を有する焼成粒子,カーボ
ン粒子,アクリル系の熱可塑性樹脂およびトルエ
ン,アセトンなどの揮発性溶剤により構成された
スリツト前駆ペーストを印刷−乾燥し複数のスリ
ツト前駆膜2を形成する。しかして第3図に示す
ように複数のスリツト前駆膜2を形成した成形シ
ート1を用い、前記スリツト前駆膜2の一方端が
交互に反対側に突出するようにして複数積層し加
熱圧着し成形シート積層体3を得る。なお、この
場合最上面となる面にはスリツト前駆膜を形成し
ない成形シートで構成する。つぎに該成形シート
積層体3を点線に沿つて切断し第4図および第5
図に示すように前記スリツト前駆膜2端部が交互
に対向面に導出した未焼成チツプ4を得る。つぎ
に該未焼成チツプ4を1〜20℃1時間の昇温速度
で300〜650℃まで昇温し、300〜650℃で2〜15時
間保持して前記スリツト前駆膜2を構成するカー
ボン粒子と揮発性溶剤を分解除去し、ついで50〜
200℃1時間の昇温速度で1000〜1400℃まで昇温
し、1000〜1400℃で3.5〜4.5時間焼結しスリツト
前駆膜2部に第6図に示すように成形シート1積
層間を結合した複数のセラミツク柱状粒子5を有
するスリツト6を形成した焼結体チツプ7を得
る。 しかして第1図に示すように該焼結体チツプ7
の前記スリツト6が導出する両端面に連続した細
孔を有する例えば多孔質銀ペーストを塗布−乾燥
した後500〜650℃にて焼付け多孔質外部電極8を
形成し、しかる後Pb,Snの内少なくとも1種の
金属またはPb,Sn内少なくとも1種を主成分と
しAg,Al,Cu,Znの内少なくとも1種含む合金
からなり前記成形シート1を構成する最も低い金
属酸化物の融点以下の融点を有する溶融金属中に
浸漬し、該溶融金属を入れた容器を減圧し、その
後圧力をかけて前記多孔質外部電極8を通し前記
スリツト6内に溶融金属を圧入し、その後徐冷し
前記スリツト6内に前記多孔質外部電極8と、接
続した内部電極9を形成するようにするものであ
る。 以上のように構成してなる積層セラミツクバリ
スタの製造方法によれば、内部電極9が高温下を
ともなう焼結温度にさらされることがないためバ
リスタ組成と内部電極材料の相互反応の要因は解
消され、使用できるバリスタ組成範囲の制限もな
く、どのような組成を用いたものでも所期の特性
を満足できる特性劣化のない積層セラミツクバリ
スタが得られる。またスリツト前駆膜2がバリス
タ組成と同一組成からなるセラミツク粒子を含め
たものからなり、焼結過程で該セラミツク粒子が
セラミツク柱状粒子5となり該セラミツク柱状粒
子5を介し成形シート1積層間が結合した状態に
なつているため、その後の工程中または完成品と
しての使用中加えられる熱ストレスがあつたとし
ても内部電極9マージン部へのクラツク発生の危
険性はなく前述の作用効果と相まつて従来例のも
のと比較して大幅に信頼性が向上する。さらに内
部電極9はあらかじめ焼結体チツプ7を構成する
成形シート1積層間にあらかじめ形成されたスリ
ツト6に多孔質外部電極8の細孔を介し圧入方式
によつて形成するものであり高い温度をともなう
焼結温度にさらされることがないため、高価な
金,白金,パラジウムなどの貴金属に限定される
ことなく、安価な金属の使用が可能となりコスト
ダウンに貢献できる利点を有する。 つぎに本発明によつて得られた実施例と従来技
術によつて得られた参考例との比較の一例につい
て述べる。 実施例 1 組成―本発明、参考例とも酸化亜鉛を主成分
としBi,Pr,La,Sb,Cr,Mg,Co,Mn,Ni
を各々Bi2O3,Pr6O11,La2O3,Sb2O3,Cr2O3
MgO,CoO,MnO,NiO,に換算し下表に示す
4種類の組成比からなるものとした。
[Object of the Invention] (Industrial Application Field) The present invention relates to a method of manufacturing a laminated ceramic baritas with an improved means for forming internal electrodes. (Prior Art) Generally, the surge resistance of a ceramic varistor is approximately proportional to the effective area (area of opposing electrodes) when the ceramic varistors have the same composition. Therefore, various types of laminated ceramic varistors have been proposed to provide a large surge resistance without increasing the size of the varistor body. The initial technology for laminated ceramic varistors was disclosed in Japanese Patent Application Laid-open No. 18849/1984.
A pair of electrodes are formed on both the front and back surfaces of a plate-shaped sintered body that has been sintered in advance, and varistor elements, which are continuous with the electrodes and have a lead-out part formed on a part of the side surface, are stacked so as to be connected in parallel, and between the contact electrodes. are connected via adhesive, and since the electrode parts other than the electrode lead-out part are exposed to the outside, they are coated with an exterior resin to protect them. However, the structure described above requires a lot of effort in the lamination work, and it is difficult to protect it from the external environment, as well as the thickness of the sintered body itself.
Since it is difficult to reduce the thickness to 0.3 mm or less, there is a limit to the varistor voltage, which naturally limits its applications. For this reason, there is a method disclosed in Japanese Patent Laid-Open No. 106894/1983 to eliminate these drawbacks. This technology prints internal electrodes on green sheets formed using the doctor blade method, stacks them up, presses them, and sinters them, so that the parts other than the parts where the internal electrodes are taken out to the outside are surrounded by a sintered body. This is effective in that it can eliminate the above drawbacks. However, in the case of a varistor whose main component is zinc oxide, 1) Since it is necessary to sinter at a temperature of 1100℃ or higher, the internal electrode material must be mainly composed of gold, platinum, and palladium, which makes the electrode material expensive and increases the cost. . 2) Sintering temperature
Because the temperature is above 110℃, varistors containing bismuth oxide and praseodymium oxide react with the internal electrodes, which are mainly made of palladium, and corrode the electrodes, resulting in the problem of not being able to secure the electrode thickness or area. . 3) Therefore, the composition of a varistor with this structure should not contain any bismuth oxide or praseodymium oxide.
It needs to be in an extremely small amount of less than mol%, but this would result in extremely inferior characteristics such as nonlinearity, surge resistance, load life, and environmental resistance compared to varistors currently in practical use, and the level required by the market. It is difficult to obtain the characteristics of 4) The element body and internal electrodes are 110
Since simultaneous firing is performed at a high temperature of ℃ or higher, it is necessary to control the amount of diffusion of the constituent elements of the internal electrodes into the varistor sintered body, making compositional design difficult. 5) The coefficient of linear expansion of the internal electrode metal is one order of magnitude larger than that of the varistor sintered body, so if it is exposed to high temperatures during use, there is a risk of stress concentrating on the internal electrode margin due to expansion of the electrode metal and causing cracks. There were many problems that needed to be solved. Under the above circumstances, the technique disclosed in Japanese Patent Application Laid-open No. 1501/1983 has been disclosed for the purpose of eliminating the drawback 1) above, that is, the cost increase factor due to the use of expensive noble metals as internal electrode materials. The technology disclosed in this publication involves stacking and pressurizing ceramic varistor green bodies on which a paste-like substance made of a material that is burnt out by firing or dissolved by solvent is printed, followed by heat treatment or solvent treatment. This is a method of manufacturing a laminated ceramic varistor, in which the paste material is removed and then sintered, and the voids formed in layers are filled with conductive paint to form electrodes. However, such technology requires the use of conductive paint for the external electrodes that lead out the electrodes from the internal electrodes, which have high electrical resistance and generate heat when a surge current flows, causing the conductive paint to peel off from the ceramic. Due to the high resistance value of the conductive paint, the limiting voltage characteristics are very poor. Because conductive paint is used for the internal electrodes, when used at high temperatures for a long period of time, the organic substances contained in the paint will carbonize, making it impossible to maintain contact with the thin layer of varistor material, causing electrical discharge on the contact surface, and the carbonized organic substances deteriorating. However, the varistor material was partially reduced, the leakage current increased, the varistor material self-heated, and eventually thermal runaway occurred, resulting in destruction, and it lacked reliability. (Problems to be solved by the invention) As described above, in the conventionally disclosed technology,
It had various drawbacks and could not be put to practical use. The present invention has been made in view of the above points, and it is an object of the present invention to provide a method for manufacturing a laminated ceramic varistor that not only facilitates workability and contributes to cost reduction, but also exhibits excellent characteristics. [Structure of the Invention] (Means for Solving the Problems) The method for manufacturing a laminated ceramic varistor of the present invention provides a method for manufacturing a laminated ceramic varistor that includes fired particles having the same composition as the varistor composition, carbon particles, a thermoplastic resin, and a volatile component on the surface. Means for obtaining a formed sheet laminate by printing and drying a slit precursor paste, forming a plurality of slit precursor films, and laminating a plurality of molded sheets in such a way that one end of the slit precursor film alternately protrudes toward the opposite side, and bonding them under heat. , means for cutting the sheet molded body into predetermined dimensions to obtain unfired chips in which the ends of the slit precursor film are alternately led out from the opposing surface; and sintering the unfired chips at a gradually elevated temperature to form the slit precursor. A means for obtaining a sintered chip in which volatile components of a film are removed and a slit having a plurality of columnar ceramic particles is formed in this part, and a porous external electrode having continuous pores on the slit outlet surface of the sintered chip. The method is characterized in that it comprises means for forming internal electrodes by preheating the molten metal, then immersing it in the molten metal, depressurizing it, and pressurizing it, and then pressing the molten metal into the slit and slowly cooling it. (Function) According to the above configuration, since there is no internal electrode during the sintering process, there is no mutual reaction between the varistor composition and the internal electrode material, and any composition can be easily laminated, making it a composition that can be applied to laminated ceramic varistors. is expanded. In addition, the columnar ceramic particles formed within the slits cause the laminated layers of the molded sheets to fit together, thereby preventing cracks in the internal electrode margins due to thermal stress.
Furthermore, since the internal electrodes are not baked, the range of use of internal electrode materials is greatly expanded without being limited to expensive noble metals such as gold, platinum, and palladium. (Example) An example of the present invention will be described in detail below.
First, calcined powder with a composition consisting of various metal oxides is ground in a ball mill using water as a solvent, mixed, and dried. Ethyl cellulose and toluene are added to the dry powder and stirred and mixed to form a uniform mixture. obtain. Thereafter, air is removed from this mixture, and a ceramic green sheet is formed using a doctor blade method, followed by drying to obtain a formed sheet. Next, as shown in FIG. 2, fired particles, carbon particles, which are made of the same composition as that of the molded sheet 1, have been sintered in advance, and have a predetermined size (5 to 100μ) are placed on the surface of the molded sheet 1, as shown in FIG. A plurality of slit precursor films 2 are formed by printing and drying a slit precursor paste composed of an acrylic thermoplastic resin and a volatile solvent such as toluene or acetone. As shown in FIG. 3, using a molded sheet 1 on which a plurality of slit precursor films 2 are formed, a plurality of slit precursor films 2 are laminated in such a way that one end of the slit precursor films 2 alternately protrude toward the opposite side, and then heat-pressed and molded. A sheet laminate 3 is obtained. In this case, a molded sheet is used on which the slit precursor film is not formed on the uppermost surface. Next, the formed sheet laminate 3 is cut along the dotted line, and as shown in FIGS.
As shown in the figure, green chips 4 are obtained in which the ends of the slit precursor films 2 are alternately led out to opposing surfaces. Next, the unfired chips 4 are heated to 300 to 650°C at a heating rate of 1 to 20°C for 1 hour, and held at 300 to 650°C for 2 to 15 hours to form the carbon particles constituting the slit precursor film 2. and volatile solvents are decomposed and removed, and then 50 ~
The temperature was raised to 1000-1400°C at a heating rate of 200°C for 1 hour, and sintered at 1000-1400°C for 3.5-4.5 hours to bond the slit precursor film 2 to the laminated sheet 1 as shown in Figure 6. A sintered chip 7 is obtained in which a slit 6 having a plurality of ceramic columnar particles 5 formed therein is formed. As shown in FIG.
For example, a porous silver paste having continuous pores is coated on both end faces from which the slit 6 leads out, and after drying, the porous external electrode 8 is formed by baking at 500 to 650°C. It is made of at least one metal or an alloy containing at least one of Pb and Sn as a main component and at least one of Ag, Al, Cu, and Zn, and the melting point is lower than the melting point of the lowest metal oxide constituting the molded sheet 1. The container containing the molten metal is immersed in molten metal, the pressure of the container containing the molten metal is reduced, and then pressure is applied to force the molten metal into the slit 6 through the porous external electrode 8, and the molten metal is then slowly cooled to form the slit. The porous external electrode 8 and the connected internal electrode 9 are formed in the internal electrode 6 . According to the method for manufacturing the laminated ceramic varistor configured as described above, the internal electrodes 9 are not exposed to the sintering temperature accompanied by high temperatures, so the factor of mutual reaction between the varistor composition and the internal electrode material is eliminated. There is no restriction on the usable varistor composition range, and a laminated ceramic varistor that can satisfy the desired characteristics without deterioration of characteristics can be obtained no matter what composition is used. Further, the slit precursor film 2 includes ceramic particles having the same composition as the varistor composition, and in the sintering process, the ceramic particles become ceramic columnar particles 5, and the laminated layers of the molded sheet 1 are bonded through the ceramic columnar particles 5. Therefore, even if there is heat stress applied during subsequent processes or during use as a finished product, there is no risk of cracks occurring in the margin portion of the internal electrode 9, and in combination with the above-mentioned effects, the conventional example Reliability is significantly improved compared to that of Furthermore, the internal electrodes 9 are formed by press-fitting through the pores of the porous external electrodes 8 into the slits 6 previously formed between the laminated layers of the molded sheets 1 constituting the sintered chip 7, and are heated to high temperatures. Since it is not exposed to the accompanying sintering temperature, it has the advantage of being able to use inexpensive metals without being limited to expensive noble metals such as gold, platinum, and palladium, which can contribute to cost reduction. Next, an example of comparison between an example obtained by the present invention and a reference example obtained by the prior art will be described. Example 1 Composition - Both the present invention and the reference example have zinc oxide as the main component, Bi, Pr, La, Sb, Cr, Mg, Co, Mn, Ni
respectively Bi 2 O 3 , Pr 6 O 11 , La 2 O 3 , Sb 2 O 3 , Cr 2 O 3 ,
It was calculated as MgO, CoO, MnO, and NiO, and consisted of four composition ratios shown in the table below.

【表】 但し上記表1中ガラスはSiO2,2.O,B2O3 9.
O, ZnO 16.5,PbO 72.5wt%からなり数値は酸
化亜鉛に対する重量%である。 グリーンシート構成―上記表1に示すバリス
タ原料それぞれと水を樹脂製ポツトと部分安定化
ジルコニアボールを用い6時間混合、乾燥後800
℃で2時間仮焼後、再び仮焼原料と水を樹脂製ポ
ツトと部分安定化ジルコニアボールを用いて16時
間粉砕、乾燥し得た粉砕原料100重量部にトリク
ロロエチレン,エチルアルコール,ポリビニルブ
チラール,ポリエチレングリコールを20重量部加
えて樹脂製ポツトと樹脂製ボールを用いて24時間
混合し得たスラリーを脱気しドクターブレード法
により得た四種類のセラミツクグリーンシート。 本発明 A 成形シート……上記構成。 スリツト前駆ペースト…… *26〜37μmのバリスタ組成それぞれからな
る焼成粒子10重量部。 *焼成粒子径より小さいカーボン粒子40重量
部。 *ポリメタアクリル酸メチル樹脂,トルエ
ン,フタル酸オクチル50重量部。 成形シート積層体加圧条件……85℃100g/cm2
1分間。 スリツト形成条件……15℃1時間の昇温速度で
600℃まで昇温後600℃で4時間保持−放冷。 焼結条件……100℃1時間の昇温速度で1150℃
まで昇温後1150℃で4時間保持−放冷。 内部電極材および形成条件……Pb70%,Sn30
%合金の融点より高い280℃に保持した容器に該
合金を溶融。容器を減圧後15気圧かけた。 参考例 B 前述の(従来技術)の項で記した特開昭54−
106894号公報にて開示されたもので、上記表1に
示した構成からなる成形シートを用い、該成形シ
ートにPdペーストを印刷し内部電極形成−積層
−切断し、1150℃にて焼結し両端にAgペースト
を塗布し600℃にて焼付け外部電極を形成。なお、
積層セラミツクバリタスは、実施例および参考例
各試料とも一層当りの厚み200μm、内部電極の対
向部分3mm×5mmで外形寸法5mm×7mmで積層数
は10層である。 しかして上記本発明Aと参考例Bにおける諸特
性を調べた結果表2に示すようになつた。
[Table] However, the glasses in Table 1 above are SiO 2 , 2.O, B 2 O 3 9.
It consists of O, ZnO 16.5, and PbO 72.5 wt %, and the values are weight % relative to zinc oxide. Green sheet composition - Mix each of the barista raw materials shown in Table 1 above and water using a resin pot and partially stabilized zirconia balls for 6 hours, and after drying
After calcining at ℃ for 2 hours, the calcined raw material and water were crushed again for 16 hours using a resin pot and partially stabilized zirconia balls, and 100 parts by weight of the dried crushed raw material was mixed with trichloroethylene, ethyl alcohol, polyvinyl butyral, and polyethylene. Four types of ceramic green sheets were obtained by adding 20 parts by weight of glycol and mixing the slurry for 24 hours using a resin pot and a resin ball, then deaerating it and using the doctor blade method. Present invention A Molded sheet...The above configuration. Slit precursor paste... *10 parts by weight of fired particles each having a varistor composition of 26 to 37 μm. *40 parts by weight of carbon particles smaller than the fired particle diameter. *Polymethyl methacrylate resin, toluene, 50 parts by weight of octyl phthalate. Molded sheet laminate pressurizing conditions...85℃100g/ cm2 ,
1 minute. Slit forming conditions: heating rate of 15°C for 1 hour
After raising the temperature to 600℃, hold at 600℃ for 4 hours - Allow to cool. Sintering conditions: 1150℃ at a heating rate of 100℃ for 1 hour
After raising the temperature to 1150℃, hold it for 4 hours and let it cool. Internal electrode material and forming conditions...Pb70%, Sn30
% The alloy is melted in a container held at 280°C, which is higher than the melting point of the alloy. After depressurizing the container, 15 atm was applied. Reference example B: Japanese Patent Application Laid-Open No. 1983-1983 described in the section (prior art) above
106894, using a molded sheet having the configuration shown in Table 1 above, printing Pd paste on the molded sheet, forming internal electrodes, laminating, cutting, and sintering at 1150°C. Apply Ag paste to both ends and bake at 600℃ to form external electrodes. In addition,
The laminated ceramic baritas has a thickness of 200 μm per layer in both Examples and Reference Examples, a portion facing the internal electrodes of 3 mm x 5 mm, an external dimension of 5 mm x 7 mm, and the number of laminated layers is 10. The results of examining various properties of Invention A and Reference Example B are shown in Table 2.

【表】 上記表2中α(非直線係数)はV10A−V1mAに
おけるものでL.CはV1mA1/2のDC電圧を印加
したときのものである。 表2から明らかなように本発明は参考例と比較
して非直線特性,L.C特性,電圧−電流特性のい
ずれも格段に優れており、この差は参考例Bはバ
リスタ組成に内部電極材が拡散反応しバリスタ組
成本来の組成を変化させるのと、内部電極材料の
侵食によるものに起因しているためである。 なお表2における試料No.は組成を示す表1の試
料No.に対応するもので数値は各試料とも各々50個
の平均値である。 実施例 2 上記(実施例1)の表2に示す試料No.1による
本発明Aと前述の(従来技術)の項で記した特開
昭56−1501号公報に開示された製法によつて得た
参考例BにおけるV1mAの変化率と、85℃雰囲気
中でDC最大許容回路電圧を500時間印加した時の
制限電圧特性V10A/V1mA値を比較した結果第
8図および表3に示すようになつた。 なお参考例Bにおける組成は本発明Aと同一の
ものからなり、焼失材料はポリビニルアルコール
ペーストで電極は導電塗料を用いた。
[Table] In Table 2 above, α (nonlinear coefficient) is the value at V 10 A−V 1 mA, and LC is the value when a DC voltage of V 1 mA1/2 is applied. As is clear from Table 2, the present invention is significantly superior to the reference example in terms of nonlinear characteristics, LC characteristics, and voltage-current characteristics. This is due to a diffusion reaction that changes the original composition of the varistor, and corrosion of the internal electrode material. The sample numbers in Table 2 correspond to the sample numbers in Table 1 showing the composition, and the numerical values are the average values of 50 samples for each sample. Example 2 The present invention A using sample No. 1 shown in Table 2 of the above (Example 1) and the manufacturing method disclosed in Japanese Patent Application Laid-Open No. 1501-1980 described in the section of the above-mentioned (Prior Art) Figures 8 and 8 show the results of comparing the rate of change of V 1 mA in reference example B obtained and the limiting voltage characteristic V 10 A/V 1 mA value when the DC maximum allowable circuit voltage was applied for 500 hours in an 85°C atmosphere. The results are as shown in Table 3. The composition of Reference Example B was the same as that of Invention A, and the burned-out material was polyvinyl alcohol paste, and the electrodes were made of conductive paint.

【表】 第8図および表3から明らかなように参考例B
は制限電圧特性が極度に悪くかつ、信頼性も劣
り、本発明Aの優位性を実証した。 上記実施例ではバリスタ組成として酸化亜鉛を
主成分とするものを例示して説明したが、
SrTiO3またはペロブスカイト型などの他の金属
酸化物を主成分としたものに適用できることは言
うまでもない。 また第7図に示すように焼結体チツプ7のスリ
ツト6内に例えば硝酸銀などの溶液を含浸し多孔
質外部電極8焼付時に前記スリツト6内に塗布膜
10を形成させるようにすれば前記多孔質外部電
極8を通して圧入される溶融金属によつて形成さ
れる内部電極9と成形シート2とのぬれ性が良く
なり効果的である。 [発明の効果] 以上述べたように本発明によればバリスタ組成
に関係なく製作容易にして優れたバリスタ特性が
発揮できる実用的価値の高い積層セラミツクバリ
スタの製造方法を得ることができる。
[Table] As is clear from Figure 8 and Table 3, Reference Example B
The limiting voltage characteristics were extremely poor and the reliability was also poor, demonstrating the superiority of the present invention A. In the above example, the varistor composition was explained using zinc oxide as the main component.
Needless to say, it can be applied to materials mainly composed of SrTiO 3 or other metal oxides such as perovskite type. Further, as shown in FIG. 7, if the slit 6 of the sintered chip 7 is impregnated with a solution such as silver nitrate, a coating film 10 is formed in the slit 6 when the porous external electrode 8 is baked. This is effective because the wettability between the molded sheet 2 and the internal electrode 9 formed by the molten metal press-fitted through the external electrode 8 is improved. [Effects of the Invention] As described above, according to the present invention, it is possible to obtain a method for manufacturing a laminated ceramic varistor of high practical value, which is easy to manufacture and exhibits excellent varistor characteristics regardless of the varistor composition.

【図面の簡単な説明】[Brief explanation of drawings]

第1図〜第6図は本発明の一実施例に係る積層
セラミツクバリスタの製造方法を説明するための
もので第1図はスリツト内に内部電極形成後の積
層セラミツクバリスタを示す断面図、第2図はス
リツト前駆膜を形成した成形シートを示す斜視
図、第3図は成形シートを複数積層し形成した成
形シート積層体を示す断面図、第4図および第5
図は第3図に示す成形シート積層体を切断して得
た未焼成チツプを示すもので第4図は斜視図、第
5図は第4図イ−イ断面図、第6図はスリツトを
形成した焼結体チツプを示す断面図、第7図は本
発明の他の実施例に係る積層セラミツクバリスタ
の製造方法を説明するためのもので内部電極形成
後の積層セラミツクバリスタを示す一部切欠拡大
断面図、第8図は時間−V1mAの変化率特性曲線
図である。 1……成形シート、2……スリツト前駆膜、3
……成形シート積層体、4……未焼成チツプ、5
……セラミツク柱状粒子、6……スリツト、7…
…焼結体チツプ、8……多孔質外部電極、9……
内部電極、10……塗布膜。
1 to 6 are for explaining a method of manufacturing a laminated ceramic varistor according to an embodiment of the present invention. FIG. 2 is a perspective view showing a molded sheet on which a slit precursor film has been formed, FIG. 3 is a sectional view showing a molded sheet laminate formed by laminating a plurality of molded sheets, and FIGS. 4 and 5.
The figure shows an unfired chip obtained by cutting the formed sheet laminate shown in Fig. 3. Fig. 4 is a perspective view, Fig. 5 is a cross-sectional view taken along the line E-A in Fig. 4, and Fig. 6 shows a slit. FIG. 7 is a cross-sectional view showing the formed sintered chip, and FIG. 7 is a partially cutaway view showing the multilayer ceramic varistor after internal electrodes are formed, for explaining a method for manufacturing a multilayer ceramic varistor according to another embodiment of the present invention. The enlarged sectional view, FIG. 8, is a time-V 1 mA rate of change characteristic curve. 1... Molded sheet, 2... Slit precursor film, 3
... Molded sheet laminate, 4 ... Unfired chips, 5
...Ceramic columnar particles, 6...Slits, 7...
... Sintered compact chip, 8 ... Porous external electrode, 9 ...
Internal electrode, 10... coating film.

Claims (1)

【特許請求の範囲】 1 金属酸化物を主成分とし成形したセラミツク
グリーンシートを乾燥し成形シートを得る手段
と、該成形シート上に該シートを構成する組成と
同一組成の焼成粒子とカーボン粒子と熱可塑性樹
脂および揮発性溶剤からなるスリツト前駆ペース
トを印刷−乾燥し複数のスリツト前駆膜を形成す
る手段と、該スリツト前駆膜の一方端が交互に反
対側に突出するよう前記成形シート複数を積層−
加熱圧着し成形シート積層体を得る手段と、該成
形シート積層体を切断し前記スリツト前駆膜端部
が交互に対向面に導出した未焼成チツプを得る手
段と、該未焼成チツプを徐々に昇温しかつ高湿焼
結によつて前記スリツト前駆膜を構成するカーボ
ン粒子および揮発成分を除去しこの部分に複数の
セラミツク柱状粒子を有するスリツトを形成した
焼結体チツプを得る手段と、該焼結体チツプのス
リツト導出面に連続した細孔を有する多孔質外部
電極を形成する手段と、該多孔質外部電極を通し
前記スリツト内に溶融金属を圧入し内部電極を形
成する手段とを具備することを特徴とする積層セ
ラミツクバリスタの製造方法。 2 溶融金属がPb,Snの内少なくとも1種また
はPb,Snの内少なくとも1種を主成分としAg,
Al,Cu,Znの内少なくとも1種含めたものから
なることを特徴とする特許請求の範囲第1項記載
の積層セラミツクバリタスの製造方法。 3 スリツト内に金属溶液を含浸し多孔質外部電
極焼付時スリツト内壁に塗布膜を形成することを
特徴とする特許請求の範囲第1項または第2項記
載の積層セラミツクバリスタの製造方法。
[Scope of Claims] 1. A means for drying a molded ceramic green sheet containing a metal oxide as a main component to obtain a molded sheet, and adding fired particles and carbon particles having the same composition as that constituting the sheet on the molded sheet. means for printing and drying a slit precursor paste made of a thermoplastic resin and a volatile solvent to form a plurality of slit precursor films, and laminating the plurality of molded sheets so that one end of the slit precursor films alternately protrudes to the opposite side. −
a means for obtaining a formed sheet laminate by heat-pressing; a means for cutting the formed sheet laminate to obtain unfired chips in which the ends of the slit precursor film are alternately led out to opposing surfaces; and a means for gradually raising the unfired chips. A means for obtaining a sintered chip in which carbon particles and volatile components constituting the slit precursor film are removed by high temperature and high humidity sintering, and slits having a plurality of ceramic columnar particles are formed in the slit precursor film; The method comprises means for forming a porous external electrode having continuous pores on the slit exit surface of the solid chip, and means for press-fitting molten metal into the slit through the porous external electrode to form an internal electrode. A method of manufacturing a laminated ceramic varistor characterized by the following. 2 The molten metal contains at least one of Pb and Sn, or at least one of Pb and Sn as a main component, and Ag,
2. The method for producing a laminated ceramic baritas according to claim 1, characterized in that the multilayer ceramic baritas contains at least one of Al, Cu, and Zn. 3. A method for manufacturing a laminated ceramic varistor according to claim 1 or 2, characterized in that the slit is impregnated with a metal solution and a coating film is formed on the inner wall of the slit during baking of the porous external electrode.
JP23402686A 1986-09-30 1986-09-30 Manufacture of laminated ceramic varistor Granted JPS6387706A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23402686A JPS6387706A (en) 1986-09-30 1986-09-30 Manufacture of laminated ceramic varistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23402686A JPS6387706A (en) 1986-09-30 1986-09-30 Manufacture of laminated ceramic varistor

Publications (2)

Publication Number Publication Date
JPS6387706A JPS6387706A (en) 1988-04-19
JPH0252408B2 true JPH0252408B2 (en) 1990-11-13

Family

ID=16964392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23402686A Granted JPS6387706A (en) 1986-09-30 1986-09-30 Manufacture of laminated ceramic varistor

Country Status (1)

Country Link
JP (1) JPS6387706A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH042014U (en) * 1990-04-23 1992-01-09

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH042014U (en) * 1990-04-23 1992-01-09

Also Published As

Publication number Publication date
JPS6387706A (en) 1988-04-19

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