JPH0256815B2 - - Google Patents
Info
- Publication number
- JPH0256815B2 JPH0256815B2 JP57199300A JP19930082A JPH0256815B2 JP H0256815 B2 JPH0256815 B2 JP H0256815B2 JP 57199300 A JP57199300 A JP 57199300A JP 19930082 A JP19930082 A JP 19930082A JP H0256815 B2 JPH0256815 B2 JP H0256815B2
- Authority
- JP
- Japan
- Prior art keywords
- fuse
- heating element
- layer
- pattern
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Semiconductor Memories (AREA)
- Fuses (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Description
【発明の詳細な説明】
(a) 発明の技術分野
本発明は、熱的に切断容易なヒユーズを記憶媒
体として用いてなる半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a semiconductor device using a thermally easily cuttable fuse as a storage medium.
(b) 技術の背景
使用者が情報をプログラムできる読出し専用メ
モリ(PROM)の情報書込み手段、及びICメモ
リに於ける冗長回路の切換え手段等にフユーズが
多く用いられる。(上記PROMは特にフユーズ
ROMと呼ばれる)
(c) 従来技術と問題点
上記半導体装置には、従来所望の抵抗値が付与
されたポリ・シリコン・パターンからなる自己加
熱方式のフユーズが主として用いられていた。(b) Background of the Technology Fuses are often used as means for writing information into read-only memory (PROM) that allows users to program information, and as means for switching redundant circuits in IC memories. (The above PROM is especially
(referred to as ROM) (c) Prior Art and Problems Conventionally, self-heating type fuses made of polysilicon patterns provided with a desired resistance value have been mainly used in the above-mentioned semiconductor devices.
第1図はフユーズ下部の絶縁膜に段差を設ける
ことにより溶融ポリ・シリコンが流れ落ちるよう
にして、溶断の確実性を向上せしめた従来構造の
模式断面を示したもので、図中1は半導体基板、
2は絶縁膜、3は段差部、4はポリ・シリコン・
フユーズ・パターン、8は表面保護膜、E及び
E′は通電端子を表わしている。 Figure 1 shows a schematic cross section of a conventional structure in which a step is provided in the insulating film at the bottom of the fuse to allow molten polysilicon to flow down and improve the reliability of fusing. ,
2 is an insulating film, 3 is a stepped portion, and 4 is a polysilicon film.
Fuse pattern, 8 is surface protective film, E and
E′ represents a current-carrying terminal.
又第2図はフユーズの下部にp−n接合を設
け、該p−n接合にも同時に通電し、該p−n接
合を発熱せしめることによりフユーズの通電溶断
を容易にした従来構造の模式断面を示したもの
で、図中1はp型半導体基板、4はポリ・シリコ
ン・フユーズ・パターン、5はn+型領域、6は
p−n接合、7は薄い絶縁膜、8は表面保護膜、
E,E′は通電端子を表わしている。 Figure 2 is a schematic cross section of a conventional structure in which a p-n junction is provided at the bottom of the fuse, and the p-n junction is also energized at the same time to generate heat, making it easy to blow the fuse. In the figure, 1 is a p-type semiconductor substrate, 4 is a polysilicon fuse pattern, 5 is an n + type region, 6 is a p-n junction, 7 is a thin insulating film, and 8 is a surface protection film. ,
E and E' represent current-carrying terminals.
上記の二種は従来の代表的構造であるが、いず
れの構造に於ても、通電による自己加熱が可能な
高抵抗ポリ・シリコン層によつてフユーズ・パタ
ーンが形成されていた。このポリ・シリコンは、
1400〔℃〕以上の高融点である。そのため該従来
構造に於ては溶断の際の発熱量が極めて大きく、
溶断に際して、第1図及び第2図に示すようにフ
ユーズ部上を覆つている例えばりん珪酸ガラス
(PSG)等の表面保護膜8に点線で表わしたよう
な穴9が形成され、該表面保護膜8の基板面に対
する保護効果が損なわれるという問題がある。 The above two types are typical conventional structures, but in both structures, the fuse pattern is formed of a high-resistance polysilicon layer that can self-heat when energized. This polysilicon is
It has a high melting point of 1400 [℃] or higher. Therefore, in the conventional structure, the amount of heat generated during fusing is extremely large.
At the time of fusing, as shown in FIGS. 1 and 2, holes 9 as shown by dotted lines are formed in the surface protection film 8, such as phosphosilicate glass (PSG), covering the fuse part, and the surface protection There is a problem in that the protective effect of the film 8 on the substrate surface is impaired.
そこで半導体装置の信頼性を確保するために
は、表面保護膜を更にもう一層形成させる必要が
生じていた。 Therefore, in order to ensure the reliability of the semiconductor device, it has become necessary to form an additional surface protective film.
このように表面保護膜をさらにもう一層形成す
る必要が生じないヒユーズを有したものが、従来
の改良された半導体装置として、既に公知である
ので、以下説明しておく。 A device having a fuse that does not require the formation of an additional surface protective film is already known as a conventional improved semiconductor device, and will be described below.
第4図は、この従来の改良されたヒユーズのX
方向断面図イ及びY方向断面図ロを示すものであ
り、被溶断導体パターンを、主としてポリシリコ
ンで形成した抵抗対層の発熱によつて加熱溶断す
る構造の一実施例を示す。この第4図において、
11は半導体基板、12はフイールド酸化膜等か
らなる第1の絶縁膜、13は100〔Ω−cm〕程度の
抵抗率を有するポリシリコン層16からなる発熱
体パターン、14はSi3N4からなる薄い第2の絶
縁膜、15はAl(アルミニウム)もしくはAl(ア
ルミニウム)合金等からなる被溶断導体パター
ン、17はリン珪酸ガラス(PSG)等からなる
層間絶縁膜、18a,18bは電極コンタクト
窓、19a,19bはAlもしくはAl合金等から
なる溶断電流供給用配線、20はPSG等からな
る表面保護膜を示している。 Figure 4 shows this conventional improved fuse
This figure shows a cross-sectional view in the direction A and a cross-sectional view in the Y direction, showing an example of a structure in which the conductor pattern to be melted and cut is heated and melted by heat generated by a resistor pair layer formed mainly of polysilicon. In this Figure 4,
11 is a semiconductor substrate, 12 is a first insulating film made of a field oxide film, etc., 13 is a heating element pattern made of a polysilicon layer 16 having a resistivity of about 100 [Ω-cm], and 14 is made of Si 3 N 4 . 15 is a conductor pattern to be fused made of Al (aluminum) or Al (aluminum) alloy, etc., 17 is an interlayer insulating film made of phosphosilicate glass (PSG), etc., and 18a, 18b are electrode contact windows. , 19a and 19b are fusing current supply wiring made of Al or Al alloy, and 20 is a surface protection film made of PSG or the like.
この第4図の改良された従来技術によれば、予
備加熱手段となる発熱抵抗層を溶断されるべきヒ
ユーズ層の下部に配置し、ヒユーズ層自身に電流
を通じなくても溶断可能な構成である。改良され
る前の第1図、第2図の従来技術が、ヒユーズ層
自身の発熱によつて溶断していたので、ヒユーズ
層全体が加熱してしまい、したがつてこのヒユー
ズ層をカバーする絶縁膜を損傷していたのに対し
て、この改良された技術では、ヒユーズ層自身を
他から発熱させて溶解する構成であるので、ヒユ
ーズ層全体を熱させる必要がなくなり、カバー絶
縁膜を傷めることが少なくて済むのである。 According to the improved conventional technique shown in FIG. 4, a heat generating resistive layer serving as a preheating means is disposed below the fuse layer to be blown, so that the fuse layer can be blown without passing current through the fuse layer itself. . In the conventional technology shown in FIGS. 1 and 2 before the improvement, the fuse layer was blown by its own heat generation, so the entire fuse layer was heated, and the insulation covering the fuse layer was heated. However, with this improved technology, the fuse layer itself is melted by generating heat from another source, so there is no need to heat the entire fuse layer, and there is no chance of damaging the cover insulation film. This means that there is less.
確かにこの構成では、ヒユーズ層上部をカバー
する絶縁膜を損傷してしまう問題はなくなつた
が、それでもなお周囲の素子を損傷するには十分
な熱量が溶断に必要なのである。また、この予備
加熱手段は、例えばポリシリコンからなる抵抗体
でできているので、アルミニウムのような導電体
で構成した場合の第1図、第2図の例でヒユーズ
溶断のためにヒユーズ自身に流されるのに比べる
と、比較的少ない消費電力で済むが、それでもな
お少ない消費電力でヒユーズを溶断できることが
必要になつてきた。 Although this configuration eliminates the problem of damaging the insulating film covering the upper part of the fuse layer, it still requires a sufficient amount of heat to blow out the fuse to damage surrounding elements. In addition, since this preheating means is made of a resistor made of polysilicon, for example, in the example shown in FIGS. This consumes relatively little power compared to blowing fuses, but it has become necessary to be able to blow fuses with less power consumption.
以上のように、従来の改良された方法によつて
も、なお解決できない課題は、ヒユーズ溶断の際
の発熱が広い範囲に渡るので、周囲の素子を損傷
してしまいがちであり、また消費電力が無駄に大
きいという点にある。 As mentioned above, even with conventional improved methods, the problems that cannot be solved are that the heat generated when a fuse blows spreads over a wide area, which tends to damage surrounding elements, and that power consumption The point is that it is unnecessarily large.
(d) 発明の目的
本発明は、極狭い範囲についてのみ発熱させう
る構成によつて、他の周辺部素子に対する熱的損
傷もなく、少ない消費電力でヒユーズの溶断を可
能ならしめる半導体装置の提供を目的とする。(d) Purpose of the Invention The present invention provides a semiconductor device that has a configuration that can generate heat only in an extremely narrow range, thereby making it possible to blow out a fuse with less power consumption without causing thermal damage to other peripheral elements. With the goal.
(e) 発明の構成
即ち本発明は、上記した従来のヒユーズに改良
を加えた半導体装置によつてもなお解決できなか
つた熱的な課題に鑑みてなされたものであり、以
下の構成をその手段とするものである。(e) Structure of the invention In other words, the present invention was made in view of the thermal problems that could not be solved even with the above-mentioned semiconductor device which is an improvement on the conventional fuse, and the following structure has been developed. It is meant as a means.
すなわち、本発明の半導体装置では、基体面に
凸状の段差として形成され、一導電型の半導体領
域と、反対導電型の半導体領域とからなる発熱体
と、
該発熱体の少なくとも該反対導電型の半導体領
域表面に被着形成される絶縁層と、
前記反対導電型の半導体領域の直上にある該絶
縁層表面に形成され、前記発熱体の発する熱で溶
断し易くなるように形成されてなるパターンとを
有することを特徴とする。 That is, in the semiconductor device of the present invention, a heating element is formed as a convex step on a substrate surface and includes a semiconductor region of one conductivity type and a semiconductor region of an opposite conductivity type, and at least the opposite conductivity type of the heating element. an insulating layer deposited on the surface of the semiconductor region; and an insulating layer formed on the surface of the insulating layer directly above the semiconductor region of the opposite conductivity type, and formed to be easily fused by the heat generated by the heating element. It is characterized by having a pattern.
(f) 発明の実施例
以下本発明を実施例について、図を用いて詳細
に説明する。(f) Embodiments of the Invention The present invention will be described in detail below with reference to the drawings.
第3図は本発明の半導体装置のフユーズ構造を
示す斜視模式図、第5図は本発明の他の一実施例
に於けるX方向断面図イ及びY方向断面図ロであ
る。 FIG. 3 is a schematic perspective view showing a fuse structure of a semiconductor device of the present invention, and FIG. 5 is a cross-sectional view in the X direction (A) and a cross-sectional view in the Y direction (B) of another embodiment of the present invention.
本発明の傍熱型フユーズは、例えば第3図に示
すように半導体基板11上の絶縁膜12(フイー
ルド酸化膜等からなる)上に、例えばX方向に向
つて配設された厚さ0.5〜1〔μm〕、幅2〜3〔μ
m〕程度の、それ自体第1の絶縁膜12表面との
間に段差を持つ帯状の発熱体パターン13が設け
られ、該発熱体パターン13上に該パターン13
の表面上に形成された例えば窒化シリコン
(Si3N4)からなる厚さ500〔Å〕程度の薄い第2
の絶縁膜14を介し、該発熱体パターン13を例
えば直角に跨ぐ、例えば厚さ1〔μm〕、幅2〜3
〔μm〕程度のアルミニウム(Al)若しくはAl合
金等低融点の配線材料からなる帯状の被溶断導体
パターン15が配設された構造を有してなつてい
る。 The indirect heating type fuse of the present invention is, for example, as shown in FIG. 1 [μm], width 2-3 [μm]
m], a band-shaped heating element pattern 13 having a step between itself and the surface of the first insulating film 12 is provided.
A thin second layer of about 500 Å thick made of silicon nitride (Si 3 N 4 ), for example, is formed on the surface of the
The heating element pattern 13 is straddled, for example, at right angles through an insulating film 14 of 1 [μm] in thickness and 2 to 3 in width.
It has a structure in which a belt-shaped conductor pattern 15 to be melted and made of a wiring material with a low melting point such as aluminum (Al) or an Al alloy with a diameter of approximately [μm] is disposed.
そして上記発熱体パターン13は、半導体材
料、例えばポリシリコンからなる抵抗体層として
形成され、その特に発熱させたい局部が他とは反
対の導電型からなるように、pn接合を有して形
成されるものである。第5図は被溶断導体パター
ンを、主として発熱体パターン内に形成したp−
n接合の発熱によつて加熱溶断する構造を有する
一実施例に於けるX方向断面図イ及びY方向断面
図ロである。 The heating element pattern 13 is formed as a resistor layer made of a semiconductor material such as polysilicon, and is formed with a p-n junction so that the local part where heat generation is particularly desired is of the opposite conductivity type. It is something that Figure 5 shows a p-type conductor pattern formed mainly within the heating element pattern.
They are an X-direction cross-sectional view (a) and a Y-direction cross-sectional view (b) of an embodiment having a structure that is thermally fused due to heat generated by the n-junction.
同図に於て、11は半導体基板、12は第1の
絶縁膜、13は半導体パターン、14はSi3N4か
らなる薄い第2の絶縁膜、15は低融点の被溶断
導体パターン、16a及び16cはn型ポリ・シ
リコン層、16bはp型ポリ・シリコン層、17
は層間絶縁膜、18a,18bは電極コンタクト
窓、19a,19bは溶断電流供給用の配線、2
0は表面保護膜を示している。 In the figure, 11 is a semiconductor substrate, 12 is a first insulating film, 13 is a semiconductor pattern, 14 is a thin second insulating film made of Si 3 N 4 , 15 is a low melting point conductor pattern to be fused, and 16a and 16c is an n-type polysilicon layer, 16b is a p-type polysilicon layer, and 17
1 is an interlayer insulating film, 18a and 18b are electrode contact windows, 19a and 19b are wirings for supplying fusing current, and 2
0 indicates a surface protective film.
この構造に於て通常ポリ・シリコン配線に付与
される導電型と反対導電型の例えばp型領域19
bは、イオン注入法を用い、第5図イに示すよう
に被溶断導体パターン15の下部に該導体パター
ン15の幅より狭い幅に形成される。 In this structure, for example, a p-type region 19 of a conductivity type opposite to that normally imparted to the polysilicon wiring.
B is formed using an ion implantation method to have a width narrower than the width of the conductor pattern 15 at the lower part of the conductor pattern 15 to be fused, as shown in FIG. 5A.
上記本発明の構造を有する傍熱型フユーズに於
ては、溶断電流を発熱体パターン13に流すこと
により発熱体パターン13を被溶断導体パターン
15の融点以上の温度に昇温せしめることによ
り、被溶断導体パターン15の溶断がなされる。
第1の実施例の構造即ち発熱体パターン13が高
抵抗層の場合、溶断電流は交流、直流のいずれで
も良く、発熱が主としてp−n接合による本発明
の場合には、第5図イに示すように例えばp型ポ
リ・シリコン層16bの両面に形成されているp
−n接合からの発熱を利用する場合電流がいずれ
の向きに流れても溶断効果は同じになる。又発熱
量を一層高めるためにはp型ポリ・シリコン層1
6bの不純物濃度を低くした方が良い。更に又溶
断電流の向きを考慮すればp−n接合は1層でも
さしつかえない。 In the indirectly heated fuse having the structure of the present invention, the temperature of the heating element pattern 13 is raised to a temperature higher than the melting point of the conductor pattern 15 to be fused by passing a fusing current through the heating element pattern 13. The melting conductor pattern 15 is melted.
In the structure of the first embodiment, that is, in the case where the heating element pattern 13 is a high-resistance layer, the fusing current may be either alternating current or direct current, and in the case of the present invention where the heat generation is mainly due to a pn junction, as shown in FIG. As shown, for example, p-type polysilicon layers 16b are formed on both sides.
When using the heat generated from the -n junction, the fusing effect will be the same no matter which direction the current flows. In addition, in order to further increase the amount of heat generated, a p-type polysilicon layer 1
It is better to lower the impurity concentration of 6b. Furthermore, if the direction of the fusing current is taken into account, a single pn junction may be sufficient.
なお本発明の構造に於て、被溶断導体パターン
15にも同時に電流を流し、選択溶断を更に確実
にすることができる。この場合被溶断導体パター
ン15自体の発熱を容易にするため被溶断部分の
パターン断面積を小さく形成することが望まし
い。 In the structure of the present invention, current can also be applied to the conductor pattern 15 to be fused at the same time to further ensure selective fusion. In this case, in order to facilitate the heat generation of the conductor pattern 15 itself to be fused, it is desirable to form the pattern cross-sectional area of the fused portion to be small.
上記実施例に於ては、発熱体パターンと被溶断
導体パターン間の絶縁膜にSi3N4膜を用いたが、
この絶縁膜は二酸化シリコン(SiO2)膜であつ
てもさしつかえない。但しSiO2膜は高温に於て
アルミニウムと反応し絶縁性が低下するという問
題があるので、SiO2膜を使用する際その厚さは
Si3N4膜より厚くする必要がある。 In the above embodiment, a Si 3 N 4 film was used as the insulating film between the heating element pattern and the conductor pattern to be fused.
This insulating film may be a silicon dioxide (SiO 2 ) film. However, the SiO 2 film has the problem of reacting with aluminum at high temperatures and reducing its insulation properties, so when using the SiO 2 film, its thickness must be
It needs to be thicker than the Si 3 N 4 film.
(g) 発明の効果
上記実施例に示したように、本発明の構造によ
れば、加熱部分が実にヒユーズ下部のみに限定で
きることとなり、溶断しようとした際に、ヒユー
ズ下部以外をも加熱してしまうことがなく、この
ヒユーズ溶断部近傍の他の素子に熱的な損傷を与
えることがない。また、加熱する部分をごく狭い
領域に限ることができ、わずかの電流を通じるこ
とで、ヒユーズを溶断することができるという効
果がある。(g) Effects of the Invention As shown in the above embodiments, according to the structure of the present invention, the heated part can be limited to only the lower part of the fuse, and when trying to blow it out, it is possible to heat parts other than the lower part of the fuse. There is no risk of thermal damage to other elements near the fuse blowout. Furthermore, the area to be heated can be limited to a very narrow area, and the fuse can be blown by passing a small amount of current.
第1図及び第2図は従来のフユーズの模式断面
図、第3図は本発明のフユーズ構造を示す斜視模
式図、第4図は従来の改良されたヒユーズのX方
向断面図イ及びY方向断面図ロ、第5図は本発明
の他の一実施例に於けるX方向断面図イ及びY方
向断面図ロである。
図に於て、12は第1の絶縁膜、13は発熱体
パターン、14は第2の絶縁膜、15は被溶断導
体パターン、16はポリ・シリコン層、16a,
16cはn型ポリ・シリコン層、16bはp型ポ
リ・シリコン層、17は層間絶縁膜、18a,1
8bは電極コンタクト窓、19a,19bは溶断
電流供給用の配線、20は表面保護膜を示す。
Figures 1 and 2 are schematic sectional views of a conventional fuse, Figure 3 is a schematic perspective view showing the fuse structure of the present invention, and Figure 4 is a sectional view of a conventional improved fuse in the X and Y directions. 5 is a sectional view B in the X direction and a sectional view B in the Y direction in another embodiment of the present invention. In the figure, 12 is a first insulating film, 13 is a heating element pattern, 14 is a second insulating film, 15 is a conductor pattern to be fused, 16 is a polysilicon layer, 16a,
16c is an n-type polysilicon layer, 16b is a p-type polysilicon layer, 17 is an interlayer insulating film, 18a, 1
Reference numeral 8b indicates an electrode contact window, 19a and 19b indicate wiring for supplying fusing current, and 20 indicates a surface protection film.
Claims (1)
型の半導体領域と、反対導電型の半導体領域とを
有する発熱体と、 該発熱体の少なくとも該反対導電型の半導体領
域表面に被着形成される絶縁層と、 前記反対導電型の半導体領域の直上にある該絶
縁層表面に形成され、前記発熱体の発する熱で溶
断し易くなるように形成されてなる溶断導電パタ
ーンとを有する半導体装置。[Scope of Claims] 1. A heating element formed as a convex step on a base surface and having a semiconductor region of one conductivity type and a semiconductor region of the opposite conductivity type, and at least a semiconductor of the opposite conductivity type of the heating element. an insulating layer deposited and formed on the surface of the region; and a fusing conductive layer formed on the surface of the insulating layer directly above the semiconductor region of the opposite conductivity type and formed to be easily fused by the heat generated by the heating element. A semiconductor device having a pattern.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57199300A JPS5987736A (en) | 1982-11-12 | 1982-11-12 | Indirectly-heated fuse |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57199300A JPS5987736A (en) | 1982-11-12 | 1982-11-12 | Indirectly-heated fuse |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5987736A JPS5987736A (en) | 1984-05-21 |
| JPH0256815B2 true JPH0256815B2 (en) | 1990-12-03 |
Family
ID=16405505
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57199300A Granted JPS5987736A (en) | 1982-11-12 | 1982-11-12 | Indirectly-heated fuse |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5987736A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6138744U (en) * | 1984-08-10 | 1986-03-11 | 内橋エステック株式会社 | temperature fuse |
| JP2790433B2 (en) * | 1993-08-31 | 1998-08-27 | ソニー株式会社 | Protection element and circuit board |
| JP3067011B2 (en) * | 1994-11-30 | 2000-07-17 | ソニーケミカル株式会社 | Protection element and method of manufacturing the same |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5877096A (en) * | 1981-10-28 | 1983-05-10 | Toshiba Corp | Programmable read-only memory element |
-
1982
- 1982-11-12 JP JP57199300A patent/JPS5987736A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5987736A (en) | 1984-05-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR0157348B1 (en) | Programmable fuse structure and fuse programming method | |
| EP0078165B1 (en) | A semiconductor device having a control wiring layer | |
| EP1479106B1 (en) | Fuse structure programming by electromigration of silicide enhanced by creating temperature gradient | |
| US8952487B2 (en) | Electronic circuit arrangement | |
| JPH07335761A (en) | Electrically programmable self-cooling fuse | |
| US5827759A (en) | Method of manufacturing a fuse structure | |
| JPH0256815B2 (en) | ||
| JPH0428249A (en) | Semiconductor device | |
| JPS6216546B2 (en) | ||
| TW567603B (en) | Fuse structure for a semiconductor device and manufacturing method thereof | |
| JPH03171657A (en) | Semiconductor device | |
| JP2004228369A (en) | Semiconductor device and fuse blowing method | |
| JPH0541481A (en) | Semiconductor integrated circuit | |
| JPH0334660B2 (en) | ||
| JPS5877097A (en) | Programmable read-only memory element | |
| JPH0760853B2 (en) | Laser beam programmable semiconductor device and manufacturing method of semiconductor device | |
| JPS61147548A (en) | Semiconductor integrated circuit device | |
| JPS63260149A (en) | Semiconductor device | |
| JPH0479137B2 (en) | ||
| CN121865913A (en) | Electric fuse devices and their manufacturing methods and circuits | |
| JPS61176135A (en) | Semiconductor device | |
| JPS5859528A (en) | Fuse unit and method of producing same | |
| JPH0770599B2 (en) | Method for manufacturing semiconductor device | |
| JPH0344063A (en) | Semiconductor device | |
| JPH0728010B2 (en) | Fuse blown PROM |