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JPH0262873B2 - - Google Patents
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JPH0262873B2 - - Google Patents

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Publication number
JPH0262873B2
JPH0262873B2 JP62292635A JP29263587A JPH0262873B2 JP H0262873 B2 JPH0262873 B2 JP H0262873B2 JP 62292635 A JP62292635 A JP 62292635A JP 29263587 A JP29263587 A JP 29263587A JP H0262873 B2 JPH0262873 B2 JP H0262873B2
Authority
JP
Japan
Prior art keywords
frequency
melody
division number
frequency division
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62292635A
Other languages
Japanese (ja)
Other versions
JPS63146099A (en
Inventor
Hiroo Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP62292635A priority Critical patent/JPS63146099A/en
Publication of JPS63146099A publication Critical patent/JPS63146099A/en
Publication of JPH0262873B2 publication Critical patent/JPH0262873B2/ja
Granted legal-status Critical Current

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  • Electrophonic Musical Instruments (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明はメロデイーを奏する機能を有する電子
回路に関する。さらに詳しくは、メロデイーを奏
する為の音階を得る手段に関する。 第1図は電子回路であるアラーム付電子時計の
一般的な構成を示したブロツク図である。まず、
時計の心臓部をなすものは水晶振動子を用いた発
振回路1であり、その発振周波数は略2n(nは自
然数)の値をもつ。即ち、65536Hz、あるいは、
131072Hz等が一般的である。次に、この発振出力
は逐次1/2にその周波数を減ずる10数段の分周回
路2に入り、最終的には1秒信号となつて取り出
される。秒信号はカウンター回路3に於いて、60
進、あるいは、12進化され、時、分、秒の各信号
に積算される。この各時間信号はデコーダ4に於
いて、さらに、デジタル表示の為の符号化が行わ
れ、ドライバー5を通して、液晶等の表示6に表
わされる。一方、アラーム機能の為には、この他
に、アラームの時刻設定回路7があり、外部スイ
ツチによつてアラーム時刻が入力される。入力信
号はただちに符号化され、時刻の一致検出回路8
に於いて、現時刻と比較がなされ、一致した時電
気音響変換器9によりブザー音として報知され
る。ここまでが、アラーム付電子時計の通常の構
成である。 本発明は以上のアラーム付電子時計のような電
子回路にメロデイーを奏させる為に、国際規約の
周波数に対して誤差の少ない音階の周波数を形成
するメロデイー音階形成回路を実現するものであ
る。 第2図は第1図の電気音響変換部分を詳しくみ
た本発明によるメロデイー音階形成回路のブロツ
ク図である。第2図に於いては第1図の時間標準
と同一の発振回路10を基準信号源とし、この出
力を適宜音階に対応した分周周波数として取り出
すプログラマブル・カウンタ11につないでい
る。プログラマブル・カウンタの分周出力は、任
意の曲を記憶したROM等のメモリー回路15の
指示に従つて逐次変化して行く。メモリーの読み
出し等は、やはり時間の標準信号を基とした分周
出力を分周回路14によつて得、メモリー部のア
ドレスの指定、即ち、曲の音の高さを決定する分
周の数と、メモリーの読み出しの速度、即ち、曲
のテンポあるいは音の長さをこの分周出力によつ
てコントロールするものである。従つて、プログ
ラマブル・カウンタ11の出力は継続時間の異な
る複数の周波数のシリーズ、即ち、メロデイーに
対応する電気出力となつている。次に、この出力
はドライバー12を通してスピーカー13に適し
た駆動波形に変形され、さらに、適当なアンプを
かけた後、スピーカー13から音となつて取り出
される。 さて、このようなメロデイーを奏するアラーム
に於いて、本発明では標準周波数に対して1/
(64×2m)(mは整数)分周を行つた分周出力を基
準音階、例えばC音とすることが特徴である。第
1表は国際的な規約に基づく音階の各音に対する
周波数と、2nHzの標準周波数を基として1/(64
×2m)分周した周波数をC音に対応させてC6
=1024Hz、C7音=2048Hzとした時の時計用等分
平均率音階の周波数と、プログラマブル・カウン
タ11に於いて2nHzの標準周波数をメモリー回路
15の記憶する分周の数のデータに応じて分周し
た時の周波数とを比較したものである。この表で
わかることは、標準周波数2nHzから得られる分周
出力210=1024Hz、あるいは、211=2048Hzが、国
際的な規約であるC6=1047Hz、C7=2094Hzに非
常に近いことである。 従つて、前記分周出力1024Hz、または2048Hzを
メロデイー音階の近似C音とすることは望ましい
状態といえる。そして、この近似C音を基にして
等分平均率音階を形成し、その周波数と、標準周
波数65536Hz、あるいは、標準周波数131072Hzを
64×2mから64×2m-1の間の整数を用いた整数分の
1分周した周波数を比較すると、これらも非常に
近い値が存在することがわかる。
The present invention relates to an electronic circuit having the function of playing a melody. More specifically, it relates to a means for obtaining a scale for playing a melody. FIG. 1 is a block diagram showing the general configuration of an electronic clock with an alarm, which is an electronic circuit. first,
The heart of the clock is an oscillation circuit 1 using a crystal oscillator, and its oscillation frequency has a value of approximately 2 n (n is a natural number). That is, 65536Hz, or
131072Hz etc. are common. Next, this oscillation output enters a frequency divider circuit 2 of more than 10 stages that successively reduces its frequency by 1/2, and is finally taken out as a 1 second signal. The second signal is 60 in counter circuit 3.
It is converted to decimal or decimal and integrated into hour, minute, and second signals. Each time signal is further encoded for digital display in a decoder 4, and is displayed on a display 6 such as a liquid crystal via a driver 5. On the other hand, for the alarm function, there is also an alarm time setting circuit 7, in which the alarm time is inputted by an external switch. The input signal is immediately encoded and the time coincidence detection circuit 8
At this point, a comparison is made with the current time, and when they match, the electroacoustic transducer 9 notifies you with a buzzer sound. The above is the normal configuration of an electronic watch with an alarm. The present invention realizes a melody scale forming circuit that forms a scale frequency with less error relative to the frequency specified in the international convention, in order to cause an electronic circuit such as the above-mentioned electronic clock with an alarm to play a melody. FIG. 2 is a block diagram of a melody scale forming circuit according to the present invention, looking in detail at the electroacoustic conversion portion of FIG. 1. In FIG. 2, the same oscillation circuit 10 as the time standard in FIG. 1 is used as a reference signal source, and its output is connected to a programmable counter 11 which takes out the divided frequency appropriately corresponding to the musical scale. The frequency-divided output of the programmable counter changes successively according to instructions from a memory circuit 15 such as a ROM that stores an arbitrary song. For reading out the memory, etc., the frequency division circuit 14 obtains a frequency divided output based on the standard time signal, and specifies the address of the memory section, that is, the frequency division number that determines the pitch of the song. The read speed of the memory, that is, the tempo of the song or the length of the sound, is controlled by this frequency division output. Therefore, the output of the programmable counter 11 is a series of a plurality of frequencies having different durations, that is, an electrical output corresponding to a melody. Next, this output is transformed into a driving waveform suitable for the speaker 13 through the driver 12, and after being applied with an appropriate amplifier, is extracted from the speaker 13 as sound. Now, in an alarm that plays such a melody, in the present invention, the frequency is 1/1 of the standard frequency.
(64×2 m ) (m is an integer) The feature is that the frequency-divided output after frequency division is set as a reference scale, for example, C tone. Table 1 shows the frequency for each note of the scale based on international conventions and 1 /(64
×2 m ) The frequency of the equally divided average rate scale for watches when the divided frequency corresponds to the C note and C6 note = 1024Hz, C7 note = 2048Hz, and the programmable counter 11 calculates 2n The frequency is compared with the frequency when the standard frequency of Hz is divided according to the frequency division number data stored in the memory circuit 15. This table shows that the divided output 2 10 = 1024 Hz or 2 11 = 2048 Hz obtained from the standard frequency 2 n Hz is very close to the international conventions of C 6 = 1047 Hz and C 7 = 2094 Hz. That's true. Therefore, it can be said that it is desirable to set the frequency-divided output of 1024 Hz or 2048 Hz as the approximate C note of the melody scale. Then, based on this approximate C note, form an equally divided average rate scale, and combine that frequency with the standard frequency of 65,536Hz or the standard frequency of 131,072Hz.
If we compare the frequencies obtained by dividing the frequency by an integer using integers between 64×2 m and 64×2 m−1 , we find that these values also have very close values.

【表】 # 〓【table】 # 〓

Claims (1)

【特許請求の範囲】[Claims] 1 2nHz(nは自然数)の発振周波数を有する発
振回路を含む基準信号源と、メロデイーを構成す
る音階に対応する分周数データを記憶するメモリ
ー回路と、該メモリー回路から読み出された前記
分周数データを受けて前記基準信号源から得た2n
Hzの信号を音階に対応する周波数まで分周するプ
ログラマブルカウンタとを備え、前記メモリー回
路は、前記基準信号源から得た2nHzを64×2m(m
は整数)の分周数で分周した周波数をC音の周波
数に対応させ、かつ該2nHzを64×2mから64×2m-1
までの間の整数の分周数で分周した周波数を他の
各音階の周波数に近似して対応させるように、前
記メロデイーを構成する音階に対応する分周数デ
ータを設定記憶して成ることを特徴とするメロデ
イー音階形成回路。
A reference signal source including an oscillation circuit having an oscillation frequency of 1 2 n Hz (n is a natural number), a memory circuit that stores frequency division number data corresponding to the scales that make up the melody, and a signal that is read from the memory circuit. 2 n obtained from the reference signal source upon receiving the frequency division number data.
and a programmable counter that divides a Hz signal to a frequency corresponding to a musical scale, and the memory circuit divides 2 n Hz obtained from the reference signal source into 64×2 m (m
is an integer), and make the frequency divided by the frequency division number correspond to the frequency of the C sound, and convert the 2 n Hz from 64 × 2 m to 64 × 2 m-1
Frequency division number data corresponding to the scales constituting the melody is set and stored so that the frequency divided by an integer frequency division number between up to and including approximately corresponds to the frequency of each other scale. A melody scale formation circuit featuring:
JP62292635A 1987-11-19 1987-11-19 Melody generator Granted JPS63146099A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62292635A JPS63146099A (en) 1987-11-19 1987-11-19 Melody generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62292635A JPS63146099A (en) 1987-11-19 1987-11-19 Melody generator

Publications (2)

Publication Number Publication Date
JPS63146099A JPS63146099A (en) 1988-06-18
JPH0262873B2 true JPH0262873B2 (en) 1990-12-26

Family

ID=17784342

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62292635A Granted JPS63146099A (en) 1987-11-19 1987-11-19 Melody generator

Country Status (1)

Country Link
JP (1) JPS63146099A (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524225A (en) * 1975-06-23 1977-01-13 Nec Corp Automatic player unit

Also Published As

Publication number Publication date
JPS63146099A (en) 1988-06-18

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