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JPH027176B2 - - Google Patents
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JPH027176B2 - - Google Patents

Info

Publication number
JPH027176B2
JPH027176B2 JP58049304A JP4930483A JPH027176B2 JP H027176 B2 JPH027176 B2 JP H027176B2 JP 58049304 A JP58049304 A JP 58049304A JP 4930483 A JP4930483 A JP 4930483A JP H027176 B2 JPH027176 B2 JP H027176B2
Authority
JP
Japan
Prior art keywords
electrode
film
cdte
heat treatment
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58049304A
Other languages
Japanese (ja)
Other versions
JPS59175121A (en
Inventor
Juzo Ozaki
Morio Wada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Electric Corp filed Critical Yokogawa Electric Corp
Priority to JP58049304A priority Critical patent/JPS59175121A/en
Publication of JPS59175121A publication Critical patent/JPS59175121A/en
Publication of JPH027176B2 publication Critical patent/JPH027176B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/011Manufacture or treatment of electrodes ohmically coupled to a semiconductor

Landscapes

  • Light Receiving Elements (AREA)
  • Electrodes Of Semiconductors (AREA)

Description

【発明の詳細な説明】 本発明は、p形CdTeに電極を形成させる電極
形成方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming an electrode on p-type CdTe.

半導体表面に形成させる電極には、非整流性
(オーミツク)電極と、整流性(シヨツトキー)
電極の2種類がある。オーミツク電極は、半導体
の特性測定やデイバイスを作る上で、最も重要な
電極であるが、電極材料と半導体の組合せにおい
てむずかしい。
The electrodes formed on the semiconductor surface include non-rectifying (ohmic) electrodes and rectifying (shottky) electrodes.
There are two types of electrodes. Ohmic electrodes are the most important electrodes for measuring the characteristics of semiconductors and making devices, but the combination of electrode materials and semiconductors is difficult.

従来、電極形成方法として、半導体表面に高濃
度の不純物を形成させておいて、電極をつけ、熱
処理する熱拡散法、電極材と半導体を高温にして
合金化する合金化法、イオン打込み法(イオンイ
ンプランテーシヨン)、電極材とマツチングの良
好な異種の半導体をつける例えばUS特許第
2865793号明細書に記載されているようなヘテ
ロ・エピタキシー法等がある。また、半導体化合
物に限つた場合、無電解メツキによつて化合物表
面の構成元素を置換して、高濃度層を形成させる
メツキ方法(例えばp形CdTeに塩化金メツキ液
をつけることによつて、CdとAuが置換し、Te高
濃度層ができ、Auのオーミツク電極を形成させ
る方法)もあつた。
Conventional methods for forming electrodes include the thermal diffusion method, in which a high concentration of impurities is formed on the semiconductor surface, the electrode is attached, and then heat treated; the alloying method, in which the electrode material and the semiconductor are alloyed at high temperature; and the ion implantation method ( ion implantation), which attaches a different type of semiconductor with good matching to the electrode material,
There is a hetero-epitaxy method as described in No. 2865793. In addition, in the case of semiconductor compounds, a plating method in which constituent elements on the surface of the compound are replaced by electroless plating to form a highly concentrated layer (for example, by applying a gold chloride plating solution to p-type CdTe, There was also a method in which Cd and Au were substituted to form a high concentration layer of Te, forming an Au ohmic electrode.

しかしながら、熱拡散法は高濃度層を形成する
不純物材料が一般に蒸発しやすいことから、高濃
度層形成の効率が悪いという欠点がある。また、
合金化法は、電極材料が限られ、化合物半導体で
は良い材料が少なく良好な合金層ができにくいと
いう欠点がある。また、その他の方法は、装置が
大がかりになるうえに、工程が増える欠点があ
る。また、メツキ方法は、簡単な方法であるが、
性能的に劣るうえ、再現性が悪い。
However, the thermal diffusion method has the drawback that the efficiency of forming the high concentration layer is low because the impurity material forming the high concentration layer is generally easily evaporated. Also,
The alloying method has the disadvantage that electrode materials are limited, and there are few good materials for compound semiconductors, making it difficult to form a good alloy layer. In addition, other methods have the drawbacks of requiring large-scale equipment and increasing the number of steps. In addition, although the Metsuki method is a simple method,
It has poor performance and poor reproducibility.

本発明の目的は、これらの従来の方法における
欠点や問題点を除去するためになされたものであ
る。
It is an object of the present invention to eliminate the drawbacks and problems of these conventional methods.

本発明に係る方法は、P形CdTe表面にSb(ア
ンチモン)膜、Ni(ニツケル)膜を順次つけ、そ
の後熱処理して半導体表面にオーミツク接合の電
極を形成するものである。
The method according to the present invention is to sequentially apply an Sb (antimony) film and a Ni (nickel) film to the P-type CdTe surface, and then perform heat treatment to form an ohmic junction electrode on the semiconductor surface.

第1図は本発明に係る電極形成方法の手順を示
すフローチヤートである。ここでは半導体として
アンドープp形CdTeを用いる場合を例示する。
FIG. 1 is a flowchart showing the procedure of an electrode forming method according to the present invention. Here, a case where undoped p-type CdTe is used as the semiconductor will be exemplified.

まず、不純物を添加してないp形CdTe(横河
電機製、比抵抗9.4×102Ω・cm、キヤリア濃度1.4
×1015cm-3)を厚さ0.8〜1.4mmウエーハに切断、
これを研摩後Brメタノール液で化学エツチした
試料を、真空中(2×10-4pa)で、試料温度は常
温にした条件の下で、まず、Sb薄膜を蒸着する
(ステツプ1)。続いて、同じ条件の下で、Ni薄
膜を蒸着する(ステツプ2)。
First, p-type CdTe with no added impurities (manufactured by Yokogawa Electric, resistivity 9.4×10 2 Ω・cm, carrier concentration 1.4
×10 15 cm -3 ) into 0.8 to 1.4 mm thick wafers,
After polishing and chemically etching the sample with a Br methanol solution, a thin Sb film is first deposited on the sample in vacuum (2 x 10 -4 pa) and at room temperature (step 1). Next, a Ni thin film is deposited under the same conditions (step 2).

第2図は、ステツプ2を終えた時点での断面構
造を示した図である。Sb、Niの各膜は、それぞ
れ20、10nm程度である。
FIG. 2 is a diagram showing the cross-sectional structure at the time when Step 2 is completed. The Sb and Ni films are approximately 20 and 10 nm thick, respectively.

続いて、これを不活性ガス(N2、Ar等)中
で、200℃、30〜60分間、または、450℃、0.5〜
1分間、熱処理して(ステツプ3)、完成する。
Subsequently, this was heated in an inert gas (N 2 , Ar, etc.) at 200°C for 30-60 minutes or at 450°C for 0.5-60 minutes.
Heat treatment for 1 minute (step 3) to complete.

第3図は、ステツプ3を終えた時点での断面構
造を示した図である。SbとNiがCdTeに拡散し、
pt高濃度層1が電極2とCdTeとの間に形成され
ている。このようにして完成される素子は、電極
2から信号を取り出すX線検出器として使用され
る。
FIG. 3 is a diagram showing the cross-sectional structure at the time when step 3 is completed. Sb and Ni diffuse into CdTe,
A pt high concentration layer 1 is formed between the electrode 2 and CdTe. The device completed in this way is used as an X-ray detector that extracts signals from the electrode 2.

第4図は、P−CdTeの結晶の両表面に、第1
図に示す手順でSb/Ni電極を形成し、その電
圧・電流特性を求めた特性図である。この実験結
果から明らかな様に、本発明の方法によつて形成
された電極は、直線性が良好なオーミツク接合で
あることが認められる。
Figure 4 shows that there is a first layer on both surfaces of the P-CdTe crystal.
FIG. 3 is a characteristic diagram showing voltage and current characteristics obtained by forming an Sb/Ni electrode according to the procedure shown in the figure. As is clear from the experimental results, it is recognized that the electrode formed by the method of the present invention is an ohmic junction with good linearity.

第5図は、ステツプ3において、450℃約1分
間熱処理後のオージエ電子分光分析法による深さ
方向の拡散プロフアイルである。SbとNiが、
CdTeに拡散し、高濃度層を形成していることが
認められる。なお、第5図において、横軸は深さ
に対応したもので、試料をイオンで削つていつた
時間を表わしている。
FIG. 5 shows the diffusion profile in the depth direction obtained by Auger electron spectroscopy after heat treatment at 450° C. for about 1 minute in step 3. Sb and Ni are
It is observed that it diffuses into CdTe and forms a highly concentrated layer. In FIG. 5, the horizontal axis corresponds to the depth and represents the time it takes for the sample to be ablated with the ions.

以上説明したように、本発明に係る方法は、
Sbのように再蒸発しやすく、また拡散しにくい
不純物(ドーパント)材料に、Niのような安定
な金属薄膜を覆うことによつて2層構造の電極膜
を形成するようにしたもので、熱処理時のSbの
再蒸発を防ぎ、またNiがSbの拡散を促す効果が
でる。
As explained above, the method according to the present invention
A two-layer electrode film is formed by covering an impurity (dopant) material that easily re-evaporates and is difficult to diffuse, such as Sb, with a stable metal thin film such as Ni. Ni has the effect of preventing re-evaporation of Sb during heating, and promoting the diffusion of Sb.

従つて、本発明の方法によれば、機械的に強固
で、しかも電気的に低抵抗で直線性の良好なオー
ミツク接合電極を形成することができる。また、
電極部分はNiという金属膜がついているので、
信号取り出しのためのリード線の接着等も容易に
できる。
Therefore, according to the method of the present invention, it is possible to form an ohmic junction electrode that is mechanically strong, has low electrical resistance, and has good linearity. Also,
The electrode part has a metal film called Ni, so
It is also easy to attach lead wires for signal extraction.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る電極形成方法の手順を示
すフローチヤート、第2図、第3図は各ステツプ
を終えた時点での断面構造説明図、第4図及び第
5図は実験結果の一例を示す特性線図である。 1……p+高濃度層、2……電極。
Fig. 1 is a flowchart showing the steps of the electrode forming method according to the present invention, Figs. 2 and 3 are explanatory diagrams of the cross-sectional structure at the time of completing each step, and Figs. 4 and 5 show the experimental results. FIG. 2 is a characteristic diagram showing an example. 1...p+ high concentration layer, 2... electrode.

Claims (1)

【特許請求の範囲】 1 p形CdTeの表面にSb膜、Ni膜を順次つけ、
その後熱処理して前記p形CdTeの表面にオーミ
ツク接合の電極を形成するようにした電極形成方
法。 2 熱処理は、200℃、30〜60分間行うことを特
徴とする特許請求の範囲第1項記載の電極形成方
法。 3 熱処理は、450℃、0.5〜1分間行うことを特
徴とする特許請求の範囲第1項記載の電極形成方
法。
[Claims] 1. Sb film and Ni film are sequentially applied to the surface of p-type CdTe,
An electrode forming method in which an ohmic junction electrode is formed on the surface of the p-type CdTe by subsequent heat treatment. 2. The electrode forming method according to claim 1, wherein the heat treatment is performed at 200°C for 30 to 60 minutes. 3. The electrode forming method according to claim 1, wherein the heat treatment is performed at 450°C for 0.5 to 1 minute.
JP58049304A 1983-03-24 1983-03-24 Formation of electrode Granted JPS59175121A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58049304A JPS59175121A (en) 1983-03-24 1983-03-24 Formation of electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58049304A JPS59175121A (en) 1983-03-24 1983-03-24 Formation of electrode

Publications (2)

Publication Number Publication Date
JPS59175121A JPS59175121A (en) 1984-10-03
JPH027176B2 true JPH027176B2 (en) 1990-02-15

Family

ID=12827194

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58049304A Granted JPS59175121A (en) 1983-03-24 1983-03-24 Formation of electrode

Country Status (1)

Country Link
JP (1) JPS59175121A (en)

Also Published As

Publication number Publication date
JPS59175121A (en) 1984-10-03

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