JPH028362B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital information reproducing circuit, and more particularly to a digital information reproducing circuit for accurately reproducing digital information recorded on a magnetic tape recording medium using a specific modulation method.

A conventional example will be explained with reference to FIGS. 1 to 3. As shown in Figure 1, digital information recorded on magnetic recording media (e.g. magnetic tape, magnetic disk, magnetic drum, magnetic card, etc.) (S _A in Figure 2, the arrow indicates the direction of the magnetic field) In the first stage of reproduction shown in FIG. 1, the reproduction magnetic head 2 is brought close to the recording medium 1 and detected as an electrical analog signal by magneto-electrical conversion. This detection signal is amplified by an amplifier 3 so as to be suitable for processing in the reproducing circuit system (signal S _B in FIG. 2). As shown in Figure 2, the signal S _B is a binary signal that is each component of digital information, that is, a binary signal that changes from "1" to "0" or "0" corresponding to the "1" and "0" signals. It is an analog waveform that has a maximum or minimum peak at a boundary that changes in the opposite direction. The amplified signal S _B is input to the differentiating circuit 4 in order to reproduce digital information by utilizing the fact that the analog waveform having such maximum or minimum peaks changes in accordance with the content of the recorded digital information. be done. The differentiating circuit 4 outputs a differential waveform that is at zero level for the maximum or minimum peak of the signal S _B and changes positive or negative with this zero level as a reference, as shown in the signal S _C in Figure 2. Ru. This differential signal S _C is input to the next-stage zero level comparator 5, and the zero level comparator 5 detects the timing at which the differential signal S _C changes to positive or negative with the zero level as a boundary, and adjusts the timing to correspond to this timing. A digital signal whose waveform rises or falls between two voltage levels is generated as shown in the signal S _D in FIG. 2. In this way, the digital information _SA recorded on the recording medium 1 is reproduced by the reproduction circuit as the corresponding digital signal _SD .

By the way, the digital information as shown in Fig. 3a (in the figure, "1" and "0" indicate binary signals)
As methods for recording information on a recording medium, it is known that there are an FM method as shown in FIG. 1B, an MFM method as shown in FIG. Both methods magnetically record digital information, which consists of binary signals, on a recording medium, and modulate it in a manner that is extremely convenient for reproduction from the recording medium. In order to be able to remove the DC component of digital information, or to be able to simultaneously reproduce the signal reading clock during reproduction, a method that corresponds to the characteristics of magnetic recording and reproduction is being developed. Adopted. That is,
In the FM method shown in Fig. 3b, for a signal "1" among the binary signals "1" and "0" that are the constituent elements of digital information, 2 (is the carrier frequency of the digital information to be modulated). In the MFM method shown in Figure c, a signal of "1" is inverted, a signal of "0" is non-inverted,
When the "0" signal is continuous, it is inverted at the boundary between "0" and "0" signals, as shown in d of the same figure.
In the case of NRZI method, it is inverted with a “1” signal, and “0”
This is a method in which the signal is non-inverted.

Therefore, if one section of the signal of each component "1" or "0" of the digital information to be modulated is T, then in the first two methods, the signal is inverted in the section 2T. It will occur at least once. The more signal inversions there are, the more accurately digital information can be reproduced, as explained in FIG. However,
In the NRZI method shown in Figure 3d, the inversion of the signal is
It may not occur in the 2T section, therefore,
When the NRZI method is adopted, the waveform of the reproduced signal may no longer correspond to digital information, as described below.

In other words, for the recording medium, before recording, the image shown in FIG.
When recording digital information as shown in Figure 3, it is modulated into NRZI digital information as shown in Figure d, and the information is recorded after undergoing such modulation (Figure 2 S _A is (replaced with the information in Figure d) is the signal waveform when the digital information is detected via the reproducing magnetic head (when the information in Figure 3 d is detected as shown in Figure 2 S _B ). For example, in the section d of the same figure, a zero level portion occurs in the P or Q section (a section where "0" is quite continuous), and as a result, the signal passes through the differentiating circuit 4 and then enters the zero level comparator 5. , even though the digital information is a "0" signal within the P or Q section, a "1" signal is detected as if it were present within that section, and as a result, the signal shown in d in the same figure cannot be played accurately.

Therefore, the main purpose of this invention is to eliminate the above-mentioned drawbacks. For example, even if information recorded on a recording medium based on a modulation method such as the NRZI method contains a series of "1" or "0" It is an object of the present invention to provide a digital information reproducing circuit capable of accurately reproducing digital information without any errors.

To summarize this invention, an alternating current signal having a frequency higher than that corresponding to the recorded digital information is superimposed on the differential signal by an adding means, and this superimposed signal is converted into a digital signal by a zero level comparator. The circuit means is configured so that only the boundary between "1" and "0" of information is significant, while zero level detection in the middle of consecutive "1" or "0" is ignored. Features.

Hereinafter, the present invention will be explained in detail based on illustrated embodiments.

FIG. 4 is a block diagram of one embodiment. Note that the same reference numerals as circuit means in FIG. 1 indicate the same or equivalent circuit means. Reference numeral 6 denotes an oscillation circuit, which outputs an AC oscillation signal (signal S _E ) having a frequency sufficiently higher than the frequency of the analog signal corresponding to the recorded digital information output from the differentiator circuit 4 . Reference numeral 7 denotes an adder circuit (mixer) which receives the signal S _E and the differential signal S _C ' from the differentiator circuit 4, and adds these two signals. The output of mixer 7 (signal S _F ) is given to zero level comparator 5 at the next stage. The zero level comparator 5 is for detecting whether the input analog signal S _F is at a set _reference level, that is, a level exceeding the zero level in this case. A first digital signal (signal S _G ) that falls or rises in synchronization with the signal is output. Also, this zero level comparator 5 has a zero level comparator 5.
It may also be a cross detection circuit. They are functionally equivalent, and are circuits that change the output level to positive or negative each time the analog input signal crosses the zero level. The output part of the zero level comparator 5 is connected to the trigger input (TR) of a retrigger type monostable multivibrator 8 (hereinafter referred to as "retrigger multi"), and also to a D type flip-flop circuit 9. (Hereinafter, this flip-flop circuit will be abbreviated as "DFF"). And the output part of the retrigger multi 8 is
Connected to the trigger input (TR) of DFF9.

Once the re-trigger multi 8 is triggered and enters a quasi-stable state, the circuit will not respond at all even if a trigger pulse is input again during that state, and the circuit will not respond at all even if a trigger pulse is input again. Unlike an ordinary multivibrator, which only outputs pulses, it also responds to a trigger in a metastable state of the circuit, each time causing the circuit to enter a new metastable state. Therefore, if a plurality of consecutive trigger pulses are input at intervals within the metastable period of the circuit, one wide square wave output pulse will be generated. The basic principle of the retrigger multi-circuit is to charge (discharge) a time constant capacitor by a certain amount for each trigger input, and reset the metastable state of the circuit each time. In this embodiment, the time required for one trigger to go from a quasi-stable state to a stable state is set to d. This time d is approximately half or less of the time (=minimum period) allotted to one digit of the recorded digital signal.

The output S _H of this re-trigger multi 8 is input to the trigger input (or clock input) of DFF9,
DFF9 is a well-known flip-flop, and has the ability to read information applied to the data input terminal D when a trigger pulse is applied, and store it at least until the next trigger pulse is applied. In this example, the trigger becomes effective only when the signal S _H falls, and latches the level state of the output S _G of the zero level comparator 5. DFF9
The signal S _I output from the terminal 10 to the terminal 10 is digital information.

Next, the circuit operation of one embodiment will be explained based on the signal waveform diagram shown in FIG. Recorded digital information recorded on recording medium 1 such as magnetic tape
S _A ' is detected by the magnetic head 2 and the amplifier 3
After being electrically amplified (signal S _B ′) by the differentiator circuit 4
signal as the first analog signal
S _C ' is output to mixer 7. The mixer 7 superimposes the AC bias signal S _E from the oscillation circuit 6 on this signal S _C ' to generate a signal S _F as a second analog signal, and inputs it to the zero level comparator 5 . The zero level comparator 5 changes the output level to positive or negative every time the signal S _F crosses the zero level. Since the signal S _F contains a high frequency component, the output level changes frequently between positive and negative levels near the zero level. signal
This relatively high frequency part of S _G is called the frequency part. The other level-like output portions that have relatively little change are classified as level portions. Therefore, as an example, if we refer to the signal S _G corresponding to the series of "0" signals on the rightmost side of the digital waveform shown as S _A ' in FIG. Of course, a frequency section occurs at the beginning and end, but a relatively long section or frequency section also appears in the middle. The same holds true for a series of successive "1" signals, and generally a frequency portion occurs in the middle of a long series of "0" or "1" signals. The level portions on both sides of the long frequency portion are both high level or low level, and a state in which both sides are high and low or low and high does not occur.

The retrigger multi 8 is triggered by a level change of the signal S _G (by rising and falling edges) and outputs a square wave pulse. Moreover, since it is a retrigger type, the square wave pulse falls when a time d has elapsed from the rear end of the frequency section, in other words, from the time of level change corresponding to the rightmost end on the time axis extending rightward in the figure. The fall of this square wave has a significant effect on the DFF 9 at the next stage, and serves as a trigger for the DFF 9. DFF9 latches the level of signal S _H at the time this trigger is activated. DFF9
always inverts its output corresponding to the boundary between "0" and "1" or the boundary between "1" and "0" in the signal S _A '. However, when the signal S _H falls due to a level change on the right side of the long frequency part of the signal S _G (in other words, the rightmost end of the middle frequency part), the latch of DFF9 does not operate and the same result occurs. This will maintain the output level.

Therefore, a digital signal corresponding to the digital information (waveform S _A ') recorded on the recording medium 1 is derived from the output section of the DFF 9, as shown by the signal waveform S _I in FIG.

Note that the first circuit means for outputting the first digital signal (S _G ) is the zero level comparator 5 in the above embodiment. Since this is a comparator, the purpose is to vary the reference voltage and provide versatility, and it is not necessarily set only to the zero level.
It may be a predetermined voltage level near zero level. As mentioned above, the zero-level comparator may be a zero-cross detection circuit as a subordinate concept.

Although the recording medium has been described throughout this specification with magnetic recording media such as magnetic tapes, magnetic disks, magnetic cards, and magnetic drums in mind, the present invention is not particularly limited to magnetic recording media. For example, it goes without saying that the present invention can be similarly applied to a digital signal reproducing circuit system based on photo-electrical conversion by detecting the presence or absence of a hole and its density using light (particularly laser light).

As described above, according to the present invention, a digital signal consisting of a level part and a frequency part is created from a differential signal on which an AC bias signal is superimposed, and a digital signal having a relatively long period of "1" or "0" is produced. Since the digital circuit means is configured so as to make the intermediate frequency part meaningless, even if the digital information has a relatively long inversion section, there will be no reproduction error caused by the differential signal of the information dropping to zero level. This has the effect of reproducing accurate digital information.

The present invention is particularly advantageous in the reproduction of digital information recorded on compact cassettes or microcassettes using the NRZI method.

[Brief explanation of drawings]

Figure 1 is a block diagram of the conventional example, and Figure 2 is the block diagram of the conventional example.
FIG. 3 is a signal waveform diagram of each part of the circuit, and FIG. 3 is an explanatory diagram of the recording method. FIG. 4 is a block diagram of an embodiment of the present invention, and FIG. 5 is a waveform diagram of various parts of the circuit shown in FIG. 1...Magnetic recording medium, 2...Magnetic head, 3...
...Amplifier, 4...Differentiating circuit, 5...Zero level comparator, 6...Oscillator, 7...Addition circuit, 8...
...Retrigger type monostable multivibrator, 9...
D type flip-flop.

Claims (1)

[Claims] 1. Recorded digital information recorded on a recording medium is detected, amplified by an amplifying means, and then differentiated by a differentiating circuit to process a first analog signal obtained. A digital information reproducing circuit configured to reproduce digital information corresponding to the information receives the first analog signal, receives an AC oscillation signal from an oscillation circuit, and superimposes the AC oscillation signal on the first analog signal. an adder circuit that receives the second analog signal and outputs a second analog signal; a first digital signal including a level part having a constant voltage level of either one of the two voltage levels and a frequency part changing between the two voltage levels with a period of the AC oscillation signal; a first circuit means for outputting a signal; and a first circuit means for receiving the first digital signal;
from the predetermined first voltage level to a predetermined second voltage level at the rear end of the level portion of the digital signal, and the second voltage level increases for a predetermined time from the rear end of the frequency portion of the first digital signal. a second circuit means for generating a second digital signal that attains the first voltage level after maintaining the voltage level; and receiving the first digital signal and the second digital signal, third circuit means for outputting and holding a voltage level corresponding to the voltage level of the level portion of the first digital signal when the digital signal changes from the second voltage level to the first voltage level; A digital information reproducing circuit, comprising: deriving the reproduced digital information corresponding to the recorded digital information from the output of the third circuit means. 2. The digital information reproducing circuit according to claim 1, wherein the predetermined time is approximately half the time allocated to one digit of the recorded digital information. 3. The digital information reproducing circuit according to claim 1 or 2, wherein the second circuit means is a retrigger type monostable multivibrator.