JPH0316813B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an audio sentence multiplex broadcasting method that allows different audio sentences to be called up simultaneously from one audio memory and to simultaneously broadcast these sentences on different terminal broadcasting devices. Generally speaking, ADPCM
There are devices that store audio sentences using the (adaptive differential coding modulation) method. The ADPCM method is a PAM signal obtained by sampling an audio sentence at a sampling period T (T = 1/12 × 10 ³ [seconds]) and then quantizing it, and a PAM signal obtained immediately before this PAM signal. It converts the value of the difference between the signal and the signal into a PCM signal.When storing audio sentences using the normal PCM method, a storage capacity of 8 bits is required for each sample, but with this ADPCM method, audio sentences can be stored. In this case, only 4 bits of storage capacity is required per sample. As a method of simultaneously broadcasting different audio sentences on different terminal broadcasting devices using an audio memory storing audio sentences using the ADPCM method, there is a method shown in FIGS. 1 and 2. Figure 1 shows each terminal broadcasting device 2a to 2n.
The purpose is to perform multiplex broadcasting by providing ADPCM decoding circuits 4a to 4n. First, the CPU (central processing circuit) of each terminal broadcasting device 2a to 2n
6a to 6n respectively send memory addresses of the audio memory 8 at which different audio sentences are stored to the audio memory 8 via the address bus 10 in a time-sharing manner. The audio memory 8 sends the ADPCM signals corresponding to these memory addresses to the memory bus 12 in a time-sharing manner.
and sends it to the ADPCM decoding circuits 4a to 4n.
, depending on the timing signals supplied from the CPUs 6a to 6n, the own terminal broadcasting devices 2a to 2
Only what is broadcast on n is decoded as a PCM signal,
It is sent to output circuits 14a to 14n. Next, the output circuits 14a to 14n D/A (digital-to-analog) convert the PCM signal and broadcast it from the speakers 16a to 16n. In the method shown in FIG. 1, an expensive ADPCM decoding circuit 4 corresponding to the number of terminal broadcasting devices 2a to 2n
Since a to 4n are required, as the number of terminal broadcasting devices 2 increases, the entire device becomes expensive. In addition, FIG. 2 shows that one ADPCM decoding circuit 4a is commonly used for each terminal broadcasting device 2a to 2n, and each
Memory addresses are sent from the CPUs 6a to 6n to the audio memory 8 via the address bus 10 in a time-sharing manner, and after all ADPCM signals corresponding to these memory addresses are decoded into PCM signals by the ADPCM decoding circuit 4a, These signals are sent to the memory bus 12, and each terminal broadcasting device 2a to 2n transmits them to the memory bus 12.
Among PCM signals, own terminal broadcasting equipment 2a to 2
The output circuit 14 outputs only what is to be broadcast in accordance with the timing signals supplied from the CPUs 6a to 6n.
a to 14n, and speakers 16a to 16
This is a method of broadcasting from n. In the method shown in FIG. 2, since the ADPCM decoding circuit 4a is commonly used by each terminal broadcasting device 2a to 2n, the number of terminal broadcasting devices 2 that can be connected to one ADPCM decoding circuit 4a is determined by sampling. ADPCM decoding circuit 4a converts the period T (seconds) into one
It cannot be made larger than the value obtained by dividing the decoding time T _O (seconds) required to decode the ADPCM signal to the PCM signal. Therefore, in order to increase the number of terminal broadcasting devices 2, it is necessary to shorten the decoding time T _O (seconds) by configuring the ADPCM decoding circuit 4a with high-speed operation circuit elements. The disadvantage of using elements is that the price of the entire device increases. On the other hand, if the ADPCM decoding circuit 4a is configured with ordinary circuit elements in order to reduce the price, the number of terminal broadcasting devices 2 will be reduced by the decoding time of the ADPCM decoding circuit 4a.
The disadvantage was that it was limited by T _O (seconds). In this invention, for each N terminal broadcasting device,
Let's provide a central processing unit with an ADPCM decoding circuit and P (P≦N) terminal control memories to form one terminal block, connect M terminal blocks in parallel, and broadcast into each terminal control memory. The memory address on the audio memory where the audio sentence is stored and the terminal address of the terminal broadcasting device that performs the broadcast are stored, and each central processing unit calculates a time difference of T/P x M (seconds). It repeatedly calls the P terminal control memories it owns one by one at T/P intervals, and among the memory addresses stored in the recalled terminal control memories, those that have not yet been sent out Furthermore, an ADPCM signal is called by sending the first memory address to the audio memory, and this is decoded by an ADPCM decoding circuit belonging to the same terminal block as the terminal block in the same terminal control memory as the first memory address. By broadcasting on the terminal broadcasting device specified by the address, different audio sentences can be broadcast simultaneously on multiple terminal broadcasting devices without increasing the decoding speed of the ADPCM decoding circuit or increasing the number of ADPCM decoding circuits. The present invention aims to provide a method for multiplex broadcasting of audio and text. The present invention will be explained below based on an embodiment shown in FIGS. 3 to 6. Note that since each of the terminal blocks 20a to 20d has the same configuration, only one terminal block 20a has the same configuration.
The configuration will be explained, and the other symbols will be suffixed with auxiliary symbols b, c, and d, and their explanation will be omitted. In FIG. 3, 20a to 20d are terminal blocks, and the terminal block 20a includes one ADPCM decoding circuit 22a, a timing circuit 24a, a central processing unit 26a, and 32 terminal broadcasting devices 32a, each of which is given a different terminal address. -1 to 32a
-32. Each terminal broadcasting device 32
a-1 to 32a-32 are output circuits 28, respectively.
a and a speaker 30a. These terminal blocks 20a to 20d are interconnected by a system bus 34, a memory bus 36, and an address bus 38, with a host computer 40 connected to the system bus 34, and an audio memory 44 connected to the memory bus 36 via a memory interface 42. and address bus 38. When the host computer 40 needs to broadcast based on a built-in broadcast control program or a control input artificially inserted from the outside,
A sentence number and a clause number that specify the audio sentence to be broadcast, and a terminal broadcasting device 3 that broadcasts this audio sentence.
The terminal addresses 2a-1 to 32d-32 are sent to the system bus 34 as a set of instructions. The central processing unit 26a has 32 terminal control memories 34a-1 to 34a-32 inside, and among the plurality of commands sent by the host computer 40 according to the flowchart shown in FIG. Input only the addresses of the terminal broadcasting devices 32a-1 to 32a-32 in the terminal block 20a, and select the audio memory 44 in which the audio sentences specified by the sentence number and phrase number in this command are stored. One memory address and one terminal address are stored in the terminal control memories 34a-1 to 34a-32.
I have learned to remember it internally. Further, the timing circuit 24a is connected to the central processing unit 2.
6a is terminal control memory 34a-1 to 34a-3
Move one memory address in 2 to voice memory 4
A strobe signal is sent to the ADPCM decoding circuit 22a every time the ADPCM decoding circuit 22a sends out the ADPCM signal 4, thereby causing the ADPCM decoding circuit 22a to take in the ADPCM signal read from the audio memory 44 at this memory address. Furthermore, the timing circuit 24a is connected to the output circuit 32 of the terminal broadcasting devices 32a-1 to 32a-32 that perform broadcasting in response to commands from the central processing unit 26a.
This output circuit 28a sends a control signal only to
is the PCM output from the ADPCM decoding circuit 22a
I am trying to accept signals. Now, when all the terminal control memories 34a-1 to 34d-32 of each central processing unit 26a to 26d are blank, the host computer 40 controls the terminal for broadcasting by external control input or by a built-in program. A plurality of commands consisting of the terminal addresses of the broadcasting devices 32a-1 to 32d-32, text numbers and passage numbers specifying the sentences to be broadcast by these terminal broadcasting devices 32a-1 to 32d-32 were sent to the system bus 34. shall be. Each of the central processing units 26a to 26d, according to the flowchart shown in FIG.
After only the terminal broadcasting devices 32a-1 to 32d-32 in 0a to 20d are taken in, the audio sentence specified by the sentence number and phrase number is stored. A memory address on the audio memory 44 is created, and the memory address and the terminal address are stored as a set in each of the terminal control memories 34a-1 to 34d-32. At the same time, the central processing unit 26a processes the time t _O as shown in FIG. 6 according to the flowchart shown in FIG.
, the first terminal control memory 34a-1 is called, and among the memory addresses stored in this terminal control memory 34a-1, the first memory address that has not been sent yet, that is, the first memory address is called. Sends memory address 50a to address bus 38. The memory address 50a is input to the audio memory 44 via the memory interface 42, and the audio memory 44 sends the ADPCM signal 52a specified by the memory address 50a to the memory address 50a at the timing shown in FIG. Subsequently, it is sent onto the memory bus 36. After the ADPCM signal 52a is sent onto the memory bus 36, the central processing unit 26a generates a strobe signal 54a from the timing circuit 24a and supplies it to the decoding circuit 22a. As a result, the decoding circuit 22a takes in the ADPCM signal 52a, and until the next new ADPCM signal is supplied,
The ADPCM signal 52a is decoded to obtain a PCM signal. Further, the central processing unit 26a decodes the terminal address in the first terminal control memory 34a-1, and specifies the terminal broadcasting device 32a designated thereby.
A control signal is sent to any one of the output circuits 28a from -1 to 32a-32 via the timing circuit 24a. When the decoding circuit 22a sends out the PCM signal, the output circuit 28a supplied with the control signal outputs the PCM signal.
Input the signal, perform D/A conversion, and send it to speaker 3.
Broadcast from 0a. Thereafter, the central processing unit 26a operates from time t _O to T/
The operation of sequentially calling the terminal control memories 34a-1 to 34a-32 at intervals of 32 (seconds) is repeated, and if there are still memory addresses stored in each terminal control memory 34a-1 to 34a-32, The above-described operation is performed for the first memory address that has not yet been sent. Therefore, the terminal control memories 34a-1 to 34
When the operation for the first memory address of a-32 is completed, the central processing unit 26a next processes the second and subsequent memory addresses of each terminal control memory 34a-1 to 34a-32 in the same order at T/32 intervals. Perform the operations described above. Table 1 shows each terminal control memory 34a-1 to 34a.
An example of the sending order of memory addresses in -32 is shown below.

[Table] 5 … 5 5 5 5
5 5 5 5 5

Claims (1)

[Claims] 1 A voice memory that samples a plurality of voice sentences at a sampling period T and stores each sample as a digital signal at each address;
These M terminal blocks constitute N terminal broadcasting devices to which different terminal addresses are assigned, the terminal address of the terminal broadcasting device to be broadcast, and the audio text to be broadcast. a central processing unit having P (P≦N) storage units each storing a memory address on the audio memory corresponding to each of the digital signals to be outputted from the audio memory; In the audio/text multiplex broadcasting device comprising a decoding circuit for decoding, the central processing unit of each terminal block transmits the P storage units it owns at T/P intervals with a time difference of T/P×M from each other. The operation of sequentially calling one by one is repeated, and the first memory address that has not yet been sent among the memory addresses stored in the recalled storage unit is sent, and each of the central processing units After sending out the first memory address, a first control signal is supplied to the decoding circuit in the terminal block to which it belongs, and the digitized signal sent out from the audio memory is decoded by the memory address. With,
An audio text multiplex broadcasting method characterized in that a second control signal is supplied to the terminal broadcasting device specified by the terminal address stored in the called storage unit to broadcast the output of the decoding circuit.