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JPH0318414B2 - - Google Patents
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JPH0318414B2 - - Google Patents

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Publication number
JPH0318414B2
JPH0318414B2 JP54097125A JP9712579A JPH0318414B2 JP H0318414 B2 JPH0318414 B2 JP H0318414B2 JP 54097125 A JP54097125 A JP 54097125A JP 9712579 A JP9712579 A JP 9712579A JP H0318414 B2 JPH0318414 B2 JP H0318414B2
Authority
JP
Japan
Prior art keywords
output voltage
power supply
voltage
resistor
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP54097125A
Other languages
Japanese (ja)
Other versions
JPS5622539A (en
Inventor
Chiharu Saito
Katsumi Kitsushu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9712579A priority Critical patent/JPS5622539A/en
Publication of JPS5622539A publication Critical patent/JPS5622539A/en
Publication of JPH0318414B2 publication Critical patent/JPH0318414B2/ja
Granted legal-status Critical Current

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  • Supply And Distribution Of Alternating Current (AREA)
  • Direct Current Feeding And Distribution (AREA)
  • Control Of Voltage And Current In General (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)

Description

【発明の詳細な説明】 本発明は電源装置に関し、とくに並列接続して
運転される複数の電源ユニツトの出力電圧を切替
えて調整するようにした電源装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power supply device, and more particularly to a power supply device that switches and adjusts the output voltages of a plurality of power supply units connected in parallel and operated.

試験装置に所定レベルの電圧を可変的に印加
し、所要の特性試験を行う場合、電源の電流容量
の関係上、複数の電源ユニツトを並列に接続し、
共通の負荷に電力を供給する必要があり、第1図
は2つの電源ユニツトU1,U2を並列接続し、被
試験装置Rに接続したものである。第1図におい
て、T1は制御トランジスタ、S1は垂下回路、A1
は誤差検出回路、R10は出力抵抗、R11,R12
R13は出力検出用抵抗であつて、電源ユニツトU1
の出力部に設けられた抵抗回路を形成し、E1
基準電圧源、M1は電圧供給源である。電源ユニ
ツトU2も電源ユニツトU1と同様であつて、同等
部分には添字のみを変えて同一符号を付した。
When performing a required characteristic test by variably applying a voltage at a predetermined level to the test equipment, it is necessary to connect multiple power supply units in parallel due to the current capacity of the power supply.
It is necessary to supply power to a common load, and FIG. 1 shows two power supply units U 1 and U 2 connected in parallel and connected to the device under test R. In Figure 1, T 1 is a control transistor, S 1 is a drooping circuit, and A 1
is the error detection circuit, R 10 is the output resistance, R 11 , R 12 ,
R13 is an output detection resistor, and is connected to the power supply unit U1 .
A resistor circuit is formed at the output part of , E 1 is a reference voltage source, and M 1 is a voltage supply source. The power supply unit U2 is also similar to the power supply unit U1 , and the same parts are given the same reference numerals with only the subscripts changed.

前記抵抗R12,R22は出力電圧調整用の可変抵
抗である。P1,P2は一対の出力端子である。ま
た、第2図は第1図の回路の負荷直線を表し、横
軸は負荷に供給される電流値IR、縦軸は負荷に印
加される電圧VRを示し、直線lは負荷直線を表
す。L1は電源ユニツトU1の出力特性を示し、出
力電流値がI1までの間該電源ユニツトU1の出力電
圧値はV1であり、出力電流値がI1以上になると定
電流特性になる。L2は電源ユニツトU2の出力特
性を示し、出力電流領域I1IRI2では出力電圧
が一定値V2となる定電圧領域であり、出力電流
値I2では定電流領域である。
The resistors R 12 and R 22 are variable resistors for adjusting the output voltage. P 1 and P 2 are a pair of output terminals. In addition, Figure 2 represents the load straight line of the circuit in Figure 1, the horizontal axis represents the current value I R supplied to the load, the vertical axis represents the voltage V R applied to the load, and the straight line l represents the load straight line. represent. L 1 indicates the output characteristics of the power supply unit U 1 . Until the output current value reaches I 1 , the output voltage value of the power supply unit U 1 is V 1 , and when the output current value exceeds I 1 , it becomes a constant current characteristic. Become. L2 indicates the output characteristic of the power supply unit U2 , and the output current region I1IRI2 is a constant voltage region where the output voltage is a constant value V2 , and the output current value I2 is a constant current region .

従つて第2図から明らかなように負荷Rを並列
接続された電源ユニツトU1,U2に接続すると、
該負荷Rに供給される電圧は、電源ユニツトU2
の出力特性から決定されV2となり、また負荷に
供給される電流はI3となる。
Therefore, as is clear from Fig. 2, when the load R is connected to the power supply units U 1 and U 2 connected in parallel,
The voltage supplied to the load R is from the power supply unit U 2
V 2 is determined from the output characteristics of , and the current supplied to the load is I 3 .

このように並列接続した電源ユニツトU1,U2
のそれぞれの出力特性が異なるのは、これら電源
ユニツトU1,U2の出力を調整するために前記可
変抵抗R12,R22を同程度に調整する必要があり、
調整誤差に基因するほか、各電源ユニツトの回路
定数の不均一にも基因する。
Power supply units U 1 and U 2 connected in parallel in this way
The reason why the respective output characteristics of
This is caused not only by adjustment errors but also by non-uniformity in the circuit constants of each power supply unit.

そしてこのような電源ユニツトの出力特性が異
なると、例えば負荷変動が生じた場合、つまり第
2図鎖線l′で示す負荷直線になつた場合、該負荷
Rに印加される電圧は電源ユニツトU1の出力特
性L1で決定され、第2図の場合V1となる。この
ように、2個(一に複数個)の電源ユニツトを並
列接続した場合、その出力電圧を調整するためそ
れぞれの電源ユニツトの出力電圧調整用可変抵抗
を1つずつ調整する必要があるほか、各電源ユニ
ツトの出力特性が均一となるようにこれら可変抵
抗を設定する必要があり、そのため調整に従来は
多くの時間と労力が要求されていた。
If the output characteristics of such power supply units differ, for example, when a load fluctuation occurs, that is, when the load becomes a straight line as shown by the dashed line l' in Fig. 2, the voltage applied to the load R will be different from that of the power supply unit U1. It is determined by the output characteristic L 1 of , which is V 1 in the case of Fig. 2. In this way, when two power supply units (more than one at a time) are connected in parallel, in order to adjust the output voltage, it is necessary to adjust the output voltage adjustment variable resistor of each power supply unit one by one. It is necessary to set these variable resistors so that the output characteristics of each power supply unit are uniform, and thus adjustment has conventionally required a lot of time and effort.

本発明はかかる点に鑑みなされたものであつて
複数の電源ユニツトが並列接続されてなる電源装
置の出力電圧を容易に切替え設定できるようにし
た新規な電源装置を提供することを目的とし、出
力部に抵抗回路を具え、該抵抗回路の分割点の出
力電圧に比例した電圧値と、基準電圧とを比較
し、その差異を低減して出力電圧レベルを調整す
るようにした電源ユニツトを複数個共通の一対の
出力端子間に並列接続した電源装置において、前
記一対の出力端子間に切替えスイツチを具えた抵
抗回路を設け、前記電源ユニツトの出力部の抵抗
回路の分割点の電圧値を前記切替えスイツチによ
り切替え設定するようにしたことを特徴とする。
The present invention has been made in view of the above, and an object of the present invention is to provide a new power supply device in which the output voltage of a power supply device in which a plurality of power supply units are connected in parallel can be easily switched and set. A plurality of power supply units are equipped with a resistor circuit in the section, and the voltage value proportional to the output voltage at the dividing point of the resistor circuit is compared with a reference voltage, and the output voltage level is adjusted by reducing the difference. In a power supply device connected in parallel between a pair of common output terminals, a resistance circuit including a changeover switch is provided between the pair of output terminals, and a voltage value at a dividing point of the resistance circuit of the output section of the power supply unit is changed by the changeover. The feature is that the settings can be changed using a switch.

第3図は本発明に係る電源装置の一実施例構成
図であつて、第1図と同等部分には同一符号を付
した。
FIG. 3 is a configuration diagram of an embodiment of the power supply device according to the present invention, and the same parts as in FIG. 1 are given the same reference numerals.

第3図において、Sは切替えスイツチであつ
て、並列接続された2つのリレーRL1,RL2に接
続されたスイツチ端子T1,T2および中立端子T3
に切替え接続するスイツチ切片Pを有する。D1
D2は前記リレーRL1,RL2に並列接続された逆電
圧吸収用ダイオード、E3は前記リレーRL1,RL2
励磁用電源である。rl1,rl2はそれぞれ前記リレ
ーRL1,RL2により励磁を受け開閉するリレー接
片、RV1,RV2は出力電圧設定用抵抗であつて可
変抵抗が用いられている。
In FIG. 3, S is a changeover switch, which has switch terminals T 1 and T 2 connected to two relays RL 1 and RL 2 connected in parallel, and a neutral terminal T 3 .
It has a switch section P which is switched and connected to. D1 ,
D 2 is a reverse voltage absorbing diode connected in parallel to the relays RL 1 and RL 2 , and E 3 is a reverse voltage absorbing diode connected to the relays RL 1 and RL 2 .
This is a power source for excitation. Relay contacts rl 1 and rl 2 are excited by the relays RL 1 and RL 2 to open and close, respectively, and RV 1 and RV 2 are output voltage setting resistors, and variable resistors are used.

次に第3図の回路の動作を説明する。 Next, the operation of the circuit shown in FIG. 3 will be explained.

まず、前記切替えスイツチSが中立状態、つま
りスイツチ切片Pが中立端子T3に接続された状
態の場合、リレーRL1,RL2にはいずれも電源E3
から電流が供給されず、従つてレー接片rl1,rl2
はそれぞれ第3図に示すように閉状態、開状態と
なる。この場合第1および第2の電源ユニツト
U1,U2の出力部の抵抗R16,R26の一端は、リレ
ー接片rl1を介してアースレベルに導かれるので、
これら電源ユニツトU1,U2の誤差検出回路A1
A2の負側入力端子に加わる電圧VAN1,VAN2は、
負荷Rに加わる電圧をVRとすると、各々 VAN1=R15+R16/R14+R15+R16VR VAN2=R25+R26/R24+R25+R26VR となり、これらの電圧が電源ユニツトU1,U2
基準電圧Vrefと比較されて、これら電源ユニツ
トU1,U2の出力電圧値が規定値となるよう誤差
検出回路A1,A2はトランジスタT1,T2を制御す
る。
First, when the changeover switch S is in the neutral state, that is, the switch section P is connected to the neutral terminal T3 , the relays R L1 and R L2 are both connected to the power supply E3.
No current is supplied from the relay contacts rl 1 , rl 2
are in a closed state and an open state, respectively, as shown in FIG. In this case, the first and second power supply units
One end of the resistors R 16 and R 26 of the output section of U 1 and U 2 is led to the ground level via the relay contact rl 1 , so
Error detection circuit A 1 of these power supply units U 1 , U 2 ,
The voltages V AN1 and V AN2 applied to the negative input terminal of A 2 are:
If the voltage applied to the load R is V R , then V AN1 = R 15 + R 16 / R 14 + R 15 + R 16 V R V AN2 = R 25 + R 26 / R 24 + R 25 + R 26 V R , and these voltages are The error detection circuits A 1 and A 2 control the transistors T 1 and T 2 so that the output voltage values of the power supply units U 1 and U 2 become the specified values when compared with the reference voltage Vref of the power supply units U 1 and U 2 . Control.

このようなスイツチSが中立「NORMAL」状
態の時の出力端子P1,P2間の電圧、つまり出力
電圧値VRは第4図の出力特性曲線L1N,L2Nで表
される。
The voltage between the output terminals P 1 and P 2 when the switch S is in the neutral "NORMAL" state, that is, the output voltage value V R is represented by the output characteristic curves L 1N and L 2N in FIG. 4.

負荷直線の傾きに応じて出力端子P1,P2間に
現れる出力電圧は異なり、第4図に鎖線で示した
負荷直線l′の場合、出力電圧VRはVN1となり、負
荷直線lの場合、出力電圧VRはVN2となる。
The output voltage appearing between output terminals P 1 and P 2 differs depending on the slope of the load line. In the case of the load line l' shown by the chain line in Fig. 4, the output voltage V R becomes V N1 , which is equal to the load line l'. In this case, the output voltage V R becomes V N2 .

但し、 VN1=R14+R15+R16/R15+R16Vref VN2=R24+R25+R26/R25+R26Vref である。However, V N1 = R 14 + R 15 + R 16 /R 15 + R 16 Vref V N2 = R 24 + R 25 + R 26 / R 25 + R 26 Vref.

次に、前記切替えスイツチSが「LOW」状態
の時、つまりスイツチ切片Pがスイツチ端子T1
に接続された時、リレーRL1には電源E3から励磁
電流が供給されるため、リレー接片rl1が閉状態
から開状態になる。他方リレーRL2には電源E3
ら励磁電流が供給されないため、リレー接片rl2
は開状態のままであるる。従つて、第1および第
2の電源ユニツトU1,U2の出力部の抵抗R16
R26とアース間にそれぞれ可変抵抗RV1,RV2が直
列に接続された形となるのでこれら電源ユニツト
U1,U2の誤差検出回路A1,A2の負側入力端子に
加わる電圧VAL1,VAL2は負荷に加わる電圧をVR
とすると、それぞれ、 VAL1=R15+R16+2RV1/R14+R15+R16+R2RV1VR VAL2=R25+R26+2RV1/R24+R25+R26+R2RV1VR となり、これらの電圧が、電源ユニツトの基準電
圧Vrefと比較されて、これら電源ユニツトU1
U2の出力電圧が規定値となるよう誤差検出回路
A1,A2はトランジスタT1,T2を制御する。
Next, when the changeover switch S is in the "LOW" state, that is, the switch intercept P is connected to the switch terminal T 1
When the relay R L1 is connected to the relay R L1, the excitation current is supplied from the power source E3 , so that the relay contact R L1 changes from the closed state to the open state. On the other hand, relay R L2 is not supplied with excitation current from power supply E 3 , so relay contact rl 2
remains open. Therefore, the resistance R 16 of the output section of the first and second power supply units U 1 and U 2 ,
Since variable resistors R V1 and R V2 are connected in series between R 26 and ground, these power supply units
The voltages V AL1 and V AL2 applied to the negative input terminals of the error detection circuits A 1 and A 2 of U 1 and U 2 are V R
Then, V AL1 = R 15 + R 16 + 2R V1 /R 14 +R 15 +R 16 +R2R V1 V R V AL2 = R 25 +R 26 +2R V1 /R 24 +R 25 +R 26 +R2R V1 V R , and these voltages is compared with the reference voltage Vref of the power supply unit, and these power supply units U 1 ,
Error detection circuit so that the output voltage of U 2 is the specified value
A 1 and A 2 control transistors T 1 and T 2 .

なお電圧VAL1は次のようにして求められる。 Note that the voltage V AL1 is obtained as follows.

R14=R24、R15=R25、R16=R26とすると、抵
抗R16とR15の接続点の電圧VEは VE=VR(R16/2+RV1)/(R14+R15)/2+R16
2RV1 =VR(R16+2RV1)/R14+R15+R16+2RV1 ……(1) となる。
If R 14 = R 24 , R 15 = R 25 , and R 16 = R 26 , the voltage V E at the connection point of resistors R 16 and R 15 is V E = V R (R 16 /2 + R V1 ) / (R 14 + R15 )/2+ R16 /
2R V1 = V R (R 16 + 2R V1 ) / R 14 + R 15 + R 16 + 2R V1 ...(1).

次に誤差検出回路A1の負側入力端子に加わる
電圧VAL1を求める。
Next, find the voltage V AL1 applied to the negative input terminal of the error detection circuit A1 .

VAL1=(VR−VE)R15/R14+R15VE =(VR−VE)R15/R14+R15+VE(R14+R15)/R14
R15 =VRR15+VER14/R14+R15 ……(2) (2)式に(1)式を代入すると、 VAL1=VRR15+(VRR/R14+R15+R)R14/R14+R15 =VR(R14+R15)(R15+R)/(R14+R15)(R14
+R15+R) =VR(R15+R16+2RV1)/R14+R15+R16+2RV1 (但、R≡R16+2RV1) となる。
V AL1 = (V R − V E ) R 15 / R 14 + R 15 V E = (V R − V E ) R 15 / R 14 + R 15 + V E (R 14 + R 15 ) / R 14 +
R 15 = V R R 15 + V E R 14 /R 14 + R 15 ... (2) Substituting formula (1) into formula (2), V AL1 = V R R 15 + (V R R / R 14 + R 15 +R) R14 / R14 + R15 = V R ( R14 + R15 ) ( R15 +R) / ( R14 + R15 ) ( R14
+R 15 +R) =V R (R 15 +R 16 +2R V1 )/R 14 +R 15 +R 16 +2R V1 (However, R≡R 16 +2R V1 ).

誤差検出回路A2の負側入力端子に加わる電圧
VAL2も同様にして求められる。このようなスイ
ツチSがLOW状態の時の出力端子P1,P2間の電
圧、つまり出力電圧値は第4図の出力特性曲線
L1L,L2Lで表されるように、負荷直線l′の場合、
出力電圧VRはVL1となり、負荷直線lの場合、出
力電圧VRはVL2となる。但し、 VL1=R14+R15+R16+2RV1/R15+R16+2RV1Vref VL2=R24+R25+R26+2RV1/R25+R26+2RV1Vref である。
Voltage applied to the negative input terminal of error detection circuit A2
V AL2 can be found in the same way. When the switch S is in the LOW state, the voltage between the output terminals P 1 and P 2 , that is, the output voltage value, is the output characteristic curve in Figure 4.
In the case of the load line l′, as expressed by L 1L and L 2L ,
The output voltage V R becomes V L1 , and in the case of a load straight line l, the output voltage V R becomes V L2 . However, V L1 =R 14 +R 15 +R 16 +2R V1 /R 15 +R 16 +2R V1 V ref V L2 =R 24 +R 25 +R 26 +2R V1 /R 25 +R 26 +2R V1 V ref .

次に前記切替えスイツチSが「HIGH」状態の
時、つまりスイツチ切片Pがスイツチ端子T2
接続された時、リレーRL2には電源E3から励磁電
流が供給されるため、リレー接片rl2が開状態か
ら閉状態になり、リレーRL1には電源E3から励磁
電流が供給されないため、リレー接片rl1は閉状
態にある。従つて、第1および第2の電源ユニツ
トU1,U2の出力電圧部の抵抗R16,R26に並列に
可変抵抗RV2が接続された形になるので、これら
電源ユニツトU1,U2の誤差検出回路A1,A2の負
側入力端子に加わる電圧VAH1,VAH2は、負荷に
加わる電圧をVRとすると、 VAH1=R15+2(RV2(R16/2))/R14+R15+2
(RV2(R16/2))VR VAH2=R25+2(RV2(R26/2))/R24+R25+2
(RV2(R26/2))VR となり、これらの電圧が電源ユニツトの基準電圧
Vrefと比較されて、これら電源ユニツトU1,U2
の出力電圧が規定値となるよう誤差検出回路A1
A2はトランジスタT1,T2を制御する。
Next, when the changeover switch S is in the "HIGH" state, that is, when the switch contact P is connected to the switch terminal T2 , the excitation current is supplied to the relay RL2 from the power supply E3 , so that the relay contact rL 2 changes from the open state to the closed state, and the relay R L1 is not supplied with excitation current from the power source E 3 , so the relay contact rl 1 is in the closed state. Therefore, since the variable resistor R V2 is connected in parallel to the resistors R 16 and R 26 of the output voltage section of the first and second power supply units U 1 and U 2 , these power supply units U 1 and U 2 The voltages V AH1 and V AH2 applied to the negative input terminals of the error detection circuits A 1 and A 2 in No. 2 are as follows: V AH1 = R 15 + 2 (R V2 (R 16 /2), where VR is the voltage applied to the load. )/R 14 +R 15 +2
(R V2 (R 16 /2)) V R V AH2 = R 25 +2 (R V2 (R 26 /2)) / R 24 + R 25 +2
(R V2 (R 26 /2)) V R , and these voltages are the reference voltage of the power supply unit.
Compared to V ref , these power supply units U 1 , U 2
The error detection circuit A 1 ,
A 2 controls transistors T 1 and T 2 .

なお、ここでは抵抗の並列回路を意味し、下
記の式を簡略化したものである。
Note that this term refers to a parallel circuit of resistors, and is a simplified version of the equation below.

R12/2RV2=R16/2×RV2/R16/2+RV2 R26/2RV2についても同様である。 The same applies to R 12 /2R V2 =R 16 /2×R V2 /R 16 /2+R V2 R 26 /2R V2 .

このようなスイツチSが“HIGH”状態の時電
源ユニツトU1,U2の出力電圧値VRは第4図の出
力特性曲線L1H,L2Hで表されるように、負荷直線
l′の場合、出力電圧VRはVH1、つまり VH1=R14+R15+2(RV2(R16/2))/R15+2(
RV2(R16/2))Vref となり、負荷直線lの場合、出力電圧VRはVH2
つまり、 VH2=R24+R25+2(RV2(R26/2))/R25+2(
RV2(R26/2))×Vref となる。
When the switch S is in the "HIGH" state, the output voltage value V R of the power supply units U 1 and U 2 follows the load straight line as shown by the output characteristic curves L 1H and L 2H in Fig. 4.
l', the output voltage V R is V H1 , that is, V H1 = R 14 + R 15 + 2 (R V2 (R 16 /2)) / R 15 + 2 (
R V2 (R 16 /2)) V ref , and in the case of load line l, the output voltage V R is V H2 ,
In other words, V H2 = R 24 + R 25 + 2 (R V2 (R 26 /2)) / R 25 + 2 (
R V2 (R 26 /2))×V ref .

そして、第4図より明らかなように、出力電圧
値切替えに伴つて出力電圧値V1L,V2L;V1H
V2Hがほぼ相等しくV1LV2L,V1HV2Hとなつて
おり、負荷変動に伴う負荷への供給電圧値の変動
が僅少であるが、これはスイツチSが中立状態に
おいて、各電源ユニツトU1,U2の回路定数が極
めて等しくなるように設定しておけば、出力検出
部の可変抵抗はこれらの電源ユニツトU1,U2
共通に設けられているため、該出力検出部の分割
抵抗の分割点における電圧値は、ほぼ同一となる
ためこれら電源ユニツトU1,U2の出力特性もほ
ぼ等しくなるためである。
As is clear from FIG. 4, as the output voltage values are switched, the output voltage values V 1L , V 2L ; V 1H ,
V 2H are almost equal to each other, V 1L V 2L , V 1H V 2H , and the fluctuations in the voltage supplied to the load due to load fluctuations are slight. If the circuit constants of U 1 and U 2 are set to be extremely equal, the variable resistance of the output detection section is provided in common to these power supply units U 1 and U 2 , so that the output detection section This is because the voltage values at the dividing point of the dividing resistor are almost the same, and the output characteristics of these power supply units U 1 and U 2 are also almost the same.

従つて、前記電源ユニツトU1,U2に共通な可
変抵抗RV1,RV2の抵抗値を調整することにより、
出力電圧検出部における抵抗分圧比をこれら電源
ユニツトU1,U2に対して同時に同一の割合いで
調整できるので、出力電圧値切換えごとにそれぞ
れの電源ユニツトU1,U2個々について出力電圧
調整を行う必要がない。
Therefore, by adjusting the resistance values of the variable resistors R V1 and R V2 common to the power supply units U 1 and U 2 ,
Since the resistance voltage division ratio in the output voltage detection section can be adjusted at the same rate for these power supply units U 1 and U 2 at the same time, the output voltage can be adjusted individually for each power supply unit U 1 and U 2 each time the output voltage value is changed. There's no need to do it.

なお、前述の実施例では直列制御型電源ユニツ
トについて述べたが、本発明はこれに限定され
ず、スイツチングレギユレータについても同様に
適用することができる。
In addition, although the above-mentioned embodiment described a series control type power supply unit, the present invention is not limited to this, and can be similarly applied to a switching regulator.

なおまた本発明は3個以上の並列接続された電
源ユニツトの出力電圧制御にも適用できることは
勿論である。
It goes without saying that the present invention can also be applied to output voltage control of three or more power supply units connected in parallel.

以上の説明から明らかなように本発明に係る電
源装置は複数の電源ユニツトが並列接続されてな
る電源装置の出力電圧を極めて容易に設定できる
利点があり、電子機器の試験装置に用いてとくに
有用である。
As is clear from the above description, the power supply device according to the present invention has the advantage that the output voltage of a power supply device in which a plurality of power supply units are connected in parallel can be set extremely easily, and is particularly useful for use in test equipment for electronic equipment. It is.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電源装置の一実施例構成図、第
2図は電源ユニツトの出力特性を示す図、第3図
は本発明に係る電源装置の一実施例構成図、第4
図は本発明に係る電源装置の出力特性図である。 T1,T2;トランジスタ、A1,A2;誤差検出回
路、S1,S2;垂下回路、R14〜R16,R24〜R26
抵抗、RV1,RV2;可変抵抗、RL1,RL2;リレー、
rl1,rl2;リレー接片、R;負荷、D1,D2;ダイ
オード、S:切替えスイツチ。
FIG. 1 is a block diagram of an embodiment of a conventional power supply device, FIG. 2 is a diagram showing the output characteristics of a power supply unit, FIG. 3 is a block diagram of an embodiment of a power supply device according to the present invention, and FIG.
The figure is an output characteristic diagram of the power supply device according to the present invention. T 1 , T 2 ; Transistor, A 1 , A 2 ; Error detection circuit, S 1 , S 2 ; Drooping circuit, R 14 - R 16 , R 24 - R 26 ;
Resistance, R V1 , R V2 ; Variable resistance, R L1 , R L2 ; Relay,
rl 1 , rl 2 ; relay contact; R; load; D 1 , D 2 ; diode; S: selector switch.

Claims (1)

【特許請求の範囲】 1 一対の出力端子P1,P2間に、出力部抵抗回
路を具え、該抵抗回路の分割点の出力電圧に比例
した電圧値と、基準電圧E1,E2とを比較し、そ
の差異を低減して出力電圧レベルを調整するよう
にした電源ユニツトU1,U2を複数個設け、該複
数個の電圧ユニツトU1,U2を共通の前記一対の
出力端子P1,P2間に並列接続した電源装置にお
いて、 前記出力抵抗回路は、第1の抵抗回路R14
R15,R24,R25と、 該第1の抵抗回路R14,R15,R24,R25に直列
に接続された第2の抵抗回路とを具え、 該第2の抵抗回路は、前記複数個の電源ユニツ
トU1,U2に共有されてなるとともに、 中レベルの出力電圧用抵抗回路R16,R26と、 該中レベルの出力電圧用抵抗回路R16,R26
直列に接続された低レベルの出力電圧調整用可変
抵抗RV1および該低レベルの出力電圧調整用可変
抵抗RV1の両端を短絡可能とする開閉可能な第1
のスイツチ手段RL1,rl1と、 該中レベルの出力電圧用抵抗回路R16,R26
よび低レベルの出力電圧調整用可変抵抗RV1の直
列回路に並列に接続された、高レベルの出力電圧
調整用可変抵抗RV2と開閉可能な第2のスイツチ
手段RL2,rl2との直列接続回路とを具え、 出力電圧を中レベルに設定するときは、前記高
レベル出力電圧調整用可変抵抗RV2を、前記第2
のスイツチ手段RL2,rl2により前記第1の抵抗回
路R14,R15,R24,R25から切離し、 出力電圧を、前記高レベルに設定するときは、
前記高レベルの出力電圧調整用可変抵抗RV2を、
前記第2のスイツチ手段RL2,rl2により、前記第
1の抵抗回路R14,R15,R24,R25に接続すると
ともに、前記低レベルの出力電圧調整用可変抵抗
RV1の両端を前記スイツチ手段RL1,rl1により短
絡し、 出力電圧を前記低レベルに設定するときは、前
記高レベルの出力電圧調整用可変抵抗RV2を、前
記スイツチ手段RL2,rl2により、前記第1の抵抗
回路R14,R15,R24,R25から切離し、かつ前記
低レベルの出力電圧調整用可変抵抗RV1の前記ス
イツチ手段RL1,rl1による短絡を解除することを
特徴とする電源装置。
[Claims] 1. An output resistor circuit is provided between the pair of output terminals P 1 and P 2 , and a voltage value proportional to the output voltage at the dividing point of the resistor circuit, and reference voltages E 1 and E 2 are provided. A plurality of power supply units U 1 and U 2 are provided, and the plurality of voltage units U 1 and U 2 are connected to a common pair of output terminals. In the power supply device connected in parallel between P 1 and P 2 , the output resistance circuit includes a first resistance circuit R 14 ,
R 15 , R 24 , R 25 , and a second resistance circuit connected in series to the first resistance circuits R 14 , R 15 , R 24 , R 25 , the second resistance circuit comprising: It is shared by the plurality of power supply units U 1 and U 2 and is connected in series with the intermediate level output voltage resistor circuits R 16 and R 26 and the intermediate level output voltage resistor circuits R 16 and R 26 . A switchable first variable resistor RV 1 for adjusting the low-level output voltage connected thereto and a switchable first variable resistor RV 1 for short-circuiting the connected variable resistor RV 1 for adjusting the low-level output voltage;
a high-level output connected in parallel to a series circuit of switching means RL 1 , rl 1 , resistor circuits R 16 , R 26 for the medium-level output voltage, and variable resistor RV 1 for adjusting the low-level output voltage; It is equipped with a series connection circuit of a variable resistor RV 2 for voltage adjustment and second switch means RL 2 , RL 2 that can be opened and closed, and when setting the output voltage to a medium level, the variable resistor for adjusting the high level output voltage is used. RV 2 , said second
When disconnecting from the first resistor circuits R 14 , R 15 , R 24 , R 25 by the switch means RL 2 , RL 2 and setting the output voltage to the high level,
The variable resistor RV 2 for adjusting the high level output voltage,
The second switch means RL 2 , rl 2 are connected to the first resistance circuits R 14 , R 15 , R 24 , R 25 and the variable resistor for adjusting the low level output voltage.
When short-circuiting both ends of RV 1 by the switch means RL 1 , rl 1 and setting the output voltage to the low level, the variable resistor RV 2 for adjusting the high level output voltage is connected to the switch means RL 2 , rl 2 , the first resistor circuit R 14 , R 15 , R 24 , R 25 is disconnected, and the short circuit of the low-level output voltage adjusting variable resistor RV 1 by the switch means RL 1 , rl 1 is released. A power supply device characterized by:
JP9712579A 1979-07-30 1979-07-30 Power supply unit Granted JPS5622539A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9712579A JPS5622539A (en) 1979-07-30 1979-07-30 Power supply unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9712579A JPS5622539A (en) 1979-07-30 1979-07-30 Power supply unit

Publications (2)

Publication Number Publication Date
JPS5622539A JPS5622539A (en) 1981-03-03
JPH0318414B2 true JPH0318414B2 (en) 1991-03-12

Family

ID=14183834

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9712579A Granted JPS5622539A (en) 1979-07-30 1979-07-30 Power supply unit

Country Status (1)

Country Link
JP (1) JPS5622539A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2540796B2 (en) * 1985-09-19 1996-10-09 日本電気株式会社 Fault detection method for multiplexed power supply
FR2728407B1 (en) * 1994-12-16 1997-03-14 Sgs Thomson Microelectronics CIRCUIT FOR SELECTING A SUPPLY VOLTAGE OF A VOLTAGE REGULATOR
JP6468758B2 (en) * 2014-08-27 2019-02-13 ルネサスエレクトロニクス株式会社 Semiconductor device

Also Published As

Publication number Publication date
JPS5622539A (en) 1981-03-03

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