JPH0320922B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a carrier wave PDM type amplitude modulation device that performs pulse width modulation (PDM) on a pulse of a predetermined carrier frequency using a modulation signal, extracts the fundamental wave component (carrier wave and its sideband waves), and obtains an amplitude modulated wave.
In particular, the present invention relates to a carrier wave PDM type amplitude modulation device configured using an A/D converter, a digital memory, and a digital counter. There are various conventional methods for performing amplitude modulation, such as a plate modulation method, and the problems with the main methods will be explained below. In the plate modulation method, a modulation voltage corresponding to a modulation signal is superimposed on a plate power supply voltage of a modulated tube to obtain an amplitude modulated wave. FIG. 1 is a diagram showing the basic configuration of a typical plate modulation circuit. In addition to the illustrated vacuum tube, semiconductor elements such as bipolar transistors and field effect transistors are also used as amplifying elements in the plate modulation circuit. Since the plate modulation method requires large components such as a modulation choke and a modulation transformer, which tend to deteriorate modulation characteristics, it is difficult to reduce the size and weight, and it is not easy to obtain good modulation characteristics. Therefore, plate modulation type broadcasting equipment generally requires complicated and large-scale measures such as front-stage modulation, rectification negative feedback, and push-pull modulation. Furthermore, since it is not possible to employ a high-efficiency amplifier circuit such as a class D amplifier circuit in the modulated section and a class C or D amplifier circuit in the modulation section, there is a drawback that the entire device becomes large and the overall efficiency decreases. Furthermore, a subcarrier PDM method is known, which is an improved modulation section of the plate modulation method. FIG. 2 is a diagram showing the basic configuration of a subcarrier PDM circuit. In this method, the digital pulsed subcarrier is first subjected to pulse width modulation (PDM) according to the modulation signal, and then passed through a filter to obtain the superimposed voltage necessary for modulation.The modulated section is essentially a plate modulation method. are essentially the same. Therefore, the modulated section has the same problems as the plate modulation method. FIG. 3 is a diagram showing the basic configuration of a multi-power supply switching type amplitude modulator. This multi-power switching method
This method adds multiple power supply voltages using a digitized modulation signal sent from an A/D converter to obtain a superimposed voltage necessary for modulation. The modulated section is essentially the same as in the plate modulation method. Therefore, problems similar to those of the modulated section of the plate modulation method are observed. Incidentally, if the number of digital bits of the A/D converter is increased in order to improve the modulation characteristics, the multi-power supply section becomes complicated and addition of voltages becomes difficult. FIG. 4 is a diagram showing the basic configuration of a digital synthesis type modulation circuit. This digital synthesis method uses a modulation signal digitized by an A/D converter to synthesize the outputs of power amplifiers according to the weight of each bit, thereby obtaining an amplitude modulated wave.
The digital synthesis method requires the same number of power amplifiers as the number of bits of the digital signal, but with different outputs, so it is difficult to provide redundancy to the amplifiers. Further, in this system, since high-output amplifiers and low-output amplifiers coexist, it is technically difficult to combine the outputs at the correct ratio due to interference from the former to the latter. Furthermore, since a transformer is required for each power amplifier, there is a drawback that modulation characteristics tend to deteriorate. For these reasons, it is difficult to obtain good characteristics with the digital synthesis method, and it is not suitable for size reduction and mass production. As a method for performing carrier PDM type amplitude modulation according to the present invention, for example, a method is known in which a full-wave rectified carrier voltage and a modulation signal voltage are compared to obtain a width-modulated pulse. As an example, FIG. 5 shows a basic configuration diagram described in Japanese Patent Publication No. 52-91345. Although the carrier wave PDM system using this method has essential advantages of the carrier wave PDM system described later, it has the following problems. That is, in the carrier wave PDM method using this method, a distortion-free two-phase sinusoidal carrier wave is required, and the accuracy of the comparator circuit is very strictly required, making it extremely difficult to maintain good modulation characteristics. In particular, the distortion at the valleys of modulation becomes large, and some kind of distortion correction circuit is required. Furthermore, since the comparator circuit has an inherent hysteresis characteristic, some phase modulation (PM) components occur along with pulse width modulation. In this way, the levels of the two-phase sinusoidal carrier wave and the modulation signal are compared by the voltage comparison circuit, and voltage-time conversion is performed.
Conventional methods of signal generation inherently have the drawbacks mentioned above. In addition to the above-mentioned drawbacks, conventional methods for amplitude modulation require some kind of additional circuitry to improve the distortion characteristics of the modulation, resulting in a complex configuration, and they also have the disadvantage that long-term stability is difficult to achieve. be. In view of the above-mentioned points, an object of the present invention is to provide a carrier wave that is capable of reducing the size and weight of the device, increasing efficiency, simplifying the device configuration, simplifying adjustment, and stabilizing the device over a long period of time.
An object of the present invention is to provide a PDM type amplitude modulation device. In order to achieve such an object, the present invention provides an amplitude modulation device that forms a pulse width modulation signal of a predetermined frequency using an analog modulation signal, extracts a fundamental wave component including sidebands due to the modulation, and generates an amplitude modulation signal. , A/D conversion means for converting the analog modulation signal into a digital signal and outputting the digital signal;
The digital output signal of the D conversion means is input as an address signal, compensation digital data having at least an arcsine-shaped nonlinear compensation characteristic is stored in advance, and a corresponding compensation digital signal is output in response to the address signal. an up counter and a down counter that are preset according to the digital output signal from the storage means; and a reset signal and a clock signal having the predetermined frequency and a frequency that is an integer multiple of the predetermined frequency, respectively, to the up counter. and a reset signal generating means and a clock signal generating means for supplying the down counter, and a gate means for synthesizing the outputs of the up counter and the down counter to form the pulse width modulation signal. . Further, in the present invention, in an amplitude modulation device that forms a pulse width modulation signal of a predetermined frequency using an analog modulation signal, and extracts a fundamental wave component including sidebands due to the modulation to obtain an amplitude modulation signal, the analog modulation signal is converted into a digital signal. A/ that converts into a signal and outputs it
m
a storage means that stores in advance two-dimensional digital data in rows and n columns; an address decoder that receives the digital signal and outputs a row address signal corresponding to any row included in the storage means; a shift register that sequentially outputs a column address signal corresponding to any column included in the storage means in synchronization with a clock signal of the storage means; and output means for reading out the pulse width modulated signal from the means. Hereinafter, the present invention will be explained in detail with reference to the drawings. First, the operating principle of the carrier PDM type amplitude modulation device will be explained. Assuming that the width-modulated digital pulse carrier wave has a pulse period of 2π, a pulse height of π, and a pulse width of 2α, consider a pulse as shown in FIG. This pulse is a periodic function with the phase angle θ as a variable, so by Fourier series expansion, (θ)=b ₀ + _∞ 〓 ⁿ⁼¹ bncosnθ …(1) n=1, 2, 3, 4 ...(Natural number) Here, b ₀ = 1/2π∫〓 _- 〓(θ)dθ …(2) = α …(3) Also, b _o = 1/π∫〓 _- 〓(θ)・cosnθdθ …(4) = 2/ nSinnα...(5). Therefore, the pulse shown in FIG. 6 is expressed by equation (1),
From equations (3) and (5), it can also be expressed as (θ)=α+ _∞ 〓 ⁿ⁼¹ 2/nsin nα·cosθ (6). If only the fundamental wave component included in this pulse (that is, the term related to cosθ when n=1) is extracted, 2Sinα·cosθ (7) is obtained, and its amplitude is a function of the pulse width α. Therefore, by changing the pulse width according to the modulation signal, the amplitude of the carrier wave changes, thereby making it possible to perform amplitude modulation. That is,
Based on this principle, it is understood that an amplitude modulated wave can be obtained by width modulating a digital pulse carrier wave according to a modulation signal and extracting only its fundamental wave component. Here, when the modulation signal is v cos pt and the modulation degree is m, the pulse width 2α to be modulated is 2α=2 sin ^-1 {1/2 (1+m cos pt)} (8). Here, it is assumed that the amplitude at the time of no modulation (m=0) is 1/2. In order to perform amplitude modulation using this method, as is clear from equation (8), there must be a sin ^-1
It is necessary to perform a type of voltage-time signal conversion. This conversion characteristic is shown in FIG. For reference, 100%
The values of the pulse width 2α to be modulated corresponding to the peaks and troughs of modulation at the time of modulation and 95% modulation are shown below.

[Table] The present invention realizes voltage-time conversion with such characteristics using a digital method that combines a digital memory and a programmable counter, and performs a voltage comparison between a conventional two-phase sinusoidal carrier wave and a modulation signal. This solves the drawbacks of voltage-to-time conversion. FIG. 8 shows an embodiment of a carrier wave PDM type amplitude modulation device to which the present invention is applied. In this figure, an analog modulated signal applied to a modulated wave input line 102 is converted into a digital signal by an A/D converter 1 and output to an output line 601 of the A/D converter 1, and is stored in a digital memory (ROM). 2 address input. For example, data of sin ^-1 is stored in this digital memory in advance, and by specifying the address of ROM2 with an input signal, a digital signal having width information α converted into sin ^-1 form is transferred to ROM2. is output to the output line 602 of.
By the signal having the width information α output to the output line 602 of the ROM 2, the numbers of the programmable up counter 3 and down counter 4 are set to n(α). The up counter 3 and down counter 4 are reset by carrier frequency pulses, which will be described later, and count clock pulses having a frequency that is an integral number (N) times the carrier frequency. And up counter 3 is
It counts from 0 to n(α) and outputs a first pulse having a width α to the signal line 603. On the other hand, the down counter 4 counts from N to N-n(α) and connects a second pulse signal line 604 having a width α.
After that, both counters stop counting until a reset pulse is applied. The output signals of up counter 3 and down counter 4 are OR
is introduced into the gate 7, and the synthesized signal is sent to the output line 60.
7 appears above. On the other hand, the clock pulse outputted to the output line 605 by the clock pulse oscillator 5 having an oscillation frequency N times the carrier frequency is 1/
It is added to the input of the N frequency divider 6, and outputted to the output line 606 of the 1/N frequency divider 6 as a carrier frequency whose frequency is divided by 1/N. A signal on signal line 606 is applied to the reset input terminal RS of up counter 3 and down counter 4, and both counters 3 and 4 are simultaneously reset every time N clock pulses are received. After being reset, the up counter 3 and down counter 4 start counting again, count according to the designated number, and output. As a result, the logical sum of the signals on the signal line 603 and the signal line 604 becomes a pulse with a width of 2α having no phase modulation component, centered around the reset timing of both the up counter 3 and the down counter 4, and the OR gate 7 Appears on output line 607. Thus, the carrier wave appearing on the output line 607
After the PDM signal is amplified to the required power by the pulse power amplifier 8, it is converted into an amplitude modulated wave through the bandpass filter 9 corresponding to the fundamental wave and its sideband waves, and is sent out from the output terminal 103. FIG. 9 shows the waveform of the analog modulation signal v cos pt supplied to the modulation wave input line 102. The signal waveform of each signal line at point A and point B shown in FIG. 9 will be explained in detail with reference to FIGS. 10 and 11. As shown in Figure 10, in the case where the instantaneous value of the modulated signal is at point A in Figure 9, 1 is 1/
The signal on the output line 606 of the N divider 6 is shown.
2 also shows the output line 60 of the up counter 3.
3, and the point at which the up counter 3 is reset is indicated by an arrow 1. 3 shows a signal on the output line 604 of the down counter 4,
The point at which the down counter 4 is reset is indicated by an arrow 2. 4 shows the signal on the output line 607 of the OR gate 7. As shown in FIG. 11, when the instantaneous value of the modulated signal is at point B in FIG. Indicated by 3. 2 shows the signal on the output line 604 of the down counter 4, and arrow 4 indicates the point at which the down counter 4 is reset. FIG. 3 shows the signal on the output line 607 of the OR gate 7. Further, as a width modulated pulse, the structure and operation of the signal as shown in FIG. 6 have been described so far, but a ternary pulse as shown in FIG. 12 is also useful. The pulse width α to be modulated in this case is given by α=sin ^-1 {1/2 (1+m cos pt)}, and can be realized by changing the basic configuration shown in FIG. 8 using a well-known method. can. As mentioned above, in this embodiment, the carrier wave is
It is possible to obtain the sin ^-1 type conversion characteristics necessary for the PDM method and to perform voltage-time conversion without phase modulation components. In this configuration, instead of analog processing that compares the levels of a two-phase sinusoidal carrier wave and a modulation signal as in the past, digital signal processing is performed using all digital elements, making it easy to design the circuit and obtain predetermined characteristics. Almost no adjustment is required, and stable operation is possible over a long period of time. FIG. 13 shows a second embodiment to which the present invention is applied. That is, this figure shows a circuit that performs nonlinear compensation such as sin ^-1 type after A/D converting an input signal to form a PDM signal without phase change. The main part of this embodiment is ROM (or PROM) 8
11, and this ROM 811 is an m×n bit digital memory consisting of m rows and n columns. Data of "1" is stored in the shaded area in the figure, and the envelope of the spread of the "1" area in the column direction with respect to the row direction is set to, for example, a sin curve. After the input signal 801 is converted into a digital signal by the A/D converter 803, it is supplied to the address decoder 807, where 10 of row numbers 1 to m are determined from the digital value.
Convert to a signal equivalent to a decimal number and write the ROM line number m _L
Select. On the other hand, in the selected m _L row memory column (n bits), for example, m _L
Data is read out to the output circuit 813 in order from the left of the row to the right, and this becomes a PDM signal according to the input signal 801. For example, in a row near the center of memory, it becomes 000…001111…111000…000, and n
It becomes a PDM signal whose duty is the number of "1" bits. Therefore, by setting the envelope of the "1" region in the ROM 811 to be compatible with sin ^-1 type compensation and nonlinear compensation in other amplification systems, it is possible to perform nonlinear compensation and at the same time cause a phase change. It is possible to easily obtain PDM signalling. Note that in the case of a memory with data of "1" as explained in FIG. There is a method of increasing the number of bits by n/2 on both the left and right sides to m×2n bits. on the other hand,
As a method to prevent the number of bits from increasing, in the memory configuration shown in FIG. 13, the memory contents are read out with a clock having twice the frequency, and
A required number of "0"s may be added before and after the read data. Furthermore, the equivalent nonlinearity caused by waveform distortion caused by the linearity and finite bandwidth characteristics of an amplifier such as the pulse power amplifier 8 in FIG. By storing in the digital memory (ROM) 2 together with the sin ^-1 type characteristic, even complicated specific linearity can be compensated for very easily and accurately. In addition, as other embodiments according to the present invention, a modified circuit in which the power amplifying section is omitted, or a counter is used instead of the up counter and the down counter.
A modified circuit that ignores the phase modulation component as a counter, a modified circuit that uses width information to specify both the beginning and end of pulse counting using a counter, AND gates, NAND gates, etc. for processing digital signals, etc. Modified circuits made up of logic circuits, modified circuits made up of other logic circuits such as shift registers instead of counters, modified circuits made up of other logic circuits such as RAM instead of ROM as digital memory, and a combination of ROM and RAM. Many applications are possible, such as a modified circuit in which modulation distortion is compensated for by an additional circuit instead of the basic circuit. These circuits can be modified in various ways by applying well-known circuit techniques in accordance with the basic technical idea of the present invention. As explained above, the carrier wave PDM method using the voltage-time conversion method of the present invention has the following characteristics. (a) All of the main components necessary for amplitude modulation can be constructed from highly reliable digital elements. In particular, by making full use of large-scale integrated circuit technology, it is possible to make it into a single chip, making it suitable for mass production. (b) No additional circuit is required to compensate for modulation distortion. (c) When performing the required power amplification, highly efficient pulse amplification such as class D amplification is possible. Therefore, the amplitude modulation device according to the invention comprises a digital memory, a programmable counter,
Pulse width modulation (PDM) of the carrier frequency pulse can be performed directly without phase modulation components, which not only eliminates the need for any circuitry to correct for modulation distortions, but also reduces the overall device cost. Excellent effects can be obtained, such as reduction in size and weight, high reliability, high efficiency, simplification of device configuration, reduction in cost, and the ability to share and unify the main parts of large and small amplitude modulation devices with different outputs.

[Brief explanation of the drawing]

Fig. 1 is a basic configuration diagram of the plate modulation circuit, Fig. 2 is a basic configuration diagram of the subcarrier PDM circuit, and Fig. 3 is a basic configuration diagram of the subcarrier PDM circuit.
Figure 4 shows the basic configuration of a multi-power supply switching type amplitude modulator, Figure 4 shows the basic configuration of a digital synthesis modulation circuit, and Figure 5 shows the basic configuration of a carrier PDM type modulator based on a comparison of a full-wave rectified carrier wave and a modulation signal. The basic configuration diagram. Figure 6 is a diagram showing a pulse width modulated pulse waveform with a pulse width of 2α. Figure 7 is a diagram showing arcsine (sin ^-1 ) type signal conversion characteristics. Figure 8 is a diagram showing the signal conversion characteristics of an arcsine (sin -1) type. A block diagram showing one embodiment of the present invention, FIG. 9 is a diagram showing the waveform of the modulation signal v cos pt, and FIG. 10 is a diagram showing the waveform of the modulation signal vcospt.
4 and 11. FIGS. 1 to 3 are timing diagrams explaining the operation of the embodiment shown in FIG. 8, FIG. 12 is a diagram showing pulse width modulated three-level pulse waveforms, and FIG. FIG. 3 is a block diagram showing another embodiment of the invention. 1...A/D converter, 2...ROM, 3...
...Up counter, 4...Down counter, 5...
...Clock oscillator, 6...1/N frequency divider, 7...
OR gate, 8... Pulse power amplifier, 9... Band pulse filter, 11... Modulated vacuum tube, 1
2... Modulating vacuum tube (left), 13... Modulating vacuum tube (right), 14... Modulating tube, 15... Modulating input transformer, 16... Modulating transformer, 17... Modulating tube power supply, 18... Target Modulation tube power supply, 19...high frequency bypass capacitor, 21...subcarrier PDM circuit,
22...Low pass filter, 23...Modulated section, 32
...Multi-power supply section, 33...Waveform shaping section, 41,
42, 43, 49...power amplifier, 51...full wave rectifier circuit, 52...comparison circuit, 101...carrier wave input line, 102...modulation wave input line, 103...output line, 201...subcarrier Input line, 401-40
9...Output transformer.

Claims (1)

[Scope of Claims] 1. An amplitude modulation device that forms a pulse width modulation signal of a predetermined frequency using an analog modulation signal, extracts a fundamental wave component including sidebands due to the modulation, and generates an amplitude modulation signal, comprising: A/D conversion means for converting and outputting the digital signal into a digital signal, and a digital output signal of the A/D conversion means is input as an address signal, and compensation digital data having at least an arcsine type nonlinear compensation characteristic is stored in advance. storage means for outputting a corresponding compensation digital signal in response to the address signal; an up counter and a down counter that are preset according to the digital output signal from the storage means; a reset signal generating means and a clock signal generating means for supplying a reset signal and a clock signal each having a frequency that is an integral multiple of a predetermined frequency to the up counter and the down counter; and combining the outputs of the up counter and the down counter. 1. A carrier wave PDM type amplitude modulation device, comprising gate means for forming the pulse width modulation signal. 2. An amplitude modulation device that forms a pulse width modulation signal of a predetermined frequency using an analog modulation signal, and extracts a fundamental wave component including sidebands due to the modulation to obtain an amplitude modulation signal, which converts the analog modulation signal into a digital signal. A/D conversion means for outputting the digital signal; storage means for storing in advance compensation digital data having at least arcsine-shaped nonlinear compensation characteristics as two-dimensional digital data of m rows and n columns; an address decoder that inputs and outputs a row address signal corresponding to any row included in the storage means; and a column address signal corresponding to any column included in the storage means in synchronization with a predetermined clock signal. A carrier wave PDM type characterized by comprising: a shift register that sequentially outputs signals; and output means that reads out the pulse width modulated signal from the storage means in response to the output of the row address signal and the column address signal. Amplitude modulator.