JPH0323960B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a pulse counting circuit that counts input pulses of a plurality of meters with transmitting devices.

[Prior Art] Conventional counting circuits of this type include those shown in FIGS. 1, 2, and 3. The one shown in Figure 1 is a transfer contact (single-pole double-throw contact) of a three-wire pulse transmitter (hereinafter referred to as "pulse transmitter") 1 used in remote water meters, etc.
A pulse counting device 30 that counts input pulses from 1a and 1b (hereinafter referred to as "contacts") is
This is shown in Figure 1 of Publication No.-129879. The movable side of the contact 1a of this pulse transmitting device 1 is connected to the fixed terminal 2a of the switching contact 2, and the movable side of the contact 1b is connected to the fixed terminal 2b via input terminals S, so that the pulse transmitting device 1 is fixed. A power supply 3 is connected to the terminal side, and a mover 2 of the switching contact 2 is connected via the motor 4.
It is connected to c. The number of revolutions of the output shaft of the motor 4 is counted and displayed by a count display mechanism 5, and the mover 2c of the switching contact 2 is rotated by one count before the count display mechanism 5 rotates. It is configured to switch to the other fixed terminal 2b.

In this configuration, assume that the mover 2c of the switching contact 2 is connected to one of the fixed terminals 2a. When the contact 1a of the pulse transmitter 1 is closed by the meter, a closed circuit of the power source 3, the motor 4, the moving element 2c, the fixed terminal 2a, and the contact 1a is formed, and the motor 4 rotates. When the motor 4 rotates by a predetermined amount, that is, one count of the counting display mechanism 5, the mover 2c of the switching contact 2 switches to the other fixed terminal 2b, and no current flows through the motor 4, so the motor 4 stops. , one counting operation of the counting display mechanism 5 is completed.

Next, when the measuring instrument measures a predetermined amount, the contact 1a of the pulse transmitter 1 is opened, and then the contact 1b
When closed, the power source 3, motor 4, mover 2c,
A closed circuit is formed between the fixed terminal 2b and the contact 1b, and by the same operation as above, the count display mechanism 5
A counting operation is performed.

Note that the contacts 1a and 1b are opened and closed differentially, and are configured so that there is no timing when both contacts are turned on at the same time.

In addition, the one shown in FIG. 2 is a step motor 6.
This is a so-called step motor-type counter using a 1.

Furthermore, what is shown in FIG.
(indicate the input terminals of two signal lines from the pulse transmitter 1, respectively), flip-flops 7-1 to 7-n and electronic counters constituting the n-channel pulse counting circuits 30-1 to 30n. 8
-1 to 8-n and buffer circuits 9-1 to 9-
n.

These conventional pulse counting circuits have the following drawbacks.

If the counter is constructed using the motors shown in Figs. 1 and 2, not only will the overall size be increased, but motors 4, 6, etc. will be required, resulting in increased power consumption, and the device becomes large.

In addition, the electronic counter shown in Figure 3 can control power consumption compared to the motor type, but requires counters and 3-state buffer circuits for the number of input points, and signal lines. This makes the circuit complicated and expensive.

Also, if pulses from the single-pole, single-throw contact used in the transmitter of the watt-hour meter, which sends a contact signal according to the usage amount, and pulses from the single-pole, double-throw contact, as described above, coexist. It was not possible to distinguish between the two and count them.

[Summary of the Invention] This invention has been made to eliminate the drawbacks of the above-mentioned conventional ones, and uses a simple configuration combining one presettable shift register, one presettable counter, and furthermore, a memory, etc. Distinguishes the pulse input when single-pole, single-throw contacts (hereinafter referred to as ``A contacts'') and single-pole double-throw contacts (hereinafter referred to as ``C contacts'') coexist, or even from either one of the contacts. The purpose of the present invention is to provide a pulse counting circuit that is compact, highly reliable, and inexpensive, which can perform pulse counting and control power consumption.

[Embodiment of the Invention] FIG. 4 is a block circuit diagram of an embodiment of the invention, and FIG. 5 is a diagram showing memory divisions for one channel of the memory of this embodiment.

In the figure, S1, S2, . This multiplexer 10 is controlled by a control circuit 20 to be described later, and input terminals S1 to Sn are cyclically selected in sequence and the input pulses are transferred to a presettable shift register (hereinafter referred to as
(referred to as a shift register) 11.12
13 is a pulse judgment circuit connected to the output terminal of the shift register 11, 13 is a count condition judgment circuit, and c
This is to determine whether or not input is being alternately received from the two contacts 1a and 1b. 14 is a contact determination circuit, which determines whether the contact of each channel is an A contact or a C contact.
Contact information is written in advance in a memory 19 (described later), and when the multiplexer 10 scans channels, it reads the contact information from the memory 19 and determines whether the input pulse is from the A contact or the C contact. Discern.
15 is a 1-digit (4 bits in this example) presettable counter (hereinafter referred to as "counter"), 16 is a carry circuit, and 17 is a pulse generation circuit, which is used for scanning of the multiplexer 10 and a memory to be described later. It generates 19 read and write timing pulses. 1
8 is a binary counter that divides the frequency of the pulse from the pulse generation circuit 17, and is used to obtain pulses for address switching of the memory 19, which will be described later, and also for address switching of the control circuit 20, which will be described later.

19 is a memory composed of an integrated circuit (IC),
As shown in FIG. 5, n channels of memory sections of 10 digits (4 bits per digit) M1 to M10 are provided for each channel, and are connected to a shift register 11 and a counter 15. 20 is a control circuit that scans the multiplexer 10, switches the multiplexer 10 necessary to select input terminals S1 to Sn, and provides an address switching signal for switching the 1st to 10th digits of the memory 19. , and shift register 11
It is configured to output a read/write mode switching signal for the counter 15, and a digit signal for writing or reading data for one channel into the first digit M1 to the tenth digit M10 of the memory 19. The memory 19 performs address switching in response to an address switching signal, and reads and writes stored contents into the shift register 11 and the counter 15 in accordance with a mode switching signal at the time of address switching, and the first digit M1
~Of the 10th digit M10, the 1st digit M1 is a contact information setting area for determining whether it is an A contact or a C contact.
The distinction between A contact and C contact is written from outside. The second digit M2 is an area for sequentially shifting and storing input pulses, which is one contact information in the case of a C contact, 3
The digit M3 is an area for shifting and storing the input pulse, which is the other contact information in the case of a C contact, and the fourth digit M4 is a count for storing which of the C contacts was turned on during the previous scanning. This is an area for condition judgment, and the 5th digit M5 to 10th digit M10 are used as count data, and the 2nd digit M2 to 4th digit M4 are used for reading/writing data with the shift register 11. is carried out,
Data is read/written to/from the counter 15 from the fifth digit M5 to the tenth digit M10.

Next, the operation of this embodiment will be explained.

Channels No. 1 to No. n of the memory 19 are sequentially selected by the control circuit 20.

Memory 19 corresponding to the selected channel
The contact data with the channel is read out, and the contact determination circuit 14 determines whether the input pulse is an A contact or a C contact.

Next, the output pulses from the pulse generation circuit 17 are counted by the binary counter 18, the address of the memory 19 is advanced by one, and the data of the second digit M2 is selected by the control circuit 20 and read out to the shift register 11.

At the same time, the multiplexer 10 is scanned by the control circuit 20 to select the input terminal S corresponding to the selected channel.

The data written in the shift register 11 is input from the input terminal S selected by the step. An input pulse of "1" or "0" shifts the data by one bit. The shifted data is written back to the original address in memory.

Next, the output pulses from the pulse generation circuit 17 are counted by the binary counter 18,
The address of memory 19 is advanced by one to the third digit.
The data in M3 is read out to the shift register 11, and the operations from step to are repeated. However, if the channel is the one to which the a-contact pulse is input, no pulse is input, so the data in the M3 area of the memory 19 is zero.

At the same time, the pulse determination circuit 12 reads the shifted data of M2 and M3 and determines whether the contact has changed from off to on. In other words, if the channel is a C contact, the pulse generation speed is faster than the operating speed of the contact, so for example, if the data after shifting of the second digit M2 and third digit M3 is "0011", it will turn on multiple times. This prevents an erroneous judgment from being made by determining that the contact is turned on when the bit configuration is set to indicate .

Next, the address of the memory 19 is advanced by one by the binary counter 18, and the address of the memory 19 is incremented by one.
M3 is selected and read out to the shift register 11.

Here, it is configured to shift "1" when one of the c contacts changes from off to on, and shifts to "0" when the other contact changes from off to on, and both contacts 1a ，
When 1b does not alternately change from off to on, the contents of shift register 11 remain unchanged.

Therefore, the two contacts 1a and 1b of the c contact
In the case of normal vision input in which pulses are alternately input from , the data in the third digit M3 of the memory 19 becomes "0101" or "1010" and is written to the original address again. The count condition determination circuit 13 determines whether or not this M3 data is a pulse for normal vision.

If the selected channel is an a contact, this step is not performed.

Next, the address of the memory 19 is advanced by one by the binary counter 18, and the address of the memory 19 is incremented by one.
The fifth digit M5 is selected and read out to the counter 15.

Here, if it is the C contact of the channel, the input pulse determined by the count condition determination circuit 13 to be an input pulse for normal vision is counted up, and if there is a carry, the carry circuit 16
The carry is stored and held in memory 1.
9 is written to the original address.

Further, in the case of an a contact, the same operation is performed except that the input pulse is counted up as it is.

Next, the address of the memory 19 is advanced by one by the binary counter 18, and the address of the memory 19 is incremented by one.
The sixth digit M6 is selected and read out to the counter 15.

Here, if a carry is stored in the carry circuit 16, one pulse is counted up; otherwise, the read data is written to the original address of the memory 19 as is. In this case, if there is a carry, the carry is stored and held in the carry circuit 16.

Thereafter, M7 to M10 are sequentially read out by the counter 15, and the count-up and write operations are repeated.

The counting operation for one channel is thus completed, and the control circuit 20 selects the next channel in the memory 19, and causes the multiplexer 10 to select the corresponding input terminal to start counting operation for the channel.

Note that in the above embodiment, each channel has a 10-digit digit configuration, but it is not limited to this.

Further, in the above embodiment, the pulse determination circuit 1
2. Although the count condition determination circuit 13, contact determination circuit 14, and control circuit 20 are configured by hardware, it goes without saying that they may also be configured by a CPU.

[Effects of the Invention] As described above, the present invention uses a multiplexer to sequentially select a plurality of channels in which a meter having an A contact and a meter having a C contact coexist, and from one or two contacts of the selected channel. The input pulse is input to the shift register, and from the data in this shift register, the on/off state of the two contacts in the case of a c-contact, and the two
It is determined whether a normal pulse is being input from the state in which the pulse is being input alternately from the two contacts, and if it is an A contact, the input pulse is directly counted by a presettable counter, and this count value is calculated for each channel. Since it is designed to write to the memory at the same time, the pulses from multiple meters with transmitters can be sent to either the A contact or the C contact, without increasing the size or power consumption as with conventional motor-type meters. Not only can you count the number of pulses while checking the
Since it is not necessary to provide a counter, a 3-state buffer circuit, etc. for each channel, the circuit configuration and wiring can be simplified, and an inexpensive and highly reliable pulse counting circuit can be obtained.

[Brief explanation of the drawing]

1 to 3 are block diagrams of different conventional pulse counting circuits, FIG. 4 is a block diagram showing an example of a pulse counting circuit according to the present invention, and FIG. 5 is a block diagram of one channel in the counting circuit of FIG. 4. FIG. 2 is an explanatory diagram of an example of memory allocation. 10... Multiplexer, 11... Presettable shift register, 12... Pulse determination circuit,
13...Count condition determination circuit, 14...Contact discrimination circuit, 15...Presettable counter, 19
...Memory, 20...Control circuit. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. The meter is configured to sequentially scan and count pulses input from multiple channels, each consisting of a meter with a transmitter having a single-pole, single-throw contact and a meter with a transmitter having a single-pole, double-throw contact. The pulse counting circuit includes a multiplexer that scans and sequentially selects the plurality of channels, a memory in which the type of contact of each channel, information on the input contact, and counting data are written, and a memory for the channel selected by the multiplexer. A presettable shift register reads the contact type and contact information from the memory, adds the input pulses, and writes the result to the original area of the memory, and the output data of this shift register determines whether the channel is unipolar or bipolar. In the case of a throw contact, there is a means for selecting a normal input pulse from the on/off state of the two contacts and the alternating input state from the two lines, and a means for reading counting data from the memory to determine whether the channel is single. A presettable that counts up normal input pulses when the channel is a pole, double-throw contact, and counts up the input pulses and writes them to the original memory area of the above memory when the channel is a single-pole, single-throw contact. A pulse counting circuit comprising a counter and means for reading and writing data between the memory and the presettable shift register and the presettable counter and for controlling the operation of the device.