JPH0337330B2 - - Google Patents

Description

[Detailed description of the invention]

(Industrial Application Field) The present invention relates to a channel filter used in a demodulation circuit for reproducing received signals having various data rates. (Background of the Invention) In recent years, with the spread of small earth stations, the practical application of business digital communications via satellites has become an urgent issue. Digital communication for business uses the characteristics of the digital system to respond to various demands by varying the speed of data transmitted depending on the type of signal. In this case, a channel filter is required in the synchronous demodulation circuit for reproducing received signals having various data rates, and this channel filter may be constructed as shown in FIG. 4, for example. In FIG. 4, this channel filter includes a demodulation circuit 1 and a carrier regeneration circuit 2 that constitute the demodulation circuit, and n analog low-pass filters 3a and 3 connected in parallel to the output side of the demodulation circuit 1.
b,..., 3n, and A/D converters 4a, 4 connected to the output side of each analog low-pass filter.
b,..., and 4n. The received signal a can take signals of n types of data rates. The signals of each data rate are related to phase shift keying, for example. This received signal a is inputted to a demodulation circuit 1 and a carrier regeneration circuit 2, respectively. The carrier regeneration circuit 2 extracts and regenerates a carrier wave from the received signal a, and outputs the regenerated carrier wave b to the demodulation circuit 1. As a result, in the demodulation circuit 1, the reproduced carrier wave b
The received signal a is demodulated using the phase of the reference phase, and the baseband analog demodulated signal c is passed through n analog low-pass filters 3a, 3b, . . .
Output each to the same 3n. n analog low-pass filters 3a, 3
Since the passbands of b, ..., 3n are set in advance for filtering signals of corresponding data rates, the demodulated signal c, that is, n
The signal at one of the data rates is filtered by a corresponding analog low-pass filter and input to a subsequent A/D converter. The A/D converter 4a generates a sample pulse with a sampling frequency of _f1 , and the A/D converter 4b generates a sample pulse with a sampling frequency of _f2 .
The D converter 4n samples each input signal using a sample pulse having a sampling frequency f _o , converts it into a digital signal, and outputs the digital signal. Here, the sampling frequencies f ₁ , f ₂ , . . . , and f _o are each twice or more the highest frequency of the input signal. (Problems to be Solved by the Invention) However, when constructing a channel filter using a plurality of analog low-pass filters in this way, there are various problems as follows. In other words, to obtain the desired wave characteristics, set the circuit constants of resistance, capacitor, inductance, etc.
Adjustment through actual signal testing is required, but since multiple analog low-pass filters each have different filtering characteristics, it requires a large amount of man-hours.
Poor workability. In addition, circuit elements include resistors, capacitors, coils,
Since it is composed of individual components such as an OP amplifier, characteristics change over time, making it difficult to stably maintain desired filtering characteristics and making it difficult to downsize. Furthermore, since the filtering characteristics of each analog low-pass filter are fixedly set, it lacks flexibility and the types of data speeds that can be processed are extremely limited, making it completely unsuitable for business digital communications. It can be said that The present invention was devised in view of these problems, and its purpose is to provide a channel filter suitable for a reception system for business digital communication that handles signals of a wide variety of data speeds. (Means for Solving the Problems) In order to achieve the above object, the channel filter of the present invention has the following configuration. That is, the channel filter of the present invention is a channel filter that performs filtering processing on a baseband analog demodulated signal of a received signal that can have various data rates; an analog low-pass filter as a pass band thereof; a sampling pulse generator that generates a sampling pulse having a frequency that is more than twice the highest frequency of the demodulated signal; and a sampling pulse generator that samples the demodulated signal that has passed through the analog low-pass filter in accordance with the sample pulse. an A/D converter that converts the digital signal into a digital signal; and a digital low-pass filter array that is cascade-connected to the output stage of the A/D converter and outputs a signal at a desired data rate from the final stage; Each digital low-pass filter in the digital low-pass filter array is externally given a predetermined value m _i (i is the connection order number, m _i is the sampling speed ratio (natural number) of the input and output signals of the i-th digital low-pass filter), and Predetermined value m _i
a band _- limiting section that limits the frequency band of the input signal to 1/2 m _i using filter coefficients selected according to the above; It is characterized by consisting of a sampler that samples and outputs it; and; (Function) Next, the function of the channel filter of the present invention constructed as described above will be explained. The analog low-pass filter performs filtering processing on the baseband analog demodulated signal of the received signal in advance so as not to cause signal distortion during sampling of the A/D converter, and allows the highest frequency band of the demodulated signal to pass through the analog low-pass filter. band. The sample pulse generator generates a sample pulse having a frequency that is twice or more the highest frequency of the demodulated signal, and outputs it to the A/D converter. The A/D converter samples the demodulated signal that has passed through the analog low-pass filter according to the sample pulse and converts it into a digital signal. This A/D converter is followed by, for example, an array of k-stage cascaded digital low-pass filters. Note that if the number of data rates that can be adopted as a received signal is "n", then k<n. If the connection order number of this digital low-pass filter string is i (i = 1, 2, ..., k), and the sampling speed ratio of the input/output signal of the i-th digital low-pass filter is m _i (taking a natural number), each A predetermined value m _i is given to the digital low-pass filter from the outside, and the i-th digital low-pass filter first controls the frequency band of the input signal by using the filter coefficients selected by the band limiter according to the predetermined value m _i . The band is limited to 1/2m _i , and then the sampler converts the output of this band limiter to the input signal frequency.
It is sampled and output using a sample pulse divided by m _i . Therefore, the sampling rate at the output of the final stage is 1/m ₁ ·m ₂ ····m _i ····m _k .
In other words, the predetermined value m _i given from the outside is a so-called thinning value, and the band characteristics are variably controlled according to the data rate of the received signal to be filtered. As a result, the number of digital low-pass filters required is smaller than the number of possible data rates for the received signal. Note that the band limiting section of each digital low-pass filter is composed of an acyclic filter or a cyclic filter. Therefore, according to the channel filter of the present invention,
Predetermined value given to each digital low-pass filter
By appropriately setting m _i , it is very easy to flexibly respond to a wide variety of data rates. In addition, since each digital low-pass filter consists of a digital circuit with the same configuration, it can be implemented as an LSI and can be significantly miniaturized, and it does not use individual parts such as coils that cause characteristic changes due to aging. The filtering characteristics will be maintained stably. Therefore, according to the present invention, it is possible to realize a channel filter suitable for a reception system of business digital communication that handles signals of various data speeds, and the path to the practical application of business digital communication is greatly opened. . (Example) Hereinafter, an example of the present invention will be described with reference to the accompanying drawings. FIG. 1 shows the structure of a channel filter according to an embodiment of the present invention. Components that are the same as those of the channel filter shown in FIG. 4 are given the same names and symbols. This channel filter includes a demodulation circuit including a demodulation circuit 1 and a carrier regeneration circuit 2, an analog low-pass filter 3, an A/D converter 4,
It basically consists of a sample pulse generator 5 and a k-stage cascaded digital low-pass filter array 6. As described above, the received signal a can take signals of n types of data rates. The signals of each data rate are related to phase shift keying, for example. This received signal a is inputted to a demodulation circuit 1 and a carrier regeneration circuit 2, respectively. The carrier regeneration circuit 2 extracts and regenerates a carrier wave from the received signal a, and outputs the regenerated carrier wave b to the demodulation circuit 1. As a result, in the demodulation circuit 1, the reproduced carrier wave b
Demodulation processing is performed on the received signal a using the phase of the baseband as a reference phase, and a baseband analog demodulated signal c is output to the analog low-pass filter 3. The analog low-pass filter 3 receives the demodulated signal c
Filtering is performed on the demodulated signal c using the highest frequency band of the demodulated signal c as its passband. The sample pulse generator 5 generates a sample pulse having a frequency that is twice or more the highest frequency of the demodulated signal, and outputs it to the A/D converter 4. The A/D converter 4 samples the demodulated signal c that has passed through the analog low-pass filter 3 according to the sample pulse and converts it into a digital signal,
It is output to the digital low-pass filter array 6. The digital low-pass filter array 6 consists of k digital low-pass filters connected in series, and each digital low-pass filter is controlled by a predetermined value m _i (i is the connection order number) given from the outside. A signal at a desired data rate is output from the digital low-pass filter 6k at the final stage. This predetermined value m _i
represents the sampling rate ratio of the input and output signals of the i-th digital low-pass filter. Note that k is a number smaller than n, the number of data rates that can be taken as a received signal. Next, each digital low-pass filter will be explained. FIG. 2 shows a digital low-pass filter according to one embodiment of the invention. This digital low-pass filter is connected to a band limiting section 21 (in this embodiment, a so-called acyclic type (Finite)
It consists of an Impulse Response (FIR) filter. ) and a sampler 22. The band limiter 21 includes an M-stage signal delay circuit 211 that delays the input signal OUT _i-1 in units of 1 bit, and a coefficient memory 213 that receives a predetermined value m _i set externally and outputs the tap coefficient of the FIR filter. , signal delay circuit 21
1 and each output of the coefficient memory 213, M multipliers 212 multiply the corresponding outputs.
₁ to 212 _M , and an adder 214 that receives each output of M multipliers 212 ₁ to 212 _M , adds them, and outputs them to the sampler 22.
The output is the input signal OUT _i-1 subjected to band limitation of (input signal frequency)/2m _i . Here, the frequency of the input signal OUT _i-1 is the sampling frequency in the previous stage, for example, in the case of the first digital low-pass filter 6 ₁ , it is the sampling frequency f _s in the A/D converter 4 . In other words, the input signal of the first digital low-pass filter 6 ₁ (supposed to be OUT ₀ ) is band-limited by f _s /2 in the analog low-pass filter 3 and is sampled at the sampling frequency f _s . The signal spectrum of the input signal OUT ₀ is folded by f _s /2, as shown in FIG. 3A. Then, in the band limiting section 21 of this first digital low-pass filter 6 ₁ , f _s /2m ₁
Bandwidth limiting processing is performed, so if m ₁ = 2, then
The output of the adder 214 is as shown in FIG. 3B.
The band is limited to f _s /4. In addition, since the predetermined value m _i is input to the sampler 22, it forms a sample pulse with a frequency of (input signal frequency)/m _i , samples the output of the adder 214 with this sample pulse, and generates a signal with a predetermined sampling rate. Outputs OUT _i . Similarly to the above, in the case of the first digital low-pass filter 6 ₁ , the input signal frequency is f _s and m ₁ =2, so the sampling frequency in the sampler 22 is f _s /2, so the sampling frequency of the sampler 22 is f s /2. The output becomes as shown in FIG. 3C, and it is possible to prevent spectrum overlap, which causes aliasing noise. Note that the input signal frequency of the second digital low-pass filter 6 ₂ in the next stage is f _s /2, which becomes the sampling frequency of 1/m ₂ in the sampler 22, so if m ₂ = 2, the sampling here The frequency will be f _s /4. Therefore, the sampling frequency f _k of the digital low-pass filter 6k at the final stage is f _k =f _s /m ₁ ·m ₂ ····m _i ····m _k , which is the sampling frequency f k of the digital low-pass filter 6k in the final stage. This defines the frequency bandwidth.
In other words, m _i is a so-called thinning value, and it can be seen that by setting each m _i , it is possible to easily handle an extremely wide variety of data speeds with a small number of digital low-pass filters. A specific example will be described below. In FIG. 2, a predetermined value m _i is inputted to the coefficient memory 213 from the outside, and this predetermined value m _i is m _i =
It can take values of 1, 2, 3, . . . . At this time, each value m _i is stored in the coefficient memory 213.
This allows one digital filter to handle multiple sample speed ratios. Note that m _i =1 means that the input signal is output as is since the sampling speed ratio is 1. Now, in each digital low-pass filter, m _i
It is assumed that the following values can be set: =1, 2, 3, 4, and 5. If m _i is too large, the number of taps required will increase, but there is no problem if m _i =5. By cascading two stages of such digital low-pass filters, it is possible to support 5 ² =25 different data rates. For example, some commonly used data rates are:
64kbps, 48kbps, 32kbps, 24kbps, 16kbps,
There are 9.6kbps and 8kbps. The passband of analog low-pass filter 3 is fixed, but if the passband is set to 100kHz to pass the maximum data rate of 64kbps,
The sampling frequency f ₂ of the A/D converter 4 is the second
The predetermined value is 200kHz or more. A channel filter that can handle the above data rate under these conditions can be realized as follows.

【table】

[Table] That is, when the data rate of the received signal is 64 kbps, m ₁ =2 and m ₂ =2, and when it is 48 kbps, m ₁ =3 and m ₂ =2. (Effects of the Invention) As detailed above, according to the channel filter of the present invention, the A/D converter samples the baseband analog demodulated signal of the received signal at a sampling frequency that is twice or more of the highest frequency. A series of digital low-pass filters which are connected in cascade at the subsequent stage and output a signal at a desired data rate from the final stage are provided, and each digital low-pass filter is controlled by appropriately setting the ratio _m of the sampling rate of the input/output signal. Since the band characteristics can be varied according to the data rate of the received signal, when the received signal can have various data rates, it is possible to use fewer digital low-pass filters than the number of data rates. It is possible to easily filter and output signals at various data rates without any adjustment. At this time, since each digital low-pass filter consists of a digital circuit with the same configuration, it can be implemented as an LSI and can be significantly miniaturized, and it is advantageous because it does not use individual parts such as coils that cause characteristic changes over time. The resulting filtering characteristics will be stably maintained. Therefore, according to the present invention, it is possible to realize a channel filter suitable for a reception system of business digital communication that handles signals of various data speeds, and the path to the practical application of business digital communication is greatly opened. .

[Brief explanation of drawings]

FIG. 1 is a block diagram of a channel filter according to an embodiment of the present invention, FIG. 2 is a block diagram of a digital low-pass filter according to an embodiment of the present invention, and FIG. 3 is a representative example of a first digital low-pass filter. Characteristic diagram showing filtering operation of a low-pass filter, No. 4
The figure is a block configuration diagram of a channel filter constructed according to the prior art. 1... Demodulation circuit, 2... Carrier regeneration circuit, 3
... Analog low-pass filter, 4 ... A/D converter, 5 ... Sample pulse generator, 6 ... Digital low-pass filter array, 21 ... Bandwidth limiting section, 22 ... Sampler.

Claims (1)

[Claims] 1 A channel filter that performs filtering processing on a baseband analog demodulated signal of a received signal that can have various data rates; this channel filter is an analog low-pass filter whose passband is the highest frequency band of the demodulated signal. and; a sample pulse generator that generates a sample pulse with a frequency that is at least twice the highest frequency of the demodulated signal; and a sample pulse generator that samples the demodulated signal that has passed through the analog low-pass filter in accordance with the sample pulse and converts it into a digital signal. A/D converter; this A/D converter;
a digital low-pass filter array that is cascade-connected to the output stage of the D converter and outputs a signal at a desired data rate from its final stage; _i (where i is the connection order number and m _i is the sampling speed ratio (natural number) of the input and output signals of the i-th digital low-pass filter) is given, and input using the filter coefficient selected according to the predetermined value m _i Signal frequency band 2m _i
a band limiting section that limits the band to 1/2; a sampler that samples and outputs the output of the band limiting section with a sample pulse that is 1/ _m of the input signal frequency;
A channel filter comprising: