JPH0337763B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a high-output, monolithically integrated circuit operational amplifier.

[Prior art and its problems]

As a configuration of a high-output arithmetic unit, the configuration shown in FIG. 1 is known. That is, it consists of a voltage amplification stage 1 and a current amplification stage 2, and a signal input from input terminals 3 and 4 is amplified by the voltage amplification stage 1, and then amplified by the current amplification stage 2, so that a high output is output from the output terminal 5. It can be extracted as The output is input to a load 6 connected between it and ground potential.
In such a configuration, the voltage amplification stage 1 and the current amplification stage 2 have (+) power supply terminals 11, 21,
(-) power terminals 12 and 22 are provided. A stabilized power supply is used for the power supply for the voltage amplification stage connected to the power supply terminals 11 and 12 in order to improve the characteristics of the operational amplifier, but the power supply for the current amplification stage connected to the power supply terminals 21 and 22 has a small capacity. However, stabilizing the power supply has problems such as high cost and reduced efficiency due to increased loss, which necessitates the use of an unstable power source. On the other hand, in order not to narrow the output dynamic range, the power supply voltage of the current amplification stage 2 is generally selected to be larger than the power supply voltage of the voltage amplification stage 1. Therefore, when this operational amplifier is integrated into one semiconductor chip, the chip substrate is connected to the (-) power supply terminal 22 of the current amplification stage 2. However, if the power supply for the current amplification stage 2 is an unstable power supply, the potential of the (-) power supply terminal 22 may become positive compared to the potential of the (-) power supply terminal 12 due to fluctuations in the power supply, and the potential of the substrate may become the lowest. Since the potential is lost, it is no longer possible to isolate the elements of the integrated circuit, and the integrated circuit no longer functions.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide an operational amplifier integrated into a single chip, which allows the use of an unregulated power supply for a large-capacity power output stage power supply.

[Key points of the invention]

According to the present invention, a voltage amplification stage and a current amplification stage each having a power supply terminal are integrated in a semiconductor body having an N layer on a P-type substrate, and the voltage amplification stage and the current amplification stage each having a power supply terminal are integrated, and the voltage amplification stage and the current amplification stage are integrated into a semiconductor body having an N layer on a P-type substrate. The voltage amplification stage is connected to a first positive power supply terminal and a first negative power supply terminal, and the current amplification stage that receives the output of the voltage amplification stage and amplifies the current is push-pull connected.
Consisting of an NPN transistor and a PNP transistor, the output terminals are connected to the emitters of both transistors, and the second positive power supply terminal is connected to the NPN transistor.
Connect the second negative power supply terminal to the collector of the transistor.
Connect each to the collector of the PNP transistor,
The above object is achieved by connecting the first negative power supply terminal of the voltage amplification stage to the substrate.

[Embodiments of the invention]

FIG. 2 shows an embodiment of the present invention, and parts common to those in FIG. 1 are given the same reference numerals. The current amplification stage is a (+) output stage by NPN transistor 7,
This is a push-pull circuit in which a (-) output stage is formed by a PNP transistor 8, and the mutually connected bases of both transistors are connected to the output terminal 9 of the voltage layer width stage 1. The current amplification stage and the voltage amplification stage are integrated in a semiconductor body having an N layer on a P-type silicon substrate, and the (-) power supply terminal 12 of the voltage amplification stage 1 is connected to the integrated circuit board 10.

FIG. 4 is a schematic diagram showing an example of the cross section of the P-type silicon substrate of the integrated circuit in FIG. The (+) power supply terminal 21 of the amplification stage is connected to the collector layer 301 of the NPN transistor 7. Here, explanation and description of the N ⁺ layer for contact in the collector layer will be omitted. Current amplification stage (-)
The power supply terminal 22 of the PNP transistor 8 is connected to the collector layer 202 of the PNP transistor 8. The base layer 302 of the NPN transistor 7 and the base layer 201 of the PNP transistor 8 are connected to each other and connected to the output terminal 9 of the voltage amplification stage 1, and the output terminal 5 is connected to the emitter layer 303 of each of the NPN transistor 7 and the PNP transistor 8. Connect to 203. The (-) power supply terminal 12 of the voltage amplification stage 1 is the voltage amplification stage 1 here.
For example, it is connected to the emitter layer 103 of an NPN transistor 100 as part of the output stage of the transistor.
Then, the P-type silicon substrate 10 is connected to the (-) power supply terminal 12 of the voltage amplification stage 1.

With this configuration, the potential of the (-) power supply terminal 22 of the current amplification stage becomes the (-) potential of the voltage amplification stage 1.
Even when the voltage drops below the power supply terminal 12, the junction between the base layer 201 and the collector layer 202 of the PNP transistor 8, which is based on the N layer 201 on the substrate, becomes reverse biased. The parasitic diode 15 interposed therebetween is not conductive and acts to maintain electrical isolation of the PNP transistor 8. Therefore, the function as an integrated circuit is not impaired. Furthermore, since the output amplitude of the voltage amplification stage 1 does not exceed the power supply voltage of the voltage amplification stage 1, even when the potential of the output terminal 9 of the voltage amplification stage 1 drops, the (-) power supply terminal 12 of the voltage amplification stage 1 The potential will never drop below the potential of Therefore, the parasitic diode 15 is always non-conductive, and the substrate 10 and the N layer 201 are kept electrically isolated. From the above, PNP transistor 8
The potential of the (-) power supply terminal 22 connected to the collector layer 201 of the voltage amplification stage 1 is
Any potential can be taken regardless of the potential of 2. Therefore, the (+) power supply terminal 21 connected to the collector layer 301 of the NPN transistor 7 and the (-)
Even if an unstable power supply is used for the current amplification stage power supply connected between the power supply terminal 22 and the power supply terminal 22, no problem will occur.

FIG. 3 shows another embodiment in which the current amplification stage is Darlington-connected in order to increase the output current; in this case, the NPN transistor 7 in FIG. two NPN transistors 71 and 72, also connected in reverse Darlington to serve as PNP transistors in place of PNP transistor 8 in FIG.
This uses a PNP transistor 81 and an NPN transistor 82.

FIG. 5 is a schematic diagram showing an example of a cross section of the P-type silicon substrate of the integrated circuit in FIG. 3, and parts common to those in FIG. 4 are designated by the same reference numerals. NPN
Transistors 71 and 72 are formed in one isolation N layer 401 and connected by Darlington to form a PNP
A transistor 81 and an NPN transistor 82 are formed in the respective isolation N layers 501 and 601 to form a reverse Darlington connection. Base layer 404 of NPN transistor 71 and PNP transistor 81
The base layers 501 of the two are connected to each other and to the output terminal 9 of the voltage amplification stage 1. The emitter layer 403 of the NPN transistor 72, the emitter layer 503 of the PNP transistor 81, and the collector layer 603 of the NPN transistor 82 are connected to each other and to the output terminal 5, respectively. The (+) power supply terminal 21 of the current amplification stage is connected to the collector layer 401 of the NPN transistors 71 and 72, and the (-) power supply terminal 22 of the current amplification stage is connected to the emitter layer 603 of the NPN transistor 82. The (-) power supply terminal 12 of the voltage amplification stage 1 serves as a part of the output section of the voltage amplification stage 1, for example, as in FIG.
It is connected to the emitter layer 103 of the NPN transistor 100. Then, the P-type silicon substrate 10 is connected to the (-) power supply terminal 12 of the voltage amplification stage 1 in the same manner as in FIG.

With this configuration, even if the potential of the (-) power supply terminal 22 is lower than that of the (-) power supply terminal 12, the base layer 501-collector layer 502 of the PNP transistor 81 is connected between the base layer 501 and the collector layer 502 as in the case of FIG. Since the current is prevented from occurring, electrical isolation is maintained at all times. Therefore, the function of the integrated circuit is not impaired.

〔Effect of the invention〕

The present invention integrates a voltage amplification stage and a current amplification stage consisting of a push-pull output stage of NPN and PNP transistors in a chip using a P-type semiconductor substrate as a substrate, and furthermore, a (-) power supply terminal of the voltage amplification stage. Since it is connected to the chip board, the following effects are achieved.

Even if there is a voltage fluctuation in the power supply for the current amplification stage, the electrical isolation of the integrated elements is always maintained, so that the function as an integrated circuit can be maintained.

An unregulated power supply can be used as the power supply for the current amplification stage. This eliminates the need to use a large capacity stabilized power supply for integration.

As described above, the integrated circuit operational amplifier, which is advantageous in use, has extremely large effects in terms of cost and efficiency.

[Brief explanation of drawings]

FIG. 1 is a basic configuration diagram of an operational amplifier, FIG. 2 is a configuration diagram of one embodiment of the present invention, FIG. 3 is a configuration diagram of another embodiment, and FIG. 4 is a diagram of the P-type silicon substrate in FIG. 2. FIG. 5 is a schematic diagram showing an example of a cross section of the P-type silicon substrate in FIG. 3. FIG. 1: Voltage amplification stage, 3, 4: Input terminal, 5: Output terminal, 10: Board, 11, 21: (+) power supply terminal,
12, 22: (-) power supply terminal, 7, 71, 72,
82,100: NPN transistor, 8,81:
PNP transistor, 103, 303, 403,
603: N type emitter layer, 203, 503: P type emitter layer, 102, 302, 402, 602:
P-type base layer, 201, 501: N-side base layer, 101, 301, 401, 601: N-type collector layer, 202, 502: P-type collector layer.

Claims (1)

[Claims] 1 A voltage amplification stage and a current amplification stage each having a power supply terminal are integrated in a semiconductor body having an N layer on a P-type substrate, and the voltage amplification stage voltage amplifies a signal input from an input terminal. The current amplification stage is connected to the positive power supply terminal and the first negative power supply terminal of the voltage amplification stage, respectively, and current amplifies the output of the voltage amplification stage. The output terminal is on the emitter of
A second positive power supply terminal is connected to the collector of the NPN transistor, a second negative power supply terminal is connected to the collector of the PNP transistor, and a first negative power supply terminal of the voltage amplification stage is connected to the substrate. An operational amplifier characterized by: