JPH0338609B2 - - Google Patents

Description

Detailed Description of the Invention The present invention includes a plurality of X-axis electrode lines arranged in parallel to extend in the X-axis direction and a plurality of X-axis electrode lines arranged in parallel to extend in the Y-axis direction. This invention relates to a matrix switch configured by orthogonally arranging switches with gaps in between.

This type of matrix switch has conventionally been configured to input and output signals for each X-axis electrode line and Y-axis electrode line, so a very large number of signals corresponding to the total number of each electrode line are required. There is a problem in that wires are required, which not only makes wiring the signal lines troublesome, but also requires a large amount of wiring space, resulting in an increase in overall size.

The present invention has been made in view of the above circumstances, and an object thereof is to be able to reduce the number of required signal lines, thereby simplifying the wiring process of the signal lines, and to reduce the number of signal lines. To provide a matrix switch which has effects such as reducing the wiring space and eliminating the risk of increasing the overall size.

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, 1 and 2 are a first substrate and a second substrate arranged in parallel so that a gap 3 exists between them.
At least one of these substrates, for example, the second substrate 2, is formed of a flexible printed wiring board, and the first substrate 1 is formed of a normal printed wiring board. Reference numeral 4 indicates m wires, for example, 16 X-axis electrode lines, which are arranged in parallel to extend in the X-axis direction on the first substrate, and 5, which are arranged in parallel to extend in the Y-axis direction on the second substrate. For example, 16 n wires are arranged so as to be orthogonal to the X-axis electrode wire 4 through the gap 3.
These are the Y-axis electrode lines of the book, and each of these electrode lines 4 and 5 is formed by etching or printing means. 6 is a spacer formed on the first substrate 1 by printing means or the like;
A gap 3 between the substrate 1 and the second substrate 2 is maintained. Incidentally, instead of the spacer 6, a film having holes at least at each intersection of the X-axis electrode line 4 and the Y-axis electrode line 5 may be provided.

In FIG. 2, in order to distinguish the 16 X-axis electrode lines 4, _the symbols 4 ₁ , 4 ₂ . 5 ₁ , 5 ₂ , ..., 5 ₁₆ are added for convenience of explanation. In this figure 2, 7 ₁ , 7
₂ ,...,7 ₁₆ are m 16 first X-axis terminals formed on the first substrate 1, and these first X-axis terminals 7
₁ , 7 ₂ , ..., 7 ₁₆ are 16 resistors 8 formed on the first substrate 1 by printing means etc. (see Fig. 1)
are connected to one end of the X-axis electrode wires 4 ₁ , 4 ₂ , . _. . 9 ₁ , 9 ₂ ,…,
Reference numeral 9 ₁₆ denotes m 16 second X-axis terminals formed on the first substrate 1, and these second X-axis terminals 9 ₁ , 9 ₂ ,
..., 9 ₁₆ are connected to the other ends of the X-axis electrode wires 4 ₁ , 4 ₂ , ..., 4 ₁₆ through 16 resistors 10 formed on the first substrate 1 by printing means or the like. are connected to each other. 11 ₁ , 11 ₂ , ..., 11 ₁₆ are n 16 first Y-axis terminals formed on the second substrate 2, and these first Y-axis terminals 11 ₁ , 11 ₂ , ..., 1
1 ₁₆ is connected to one end of the Y-axis electrode wires 5 ₁ , 5 ₂ , ..., 5 ₁₆ through 16 resistors 12 formed on the second substrate 2 by printing means or the like. It is connected. 13 ₁ , 13 ₂ , ..., 13 ₁₆ are n 16 second Y-axis terminals formed on the second substrate 2, and these second Y-axis terminals 13 ₁ , 13 ₂ , ..., 13 ₁₆
are connected to the Y-axis electrode lines 5 ₁ , 5 ₂ , respectively through resistors 14 formed on the second substrate 2 by printing means or the like.
..., 5 are connected to the other ends of _16, respectively. Therefore, the first X-axis terminals 7 ₁ , 7 ₂ , ..., 7 ₁₆ are 4
The first signal lines 15a, 15b, 15c, 15 are divided into four groups, each group being one group, and are provided corresponding to each group 7A, 7B, 7C, 7D.
It is connected to d. In addition, the second X-axis terminal 9 ₁ ,
9 ₂ ,..., 9 ₁₆ are the respective first X-axis terminal groups 7A, 7B,
By extracting one terminal from each group corresponding to 7C and 7D and combining them, it is divided into four groups of four terminals each, and each of the second X-axis terminal groups 9A and 9
The second section provided corresponding to B, 9C, and 9D
are connected to signal lines 16a, 16b, 16c, and 16d. On the other hand, the first Y-axis terminal 11 ₁ , 1
1 ₂ ,..., 11 ₁₆ are divided into 4 groups with 4 pieces in each group, and each group 11A, 11B, 11C, 1
A third signal line 1 provided corresponding to each 1D
7a, 17b, 17c, and 17d. In addition, the second Y-axis terminals 13 ₁ , 13 ₂ ,..., 13 ₁₆
are the respective first Y-axis terminal groups 11A, 11B, 11C,
By extracting one terminal from each group corresponding to 11D and combining them, the terminals are divided into four groups of four terminals each, and each second Y-axis terminal group 13A, 13
B, 13C, and 13D are connected to corresponding fourth signal lines 18a, 18b, 18c, and 18d, respectively. Then, the first substrate 1, the second substrate 2, the X-axis electrode lines 4 ₁ to 4 ₁₆ , and the Y
Axial electrode wires 5 ₁ to 5 ₁₆ , resistors 8, 10, 12, 14,
First signal lines 15a to 15b, second signal line 16
a to 16d, third signal lines 17a to 17d, fourth
A matrix switch 19 is constituted by the signal lines 18a to 18d.

Therefore, each of the first, second, third and fourth signal lines 15a to 15d, 16a to 16d, 17a
~17d and 18a~18d are connected to the positive power supply terminal +V through separate pull-up resistors 20, respectively. Further, 21 is a decoder consisting of a so-called dual 2-line to 4-line decoder, and has input terminals Pa ₁ , Pa ₀ , Pb ₁ , Pb ₀ and output terminals Qa ₀ , Qa ₁ , Q ₂₂ , Qa ₃ , Qb ₀ , Qb ₁ , Qb ₂ ,
The input/output relationship (truth value) between Qb ₃ is as shown in FIG. Input terminal of such decoder 21
Pa ₁ , Pa ₀ , Pb ₁ , Pb ₀ are microcomputer 2
2 to 4 bit scanning signal Sa is “0000”
In this case, the least significant bit of the scanning signal Sa is input to the input terminal _Pb0 , and the most significant bit of the scanning signal Sa is input to the input terminal _Pa1 . Then, the output terminals of the decoder 21 Qa ₀ , Qa ₁ , Qa ₂ ,
Qa ₃ is the first signal line 15a, 15b, 15, respectively
c, 15d, and the output terminals Qb ₀ , Qb ₁ , Qb ₂ , Qb ₃ of the decoder 21 are respectively connected to the second signal line 16
a, 16b, 16c, and 16d.
On the other hand, the third signal lines 17a, 17b, 17c, 1
7d are comparators 23a, 23b, 23, respectively.
The fourth signal lines 18a, 18b, 18c, 18d are connected to the respective non-inverting input terminals (10) of the signals 24a, 24b, 24c, 24d, respectively.
It is connected to each non-inverting input terminal (10) of d. The comparators 23a, 23b, 23c, 23d,
24a, 24b, 24c, and 24d are provided to receive the divided voltage from the voltage dividing circuit 25 at their respective inverting input terminals (1), and at their respective output terminals.
P ₁ a, P ₁ b, P ₁ c, P ₁ d, P ₂ a, P ₂ b, P ₂ c, and P ₂ d are connected to the positive power terminal +V via pull-up resistors 26, respectively.

Next, the operation of the above configuration will be explained. Now, when the scanning signal Sa of "000" is given to the input terminals Pa ₁ , Pa ₀ , Pb ₁ , Pb ₀ of the decoder 21, as is clear from FIG.
1 outputs a "0" level signal only from its output terminals Qa ₀ , Qb ₀ , and the other output terminals Qa ₁ , Qa ₂ ,
"1" level signals are now output from Qa ₃ , Qb ₁ , Qb ₂ , and Qb ₃ , and therefore the potential of the X-axis electrode line ₄₁ , which receives "0" level signals at both ends, is at "0" level, that is, low. level, and each potential of the X-axis electrode lines 4 ₂ , 4 ₃ , 4 ₄ , 4 ₅ , 4 ₉ , 4 ₁₃ receives a “1” level signal at one end and a “0” level signal at the other end. At the middle level, the remaining X-axis electrode wire 4
₆ , 4 ₇ , 4 ₈ , 4 ₁₀ , 4 ₁₁ , 4 ₁₂ , 4 ₁₄ , 4 ₁₄ , 4
Each potential of ₁₅ , 4 and ₁₆ becomes high level. Further, when the scanning signal Sa of "0001" is given to the input terminals Pa ₁ , Pa ₀ , Pb ₁ , Pb ₀ of the decoder 21, the decoder 21 outputs the output terminals Qa ₀ , Qb ₁
Since a "0" level signal is output from only the X-axis electrode line 42, the potential of only the X-axis electrode line ₄₂ becomes low level. Similarly, the input terminals Pa ₁ , Pa ₀ ,
In each case where scanning signals Sa of "0010" to "1111" are given to Pb ₁ and Pb ₀ , respectively, the potential of only one of the X-axis electrode lines 4 ₃ , 4 ₄ , ..., 4 ₁₆ is It is at a low level. FIG. 4 shows a flowchart of a subroutine for reading the ON state of the matrix switch 19 by the microcomputer 22.
This will be explained together with the details of the second operation. First, the second board 2
For example, the X-axis electrode line 4 ₂ and the Y-axis electrode line 5 ₉
An example will be described in which the electrode wires 4 ₂ and 5 ₉ are brought into contact with each other by pressing the portion corresponding to the intersection of the electrode wires 4 2 and 5 9 . In this case, the microcomputer 22 outputs a scanning signal Sa of " ₀₀₀₀ " in the "output" step ( _a ) _{shown in} FIG. . Then, as described above, only the X-axis electrode line 4 ₁ exhibits a low level, but since all the Y-axis electrode lines 5 ₁ to 5 ₁₆ are in a non-contact state with respect to this X-axis electrode line 4 ₁ , the
1 Y-axis terminal 11 ₁ ~ 11 ₁₆ and 2nd Y-axis terminal 13 ₁ ~
Each potential of 13 _{to 16} is raised to a high level by the positive power supply terminal +V. Therefore, the third signal lines 17a-17b and the fourth signal lines 18a-1
Since each potential of 8d also exhibits a high level, comparators 23a to 23d and 24a to 24d all output "1" level signals. At this time, the microcomputer 22 inputs the comparator 2 in the "input" step (b) after the "output" step (a).
The outputs of 3a to 23d are converted into a 4-bit data signal Sb.
and comparators 24a to 24.
The output of d is also read as a 4-bit data signal Sc, and then the process moves to the discrimination step (c). In this discrimination process (c), the Y-axis electrode lines 5 ₁ to ₅ are connected to the X-axis electrode line (in this case, the ₁₆ is the data signal whether it is touched or not
The determination is made based on whether or not Sb and Sc contain a "0" bit. That is, the comparators 23a~
Data signals Sb from 23d and 24a to 24d,
When each bit of Sc is all "1", it is determined as "NO", and in any other case, it is determined as "YES".
In this case, as mentioned above, the comparators 23a to
All outputs of 23d and 24a to 24d are "1"
It is a level signal, and since the signal "1111" is given as the data signal Sb and Sc, "NO"
It is determined that If the determination is "NO" in this way, the process jumps to the determination step (E), and in this determination step, it is determined whether the scanning signal Sa is "1111" or not. Since Sa is "0000", it is determined as "NO". If the determination step (e) yields "NO", the process moves to the "count up" step (f). In this "count up" step (F), the scanning signal Sa is counted up and outputted. Therefore, in this case, the scanning signal Sa of "0000" is outputted, and this "count up" step is performed.
After step (f), the process returns to the "input" step (b). However, as mentioned above, the scanning signal Sa of "0001"
When is output, only the X-axis electrode line ₄₂ becomes low level. Then, the potential of the Y-axis electrode line 5 ₉ that is in contact with the X-axis electrode line 4 ₂ falls to a low level, and as a result, the potential of the first Y-axis electrode line 5 ₉ connected to the Y-axis electrode line 5 9 via the resistor 12 A third signal line 17c corresponding to the first Y-axis terminal group 11C including the terminal ₁₁₉ and a second Y-axis terminal group including the second Y-axis terminal ₁₃₉ connected to the Y-axis electrode line ₅₉ via the resistor 14. Each potential of the fourth signal line 18a corresponding to 13A falls to a low level. Then, the outputs of the comparators 23c and 24a are inverted to the "0" level, so in the input step (b), the data signal Sb of "1101" and the data signal Sc of "0111" are read into the microcomputer 22, and the slave Then, in the next determination step (c), the determination is ``YES'', and the process moves to the "calculation" step (d). This "calculation"
In step (d), the scanning signal at this point
Sa, that is, based on "0001", it is detected that switching is being performed on the X-axis electrode line ₄₂ , and Y It is detected by the shaft electrode wire ₅₉ that switching is being performed, and the switching position of the matrix switch 19 is thus determined. In this case, the data signal Sb "1101" causes the Y-axis electrode lines 5 ₉ , 5 ₁₀ , 5 ₁₁ , corresponding to the first Y-axis terminal group 11C.
5 It is found that switching is being performed on any one of _{the 12} wires, and the data signal "0111" is detected.
By Sc, the Y corresponding to the second Y-axis terminal group 13A
Since it can be seen that switching is performed by any one of the axial electrode wires 5 ₁ , 5 ₅ , 5 ₉ , 5 ₁₃ ,
As a result, it can be determined that switching is being performed on the Y-axis electrode line ₅₉ .

After the switching position of the matrix switch 19 has been determined in this way, the following steps are performed: determination step (e) → "count up" step (f) → "input" step (b) → determination step (c) → determination The program is executed cyclically in the order of steps (e), and when the determination step (e) finally becomes "YES" (in other words, when the scanning signal Sa has counted up to "1111"), the matrix switch is activated. One operation for reading the ON state of No. 19 is completed. Even if the matrix switch 19 is switched at a position different from the above, the switching position can be determined by the same operation as described above.

According to the present embodiment described above, the first to fourth signal lines 15a to 15d, 16a to 16d, 1
It is sufficient to provide a total of 16 signal lines, 7a to 17d and 18a to 18d, compared to the conventional configuration (if there are 16 X-axis electrode lines and 16 Y-axis electrode lines, a total of 32 signal lines are required in the past). The number can be significantly reduced. The degree of reduction in the number of signal lines becomes more noticeable as the number of X-axis electrode lines and Y-axis electrode lines increases, and an example thereof is shown in FIG. Furthermore, according to this embodiment, when the resistors 8, 10, 12, and 14 are formed on the first and second substrates 1 and 2 by printing means, their formation is easy and inexpensive. This can reduce the overall cost increase.

According to the present invention, as is clear from the above description, first and second substrates are arranged in parallel so that a gap exists between them, and at least one of the substrates is flexible, and m X-axis electrode lines arranged in parallel to extend in the X-axis direction on the first substrate; n Y-axis electrode lines arranged in parallel to extend in the Y-axis direction on the second substrate; In a matrix switch constructed by orthogonally arranging the signals through the air gap, the number of required signal lines can be reduced, thereby simplifying the wiring process of the signal lines, and It is possible to achieve excellent effects such as reducing the wiring space and eliminating the risk of increasing the overall size.

[Brief explanation of the drawing]

The drawings show one embodiment of the present invention; FIG. 1 is a vertical cross-sectional view of the main parts, FIG. 2 is a diagram showing the overall electrical configuration, and FIG. 3 is a diagram showing the input/output relationship of the decoder. , Fig. 4 is a flowchart for explaining the action, Fig. 5
The figure is a diagram for explaining the difference from the conventional configuration. In the figure, 1 is the first substrate, 2 is the second substrate, 3 is the gap, 4, _{4 1} to 4 ₁₆ are the X-axis electrode lines, 5, 5 ₁ to 5
₁₆ is the Y-axis electrode wire, 7 ₁ to 7 ₁₆ is the first X-axis terminal, 8,
10, 12, 14 are resistors, 9 ₁ to 9 ₁₆ are second X
Axis terminals, 11 ₁ to 11 ₁₆ are first Y-axis terminals, 13 ₁ to 1
3 ₁₆ is the second Y-axis terminal, 15a-15d are the first signal lines, 16a-16d are the second signal lines, 17a-
17d is a third signal line, 18a to 18d are fourth signal lines, 19 is a matrix switch, and 21 is a decoder.

Claims (1)

[Claims] 1. First and second substrates are arranged in parallel so that a gap exists between them, at least one of which is flexible, and the substrates are arranged in parallel to extend in the X-axis direction on the first substrate. m X-axis electrode lines and n Y-axis electrode lines arranged in parallel to extend in the Y-axis direction on the second substrate are orthogonally arranged through the gap, The matrix switch is configured such that the X-axis electrode line and the Y-axis electrode line come into contact with each other in response to deformation caused by a pressing operation of the first substrate or the second substrate.
m first X-axis terminals and n connected to one end of each of the axis electrode wire and the Y-axis electrode wire via a resistor, respectively
m first Y-axis terminals are provided, and m second X-axis terminals and n second
2 Y-axis terminals are provided, the first X-axis terminals are divided into a plurality of groups, and each group is provided with a first
The second X-axis terminals are extracted one by one from each group corresponding to each group of the first X-axis terminals and combined to divide the second X-axis terminals into a plurality of groups, and each group is divided into two or more groups. dividing the first Y-axis terminal into a plurality of groups and connecting each group to a third signal line provided correspondingly; The second Y-axis terminals are extracted one by one from each group corresponding to each group of the first Y-axis terminals and combined to divide the second Y-axis terminals into a plurality of groups, and each group is provided correspondingly. the fourth signal line, and then
The contact position is determined based on the voltage output state from the first Y-axis terminal and the second Y-axis terminal when each of the first X-axis terminal and the second X-axis terminal is sequentially scanned using a voltage signal. A characteristic matrix switch.