JPH0338672B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an amplitude extraction circuit for a digital data reproduction signal, and more particularly to an amplitude extraction circuit used in evaluating the quality of a digital data reproduction signal.

(Prior art) In recent years, various information signals have been recorded as digital data in order to achieve high-quality recording and reproduction of information signals.
Reproduction or transmission is widely practiced.
A typical example is a digital audio disk that records and reproduces audio signals using pulse code modulation (PCM) or the like.

FIG. 1A is a diagram showing an example of a digital data reproduction signal, and FIG. 1B is a diagram showing a digital signal obtained from the digital data reproduction signal shown in FIG. 1A.

Here, for example, if digital data recorded on a recording medium is reproduced by a predetermined method and a digital data reproduction signal as shown in FIG. 1A is obtained,
Using this digital data reproduction signal and the reference value (threshold value) indicated by a in FIG. 1A, a digital signal as shown in FIG. 1B can be obtained, but in the above-mentioned reproduction process, For example, if an abnormality or defect occurs in the reproduction system or the recording medium, the amplitude of the digital data reproduction signal (indicated by b in Figure 1A) is determined based on the threshold value indicated by a in Figure 1A. may become smaller. In such a case,
When obtaining the digital signal shown in FIG. 1B from the digital data reproduction signal, errors may occur due to the influence of noise and the like.

That is, by measuring the amplitude of the digital data reproduction signal and evaluating the quality of the digital data reproduction signal, it is possible to determine whether there is an abnormality or defect in the recording medium.

(Problems to be solved) Therefore, as a conventional method for evaluating the quality of digital data reproduction signals reproduced from recording media,
The superiority or inferiority of the digital data reproduction signal is determined by extracting the peak value (the maximum amplitude value in the positive direction with respect to the reference level) and the trough value (the maximum amplitude value in the negative direction with respect to the reference level) etc. of the digital data reproduction signal using a predetermined method. I found a way to evaluate it.

However, in the above-mentioned digital audio disk, especially in the CD format, there is a limit on the reversal interval of the digital signal recorded when recording the digital signal on the recording medium.In other words, the minimum reversal interval of the digital recording signal is set to 3T ( T is the time interval of 1 bit during digital data transmission), and the maximum inversion interval is set to 11T. As shown in FIG. 2, the top (indicated by c in FIG. 2) and the bottom (indicated by d in FIG. 2) during the period of reversal interval 3T, and the top (indicated by d in FIG. There is a method of evaluating the quality of the digital data reproduction signal using the amplitude of the digital data reproduction signal at the position where the value is the value of the trough (indicated by e in FIG. 2) and the bottom (indicated by f in FIG. 2).

Note that FIG. 2 is a diagram for explaining the temporal position of a signal from which data for evaluating the quality of a digital data reproduction signal is extracted.

In addition, in order to perform evaluation using the above method, the digital data reproduction signal is sampled and held at regular intervals, the sampled and held signals are converted from analog to digital, and then predetermined digital signal processing is performed and the sampled and held signals are sampled and held. It was necessary to sequentially search the amplitudes of the individual signals and extract the amplitudes of the digital data reproduction signal at predetermined timings (for example, the temporal positions of the peak value and the trough value in the above-mentioned inversion intervals 3 and 11T).

However, when the frequency band of the digital data reproduction signal is wide, it is necessary to perform the above-mentioned sample hold and analog-to-digital conversion at high speed, and the equipment that performs these at high speed is complex and expensive. It had some problems.

Therefore, the present invention extracts the amplitude of a digital data reproduction signal at a temporal position where a predetermined period has elapsed from the temporal position at which the digital signal corresponding to the reproduced digital data signal is inverted, with a relatively simple configuration and at low cost. An object of the present invention is to provide an amplitude extraction circuit for a digital data reproduction signal.

(Means for Solving the Problems) In order to solve the above-mentioned problems, the present invention converts a digital data reproduction signal reproduced from a recording medium on which digital data is recorded into a digital signal corresponding to a reference value of a predetermined level. A detection circuit to convert and N types of inversion intervals T ₁ , T ₂ , ..., T _N corresponding to the digital data reproduction signal containing the amplitude to be extracted.
(However, 0<T ₁ ≦T ₂ ≦…≦T _N ) from the inversion position of the digital signal to the temporal position where the amplitude of the digital data reproduction signal is to be extracted, S ₁ , S ₂ ,…,
If the period S _N (0<S ₁ ≦S ₂ ≦…≦S _N ) is smaller than the inversion interval of the digital signal output from the detection circuit, that is, Sa<Ta (however, a=1, 2,
..., N), the above-mentioned S ₁ , S ₂ , ..., Sb (where b≦
N) a circuit that outputs a first control signal at each temporal position after a period of time has elapsed; a first sample and hold circuit that samples and holds the digital data reproduction signal according to the first control signal; and the detection circuit. N types of second numbers corresponding to the digital data reproduction signal to be extracted when the inversion interval of the digital signal outputted from the digital signal is the same as the inversion interval of the digital signal corresponding to the digital data reproduction signal including the amplitude to be extracted. No.(N+1)
a determination circuit that outputs a control signal of N types, and a determination circuit that outputs a control signal of
The present invention provides an amplitude extraction circuit for a digital data reproduction signal, which includes second to (N+1)th sample and hold circuits that sample and hold the output signal of the first sample and hold circuit in response to a control signal of +1). .

(Example) In explaining an embodiment of the amplitude extraction circuit for a digital data reproduction signal according to the present invention, the following describes an example of the circuit applied to the case of evaluating the quality of the digital data reproduction signal of the digital audio disk described above. An example will be explained below.

FIG. 3 is a block system diagram of an embodiment of the amplitude extraction circuit for a digital data reproduction signal according to the present invention, and FIGS. 4A to 4P are the amplitude extraction circuit for a digital data reproduction signal according to the present invention shown in FIG. FIG. 3 is a diagram for explaining the operation of one embodiment of the present invention.

However, FIG. 4 shows the time interval between the intersections of the digital data reproduction signal and the above-mentioned threshold (the inversion interval of the digital signal corresponding to the digital data reproduction signal, hereinafter abbreviated as the inversion interval of the digital data reproduction signal). ) shows the signal waveform at 3T and 11T.

Before explaining the configuration of one embodiment of the amplitude extraction circuit for the digital data reproduction signal according to the present invention with reference to FIG. interval:
3T to 11T), therefore, the digital data reproduction signal has an inversion interval of 3T, 4T,
There are a total of nine types of signals: ..., 10T, 11T.

In addition, the amplitude of the digital data reproduction signal to be extracted is as shown in FIG.
There are a total of four types of amplitudes, the peak value and the trough value, during the 11T period. Therefore, 1.5T and
The amplitude of the digital data reproduction signal at the temporal position of 5.5T is extracted.

In FIG. 3, 1 is a signal input terminal, 2 is a detection circuit, 3 is a counter circuit, 4, 5, 6, 7 are decoders, 8 is an OR circuit, 9 is a first sample and hold circuit, 10 is a judgment circuit, 11, 12, 13, 1
4 is second, third, fourth, and fifth sample and hold circuits, and 15, 16, 17, and 18 are output terminals.

4A is a diagram showing a digital data reproduction signal input to the signal input terminal 1, FIG. 4B is a diagram showing a digital signal obtained from the digital data reproduction signal shown in FIG. 4A, and FIG. Figure C shows the signal output from the decoder 4, Figure 4 D shows the signal output from the decoder 5, Figure 4 E shows the signal output from the decoder 6, and Figure 4 F. is a diagram showing the signal output from the decoder 7, FIG. 4G is a diagram showing the first control signal, and FIG.
Figure H shows the signal output from the sample and hold circuit 9, Figure 4I shows the second control signal, and Figure 4J shows the sample and hold circuit 11.
FIG. 4K is a diagram showing the third control signal, FIG. 4L is a diagram showing the signal output from the sample and hold circuit 12,
FIG. 4M shows the fourth control signal, FIG. 4N shows the signal output from the sample and hold circuit 13, FIG. 4O shows the fifth control signal, and FIG. 4P 2 is a diagram showing a signal output from the sample hold circuit 14. FIG.

The signal input terminal 1 has a digital data reproduction signal with an inversion interval of 3T to 11T, including a digital data reproduction signal with an inversion interval as shown in FIG. 4A (as described above, a digital data reproduction signal with an inversion interval of 3T and 11T). A signal is input.

This digital data reproduction signal is supplied to the detection circuit 2, which performs predetermined signal processing, and outputs, for example, a digital signal as shown in FIG. 4B and a clock signal synchronized with this digital signal. .

The digital signal and clock signal output from the detection circuit 2 are supplied to a counter circuit 3. The counter circuit 3 measures the period from inversion to inversion of the supplied digital signal, and also supplies a predetermined signal to the decoders 4, 5, 6, 7 when inversion occurs.

Decoders 4, 5, 6, 7 are shown in Fig. 4 C, D, E,
As shown in F, 1.5T, 5.5T, 3T,
A pulse of H level (for example, high voltage level) is output at a temporal position after a period of 11T has elapsed.

Note that the decoders 4, 5, 6, and 7 revert to FIG. 4B before the above-mentioned periods of 1.5T, 5.5T, 3T, and 11T elapse from the temporal position where the digital signal shown in FIG. 4B is inverted. When the digital signal shown in FIG.
It is configured to output an H level pulse at a temporal position after a period of 11T has elapsed. In other words,
An H-level pulse is output only when the inversion interval of the digital signal shown in FIG. 4B is longer than the time interval at which the decoders 4, 5, 6, and 7 output H-level pulses.

The outputs of decoders 4 and 5 shown in Figure 4C and D are
It is supplied to the OR circuit 8. Therefore, the OR circuit 8 outputs a pulse as shown in FIG. 4G (1.5T from the temporal position where the digital signal shown in FIG. 4B is inverted).
Figure 4 C and D output from the decoders 4 and 5 as H level pulses at the time position where 5.5T has elapsed.
A pulse obtained by calculating the logical sum of the pulses shown in is output, and this pulse is sent to the sample hold circuit 9 as the first pulse.
is supplied as a control signal. Note that the decoders 4 and 5 and the OR circuit 8 described above are elements constituting a circuit that outputs the first control signal.

Further, the sample and hold circuit 9 is supplied with a digital data reproduction signal as shown in FIG. 4A from the signal input terminal 1, and therefore the sample and hold circuit 9 outputs a signal as shown in FIG. 4H. do.

In other words, the first control signal as shown in FIG. 4G output from the OR circuit 8 is 3T, 11T.
When a digital data reproduction signal arrives with an inversion interval of A
This serves as a control signal for sample-holding in the sample-hold circuit 9 at the temporal position where the amplitude of the digital data reproduction signal becomes the peak value or the trough value. Therefore, the signal output from the sample and hold circuit 9 has the amplitude of the peak value or the bottom value of the digital data reproduction signal shown in FIG. 4A when the inversion intervals of the digital signal shown in FIG. 4B are 3T and 11T. It becomes a signal.

Furthermore, the pulses shown in E and F in FIG. 4 that are output as H-level pulses from the decoders 6 and 7 at the time positions 3T and 11T have elapsed from the time position at which the digital signal shown in FIG. 4B is inverted are determined. circuit 10
is input.

The determination circuit 10 uses, for example, a gate circuit or the like to determine whether the falling edges of the pulses 3T and 11T shown in FIGS. 4E and F coincide with the temporal position at which the digital signal inverts as shown in FIG. 4B. Only in this case, pulses as shown in FIG. 4 I, K, M, and O, which will be described later, are output.

That is, it is determined whether the inversion interval of the digital signal shown in FIG. 4B is 3T or 11T, and further,
At this time, by determining the level of the digital signal shown in FIG. 4B, it is also determined whether the digital data reproduction signal shown in FIG. 4A is in a period including a peak value or a period including a trough value. .

Specifically, when the inversion interval of the digital signal shown in FIG. 4B is 3T and the digital data reproduction signal shown in FIG. 4A includes the bottom value, the pulse (second control) shown in FIG. signal) is supplied to the sample hold circuit 11, and when the inversion interval of the digital signal shown in FIG. 4B is 3T, the signal shown in FIG.
During the period in which the digital data reproduction signal shown in FIG.
sample and hold circuit 1
2, the inversion interval of the digital signal shown in FIG. 4B is 11T, and during the period in which the digital data reproduction signal shown in FIG. 4A includes the bottom value, the pulse as shown in FIG. control signal) is supplied to the sample-and-hold circuit 13, and during the period in which the inversion interval of the digital signal shown in FIG. 4B is 11T and the digital data reproduction signal shown in FIG. 4A includes the peak value, the period shown in FIG. 4O is shown. A pulse like this (fifth control signal) is supplied to the sample hold circuit 14.

Further, signals as shown in FIG. 4H outputted from the sample and hold circuit 9 are supplied to sample and hold circuits 11, 12, 13, and 14, respectively.

The inversion interval of the digital signal shown in Figure 4B is 3T.
If the digital data reproduction signal shown in FIG. 4A within this interval includes a trough value, the sample hold circuit 11 outputs the data from the sample hold circuit 9 according to the second control signal shown in FIG. 4I. The signal shown at H is sampled and held, and the signal shown at J in FIG. 4 is outputted from the output terminal 15. The signal shown in FIG. 4J is the digital data reproduction signal shown in FIG. 4A at a time position 1.5T after the time position at which the digital signal shown in FIG. The fourth sample and hold circuit 9
The signal shown in Figure H is further processed by the sample and hold circuit 1.
1, that is, the reversal interval of the digital data reproduction signal shown in Figure 4A.
This is the signal of the amplitude of the trough value during the 3T period.

Similarly, the sample hold circuit 12
The signal shown in FIG. 4H outputted from the sample-and-hold circuit 9 is sampled and held by the third control signal shown in FIG.

In other words, the signal output from the output terminal 16 becomes a signal having the amplitude of the peak value during the inversion interval 3T of the digital data reproduction signal shown in FIG. 4A.

The inversion interval of the digital signal shown in Figure 4B is 11T.
If the digital data reproduction signal shown in FIG. 4A within this interval includes a trough value, the sample hold circuit 13 outputs the data from the sample hold circuit 9 according to the fourth control signal shown in FIG. 4M. The signal shown at H is sampled and held, and the signal shown at N in FIG. 4 is output from the output terminal 17. The signal shown in FIG. 4M is the digital data reproduction signal shown in FIG. 4A at a time position 5.5T after the time position at which the digital signal shown in FIG. The fourth sample and hold circuit 9
The signal shown in Figure H is further processed by the sample and hold circuit 1.
The inversion interval of the signal sampled and held in step 3, that is, the digital data reproduction signal shown in Figure 4A.
This is the signal of the amplitude of the trough value in the period of 11T.

Similarly, the sample hold circuit 14
The signal shown in FIG. 4H outputted from the sample-and-hold circuit 9 is sampled and held by the fifth control signal shown in FIG.

In other words, the signal output from the output terminal 18 becomes a signal having the amplitude of the peak value during the inversion interval 11T of the digital data reproduction signal shown in FIG. 4A.

As mentioned above, the sample and hold circuit 11,
Output terminals 15, 16, 17, and 18 connected to output terminals 12, 13, and 14 have inversion intervals of digital data reproduction signals shown in FIG.
The trough value, peak value, and reversal interval at 3T are
A signal having the amplitude of the digital data reproduction signal shown in FIG. 4A at the bottom value and the rise value at 11T is output.

Therefore, by measuring the amplitude of the signals output from the output terminals 15, 16, 17, and 18 using a fixed level as a reference and evaluating the quality of the digital data reproduction signal, it is possible to check whether there is an abnormality or defect in the digital audio disk. can be determined.

In addition, in the description of the claims of the above embodiment, N=4, T ₁ = T ₂ = 3 [T], T ₃ = T ₄ = 11 [T], S ₁ = S ₂ = 1.5 [T] , S ₃ = S ₄ = 5.5 [T], and in a period where the inversion interval of the digital signal corresponding to the digital data reproduction signal is 3T (11T), 1.5T from the inversion position of this digital signal
(5.5T) This configuration samples and holds the digital data reproduction signal at the temporal position that has elapsed, that is, the temporal position of the amplitude of the peak value or the trough value, which is the center of the period of the reversal interval of 3T of the digital signal, and outputs it. be. However, the present invention is not limited to the above-mentioned embodiments, and the present invention is not limited to the above-mentioned embodiments. It is also possible to sample and hold the sample and output it.

Further, in the above embodiment, an example in which the present invention is applied to a digital audio disk has been described, but it goes without saying that the present invention is not limited to the above embodiment and can be applied to digital signal processing in general.

(Effects of the Invention) Since the present invention has the above-mentioned configuration, it is possible to use the present invention with a relatively simple configuration and at low cost to determine the time that has elapsed for a predetermined period from the temporal position at which the digital signal corresponding to the reproduced digital data signal is inverted. This method has the advantage that the amplitude of the digital data reproduction signal can be extracted at a specific position.

[Brief explanation of drawings]

Figure 1A is a diagram showing an example of reproduced digital data, Figure 1B is a diagram showing a digital signal obtained from the reproduced digital data shown in Figure 1A, and Figure 2 is an evaluation of the quality of the digital data reproduction signal. FIG. 3 is a block system diagram of an embodiment of the digital data reproduction signal amplitude extraction circuit according to the present invention, and FIGS.
P is a diagram for explaining the operation of one embodiment of the digital data reproduction signal amplitude extraction circuit according to the present invention shown in FIG. 3, and FIG. FIG. 4B is a diagram showing a digital signal obtained from the digital data reproduction signal shown in FIG. 4A, FIG. 4C is a diagram showing a signal output from the decoder 4, and FIG. 4D
is a diagram showing the signal output from the decoder 5, the fourth
Figure E is a diagram showing a signal output from the decoder 6,
4F is a diagram showing the signal output from the decoder 7, FIG. 4G is a diagram showing the first control signal, FIG. 4H is a diagram showing the signal output from the sample hold circuit 9, Figure I is a diagram showing the second control signal, Figure 4 J is a diagram showing the signal output from the sample and hold circuit 11, and Figure 4 K is a diagram showing the second control signal.
4 shows the third control signal, FIG. 4 L shows the signal output from the sample and hold circuit 12, FIG. 4 M shows the fourth control signal, and FIG. 4 N shows the sample and hold circuit. FIG. 4O is a diagram showing the fifth control signal, and FIG. 4P is a diagram showing the signal output from the sample and hold circuit 14. 1... Signal input terminal, 2... Detection circuit, 3...
Counter circuit, 4, 5, 6, 7...decoder, 8
...OR circuit, 9...First sample hold circuit, 10...Inversion circuit, 11, 12, 13, 14
...Second, third, fourth, fifth sample and hold circuits, 15, 16, 17, 18...Output terminals.

Claims (1)

[Scope of Claims] 1. A detection circuit that converts a digital data reproduction signal reproduced from a recording medium on which digital data is recorded into a digital signal corresponding to a reference value of a predetermined level; N types of inversion intervals T ₁ corresponding to the data reproduction signal,
T ₂ ..., T _N (however, 0<T ₁ ≦T ₂ ≦...≦T _N ) from the inversion position of the digital signal to the temporal position at which the amplitude of the digital data reproduction signal should be extracted.
If the period S ₁ , S ₂ , ..., S _N (0<S ₁ ≦S ₂ ≦ ...≦S _N ) is smaller than the inversion interval of the digital signal output from the detection circuit, that is, Sa<Ta ( however,
a=1, 2, ..., N), the above-mentioned S ₁ , S ₂ , ..., existing between the inversion position of the digital signal output from the detection circuit and the next inversion position
a circuit that outputs a first control signal at each temporal position after a period Sb (where b≦N); and a first circuit that samples and holds the digital data reproduction signal using the first control signal.
and a digital data reproduction signal to be extracted when the inversion interval of the digital signal output from the sample hold circuit and the detection circuit is the same as the inversion interval of the digital signal corresponding to the digital data reproduction signal containing the amplitude to be extracted. a determination circuit that outputs N types of second to (N+1) control signals corresponding to the determination circuit; and a determination circuit that outputs N types of second to (N+1) control signals corresponding to the determination circuit; An amplitude extraction circuit for a digital data reproduction signal, comprising second to (N+1)th sample and hold circuits that sample and hold an output signal of the circuit.