JPH0338733B2 - - Google Patents
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- Publication number
- JPH0338733B2 JPH0338733B2 JP61280591A JP28059186A JPH0338733B2 JP H0338733 B2 JPH0338733 B2 JP H0338733B2 JP 61280591 A JP61280591 A JP 61280591A JP 28059186 A JP28059186 A JP 28059186A JP H0338733 B2 JPH0338733 B2 JP H0338733B2
- Authority
- JP
- Japan
- Prior art keywords
- oxidation
- film
- resistant film
- opening
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Element Separation (AREA)
- Local Oxidation Of Silicon (AREA)
Description
【発明の詳細な説明】
[発明の目的]
(産業上の利用分野)
本発明は半導体装置の製造方法に関するもの
で、特に素子分離法に使用されるものである。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to a method for manufacturing a semiconductor device, and is particularly used in an element isolation method.
(従来の技術)
従来、半導体集積回路の素子分離には選択酸化
法が用いられていた。この選択酸化法を第4図な
いし第6図を用いて説明する。(Prior Art) Conventionally, a selective oxidation method has been used for element isolation of semiconductor integrated circuits. This selective oxidation method will be explained using FIGS. 4 to 6.
まず第4図に示すようにシリコン基板11を熱
酸化してパツド酸化膜12を例えば900Å成長さ
せる。その後シリコン酸化膜13を例えば3000Å
堆積する。次いで第5図に示すように写真蝕刻法
によつてシリコン窒化膜13をパターニングして
開口部を設ける。次いで第6図に示すようにシリ
コン窒化膜13を耐酸化膜として、選択酸化を行
ない、酸化膜14を例えば8000Å成長させ、その
後シリコン窒化膜13をRIE(反応性イオンエツ
チング)によつて除去して、素子分離用のフイー
ルド酸化膜が完成した。 First, as shown in FIG. 4, a silicon substrate 11 is thermally oxidized to grow a pad oxide film 12 of, for example, 900 Å. After that, the silicon oxide film 13 is formed to a thickness of, for example, 3000 Å.
accumulate. Next, as shown in FIG. 5, the silicon nitride film 13 is patterned by photolithography to form openings. Next, as shown in FIG. 6, selective oxidation is performed using the silicon nitride film 13 as an oxidation-resistant film to grow an oxide film 14 of, for example, 8000 Å, and then the silicon nitride film 13 is removed by RIE (reactive ion etching). A field oxide film for device isolation was completed.
(発明が解決しようとする問題点)
従来技術であるLOCOS法は、素子分離技術と
して半導体技術にひろく用いられている。しか
し、いわゆる「バーズビーク」のため素子分離領
域の微細化の障害となつている。そのため、耐酸
化膜である窒化膜厚を厚くすればバーズビークを
おさえることができるが、窒化膜は非常に硬質で
その膜厚が厚すきると、窒化膜開口部のエツジ部
でのシリコン基板へのストレスが大きくなり、シ
リコン基板11に結晶欠陥が入つてしまうという
問題が起きてくる。また窒化膜開口部が微細化し
てくると、バーズビーク形成のため、フイールド
酸化膜が窒化膜開口部での酸化剤不足のため、フ
イールド膜減りする問題もおこつている。(Problems to be Solved by the Invention) The LOCOS method, which is a conventional technique, is widely used in semiconductor technology as an element isolation technique. However, the so-called "bird's beak" is an obstacle to miniaturization of element isolation regions. Therefore, bird's beak can be suppressed by increasing the thickness of the nitride film, which is an oxidation-resistant film, but the nitride film is very hard and if it becomes too thick, the edges of the nitride film openings may form on the silicon substrate. The problem arises that the stress increases and crystal defects are introduced into the silicon substrate 11. Furthermore, as the openings in the nitride film become finer, a problem arises in which the field oxide film is reduced due to the lack of oxidizing agent in the openings of the nitride film due to the formation of bird's beaks.
本発明は上記実情に鑑みてなされたもので、バ
ーズビークを抑えかつ半導体基板の結晶欠陥のな
い微細化可能な選択酸化法を有した半導体装置の
製造方法を提供しようとするものである。 The present invention has been made in view of the above-mentioned circumstances, and it is an object of the present invention to provide a method for manufacturing a semiconductor device using a selective oxidation method that suppresses bird's beak and allows miniaturization without crystal defects in a semiconductor substrate.
[発明の構成]
(問題点を解決するための手段と作用)
本発明は、耐酸化膜パターンのエツジ部のみを
薄くし、その他の領域を厚くすることで、半導体
基板にかかるストレスを極少化して結晶欠陥を防
ぎかつバーズビークを抑える。そのために半導体
基板上の第1の薄い耐酸化膜(窒化膜等)上に、
耐酸化膜削除時に削除しにくい物質膜を介して厚
い第2の耐酸化膜を堆積し、該膜をパターニング
後、該膜の開口より狭くした開口で第1の耐酸化
膜をパターニング後、フイールド酸化するもので
ある。[Structure of the Invention] (Means and Effects for Solving the Problems) The present invention minimizes the stress applied to the semiconductor substrate by thinning only the edge portion of the oxidation-resistant film pattern and thickening the other regions. to prevent crystal defects and suppress bird's beak. For this purpose, on the first thin oxidation-resistant film (nitride film, etc.) on the semiconductor substrate,
A thick second oxidation resistant film is deposited through a material film that is difficult to remove when removing the oxidation resistant film, and after patterning this film, the first oxidation resistant film is patterned with an opening narrower than the opening of the first oxidation resistant film. It oxidizes.
(実施例)
以下図面を参照して本願の第1及び第2の発明
の実施例を説明する。第1図は本発明に至る前の
例で、第1図aに示される如くシリコン基板21
を酸化して、パツド酸化膜22を例えば500Å成
長させ、その上に第1の窒化膜23を1000Å堆積
し、その後CVD SiO2膜(CVDによるSiO2膜)
24を500Å堆積する。次に第1図bに示すよう
に第2の窒化膜25を堆積し、その上にレジスト
膜26を設けてこれをパターニング後、CDE(等
方性ドライエツチング)で等方的に第2の窒化膜
25をエツチングパターニングする。このとき窒
化膜25はレジスト26の開口エツジ付近の下ま
でエツチングされるが、窒化膜25は膜25に保
護され何らの影響を受けない。次に第1図cに示
すように方向性のあるエツチング例えばRIE(反
応性イオンエツチング)によつてCVD SiO2膜2
4と第1の窒化膜23をエツチングパターニング
する。これにより第2の窒化膜25の開口部25
1より狭い開口部231を第1の窒化膜23につく
ることができる。その後第1図dの如くレジスト
膜26をエツチング除去して選択酸化を行ない、
フイールド酸化膜27を例えば8000Å成長させて
素子分離領域が完成するものである。(Example) Examples of the first and second inventions of the present application will be described below with reference to the drawings. FIG. 1 shows an example before the present invention, in which a silicon substrate 21 as shown in FIG.
is oxidized to grow a padded oxide film 22 of, for example, 500 Å, on which a first nitride film 23 of 1000 Å is deposited, and then a CVD SiO 2 film (SiO 2 film by CVD) is formed.
24 to a thickness of 500 Å. Next, as shown in FIG. 1b, a second nitride film 25 is deposited, a resist film 26 is provided thereon, and after patterning, the second nitride film 25 is isotropically etched using CDE (isotropic dry etching). The nitride film 25 is patterned by etching. At this time, the nitride film 25 is etched down to the vicinity of the opening edge of the resist 26, but the nitride film 25 is protected by the film 25 and is not affected in any way. Next, as shown in FIG .
4 and the first nitride film 23 are etched and patterned. As a result, the opening 25 of the second nitride film 25
An opening 23 1 narrower than 1 can be made in the first nitride film 23 . Thereafter, as shown in FIG. 1d, the resist film 26 is removed by etching and selective oxidation is performed.
The field oxide film 27 is grown to a thickness of, for example, 8000 Å to complete the element isolation region.
第2図は本願の第1の発明の実施例である。即
ち第1図の場合と同様に第2の窒化膜25を堆積
後、これを写真蝕刻法等によりパターニングし、
第2の窒化膜25上に該膜25よりかなり軟質の
物質例えばCVD SiO2を例えば2000Å堆積後、
RIEでCVD SiO2をエツチバツクすることによ
り、第2の窒化膜25の開口内面にCVD SiO2膜
よりなる側壁28を形成する。その後側壁28、
窒化膜25をマスクとしてRIEによつて第1の窒
化膜23をパターニングすれば、第1図の場合と
同じように窒化膜23の開口エツジ部が薄い状態
でフイールド酸化を行なえるものである。 FIG. 2 shows an embodiment of the first invention of the present application. That is, as in the case of FIG. 1, after depositing the second nitride film 25, it is patterned by photolithography or the like.
After depositing a material much softer than the second nitride film 25, such as CVD SiO 2 to a thickness of, for example, 2000 Å,
By etching back the CVD SiO 2 by RIE, a side wall 28 made of the CVD SiO 2 film is formed on the inner surface of the opening of the second nitride film 25. After that, the side wall 28,
If the first nitride film 23 is patterned by RIE using the nitride film 25 as a mask, field oxidation can be performed with the opening edges of the nitride film 23 being thin, as in the case of FIG.
第3図は本願の第2の発明の実施例である。即
ち第2の窒化膜25を堆積後、多結晶シリコン膜
29を例えば4000Å堆積し、写真蝕刻法で多結晶
シリコン膜29と第2の窒化膜25をパターニン
グする(第3図a。その後多結晶シリコン膜29
をその表面及び開口側面を露出させたまま熱酸化
後(これにより熱酸化膜30は膨張する)、その
酸化膜30をマスクにして物質膜24、第1の窒
化膜23をパターニングし(第3図b、その後フ
イールド酸化するものである。前記各実施例で示
したように、窒化膜開口エツジ部では第1の窒化
膜23は薄く、その他の領域では第1の窒化膜2
3及び第2の窒化膜25で覆われて厚いため、窒
化膜開口エツジ部でのストレスが緩和され、従つ
てSi基板21の結晶欠陥を防ぎ、かつバーズビー
クを抑えることができる。また第2図、第3図の
如く、第2の窒化膜25をパターニング後、第1
の窒化膜開口部231を形成するためのマスクと
なる開口部を、側壁28、酸化膜30の膨出部で
狭くしたため、レジストパターンよりも微細化が
可能で、より微細化された素子分離が実現でき
る。その上パツド酸化膜22がないと、一段とバ
ーズビークを抑えることができるものである。ま
た第2図、第3図に示す如く、耐酸化膜23の開
口部を形成するためのとなる開口部を、側壁2
8、多結晶シリコンの熱酸化膜30で狭くするこ
とにより、側壁28を用いる場合はその厚みを大
とすることにより、また酸化膜30を用いる場合
はその表面及び開口側面を露出させたまま酸化形
成してはり出させることにより、開口部の大幅縮
小が短時間で行なえるものである。 FIG. 3 shows an embodiment of the second invention of the present application. That is, after depositing the second nitride film 25, a polycrystalline silicon film 29 is deposited to a thickness of, for example, 4000 Å, and the polycrystalline silicon film 29 and the second nitride film 25 are patterned by photolithography (FIG. 3a). Silicon film 29
is thermally oxidized with its surface and opening side surfaces exposed (this causes the thermal oxide film 30 to expand), and the material film 24 and first nitride film 23 are patterned using the oxide film 30 as a mask (the third As shown in Figure b, field oxidation is then performed.As shown in the above embodiments, the first nitride film 23 is thin at the edge of the nitride film opening, and the first nitride film 23 is thin in other regions.
3 and the second nitride film 25, the stress at the edge of the nitride film opening is alleviated, thereby preventing crystal defects in the Si substrate 21 and suppressing bird's beak. Further, as shown in FIGS. 2 and 3, after patterning the second nitride film 25, the first
Since the opening that serves as a mask for forming the nitride film opening 23 1 is narrowed by the sidewall 28 and the bulge of the oxide film 30, it can be made finer than a resist pattern, resulting in finer element isolation. can be realized. Moreover, without the pad oxide film 22, bird's beak can be further suppressed. Further, as shown in FIGS. 2 and 3, an opening for forming an opening in the oxidation-resistant film 23 is formed on the side wall 2.
8. By narrowing it with a thermal oxide film 30 of polycrystalline silicon, by increasing the thickness of the side wall 28 when using it, or by oxidizing it while leaving the surface and opening side surface exposed when using an oxide film 30. By forming and protruding the opening, the opening can be significantly reduced in a short time.
[発明の効果]
以上説明した如く本発明によれば、バーズビー
クを抑え、半導体基板の結晶欠陥がなく、比較的
簡単かつ短時間作業で微細化が可能な選択酸化法
を有した半導体装置の製造方法が提供できるもの
である。[Effects of the Invention] As explained above, according to the present invention, it is possible to manufacture a semiconductor device using a selective oxidation method that suppresses bird's beak, has no crystal defects in the semiconductor substrate, and allows miniaturization in a relatively simple and short time. method can be provided.
第1図は本発明に至る前の素子分離形成の工程
説明図、第2図、第3図は本願の第1、第2の発
明の各実施例の工程説明図、第4図ないし第6図
は従来例の工程説明図である。
21……シリコン基板、22……パツド酸化
膜、23……第1の窒化膜(第1の耐酸化膜)、
231,252……開口部、24,28……CVD
SiO2膜、26……レジスト膜、27……フイー
ルド酸化膜、29……多結晶シリコン、30……
酸化膜。
FIG. 1 is a process explanatory diagram of element isolation formation before reaching the present invention, FIGS. 2 and 3 are process explanatory diagrams of each embodiment of the first and second inventions of the present application, and FIGS. 4 to 6 The figure is a process explanatory diagram of a conventional example. 21...Silicon substrate, 22...Padded oxide film, 23...First nitride film (first oxidation-resistant film),
23 1 , 25 2 ... opening, 24, 28 ... CVD
SiO 2 film, 26... resist film, 27... field oxide film, 29... polycrystalline silicon, 30...
Oxide film.
Claims (1)
後、該半導体基板を選択的に酸化して素子分離を
行なう半導体装置の製造方法において、前記半導
体基板上に第1の耐酸化膜を堆積する工程と、前
記第1の耐酸化膜上に該膜の保護用の第1の物質
膜を形成する工程と、前記第1の物質膜上に前記
第1の耐酸化膜より厚い第2の耐酸化膜を堆積す
る工程と、前記第2の耐酸化膜をパターニング
後、この第2の耐酸化膜の露出表面及び前記第1
の物質膜の露出表面に第1の耐酸化膜より軟質の
第2の物質を形成し、前記第2の物質膜を方向性
あるエツチングでエツチバツクすることにより、
前記第1の耐酸化膜の開口部を形成するためのマ
スクである第2の耐酸化膜の開口部を狭くするた
め、前記第2の耐酸化膜の開口部の内面に第2の
物質膜からなる側壁を残存形成する工程と、前記
第2の耐酸化膜及び側壁をマスクとして前記第1
の物質膜、第1の耐酸化膜に開口部を設ける工程
とを具備し、前記第1の物質膜は第2の耐酸化膜
に対しエツチングに関して選択性があるものであ
ることを特徴とする半導体装置の製造方法。 2 前記第1、第2の耐酸化膜が窒化膜で、前記
第1の物質膜がCVD SiO2膜であることを特徴と
する特許請求の範囲第1項に記載の半導体装置の
製造方法。 3 耐酸化膜パターンを半導体基板表面に形成
後、該半導体基板を選択的に酸化して素子分離を
行なう半導体装置の製造方法において、前記半導
体基板上に第1の耐酸化膜を堆積する工程と、前
記第1の耐酸化膜上に該膜の保護用の第1の物質
膜を形成する工程と、前記第1の物質膜上に前記
第1の耐酸化膜より厚い第2の耐酸化膜を堆積す
る工程と、前記第2の耐酸化膜上にマスク用多結
晶シリコン層を形成する工程と、前記第2の耐酸
化膜上のマスク用多結晶シリコン層により第2の
耐酸化膜をパターニング後、前記多結晶シリコン
層の表面及び開口部側面を露出させたまま前記多
結晶シリコン層の前記第1の耐酸化膜パターニン
グ用開口部を酸化で狭くする工程と、この工程で
狭く形成された前記第1の耐酸化膜パターニング
用開口部を有する第2の耐酸化膜をマスクとして
前記第1の物質膜、第1の耐酸化膜に方向性ある
エツチングで開口部を設ける工程とを具備したこ
とを特徴とする半導体装置の製造方法。[Scope of Claims] 1. A method for manufacturing a semiconductor device in which an oxidation-resistant film pattern is formed on a surface of a semiconductor substrate and then the semiconductor substrate is selectively oxidized to perform element isolation, wherein a first oxidation-resistant film pattern is formed on the semiconductor substrate. a step of depositing a film, a step of forming a first material film for protecting the film on the first oxidation resistant film, and a step of depositing a film thicker than the first oxidation resistant film on the first material film. After depositing a second oxidation resistant film and patterning the second oxidation resistant film, the exposed surface of the second oxidation resistant film and the first oxidation resistant film are deposited.
By forming a second material softer than the first oxidation-resistant film on the exposed surface of the material film, and etching back the second material film by directional etching,
In order to narrow the opening of the second oxidation resistant film, which is a mask for forming the opening of the first oxidation resistant film, a second material film is formed on the inner surface of the opening of the second oxidation resistant film. a step of forming remaining sidewalls consisting of the second oxidation-resistant film and the sidewalls;
and a step of forming an opening in a first oxidation-resistant film, wherein the first material film is selective with respect to etching with respect to a second oxidation-resistant film. A method for manufacturing a semiconductor device. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the first and second oxidation-resistant films are nitride films, and the first material film is a CVD SiO 2 film. 3. A method for manufacturing a semiconductor device in which an oxidation-resistant film pattern is formed on a surface of a semiconductor substrate, and then the semiconductor substrate is selectively oxidized to perform element isolation, including the step of depositing a first oxidation-resistant film on the semiconductor substrate. , forming a first material film on the first oxidation resistant film for protecting the film; and a second oxidation resistant film thicker than the first oxidation resistant film on the first material film. a step of depositing a polycrystalline silicon layer for a mask on the second oxidation-resistant film; and a step of forming a second oxidation-resistant film using the polycrystalline silicon layer for a mask on the second oxidation-resistant film. After patterning, a step of narrowing the first oxidation-resistant film patterning opening of the polycrystalline silicon layer by oxidation while leaving the surface of the polycrystalline silicon layer and the side surfaces of the opening exposed; forming an opening in the first material film and the first oxidation resistant film by directional etching using the second oxidation resistant film having the first oxidation resistant film patterning opening as a mask; A method for manufacturing a semiconductor device, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28059186A JPS63136548A (en) | 1986-11-27 | 1986-11-27 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28059186A JPS63136548A (en) | 1986-11-27 | 1986-11-27 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63136548A JPS63136548A (en) | 1988-06-08 |
| JPH0338733B2 true JPH0338733B2 (en) | 1991-06-11 |
Family
ID=17627162
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28059186A Granted JPS63136548A (en) | 1986-11-27 | 1986-11-27 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63136548A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR960011859B1 (en) * | 1993-04-22 | 1996-09-03 | 현대전자산업 주식회사 | Field oxide film formation method of a semiconductor device |
| KR960006975B1 (en) * | 1993-05-21 | 1996-05-25 | 현대전자산업주식회사 | Field oxide film formation method of a semiconductor device |
| KR960006976B1 (en) * | 1993-05-21 | 1996-05-25 | 현대전자산업주식회사 | Method for manufacturing field oxide film of semiconductor device |
| US5679600A (en) * | 1995-10-11 | 1997-10-21 | Micron Technology, Inc. | Double locos for submicron isolation |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6068631A (en) * | 1983-09-26 | 1985-04-19 | Toshiba Corp | Manufacture of semiconductor device |
| JPS6144442A (en) * | 1984-08-08 | 1986-03-04 | Nec Corp | Manufacture of semiconductor device |
-
1986
- 1986-11-27 JP JP28059186A patent/JPS63136548A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63136548A (en) | 1988-06-08 |
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