JPH0340587B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to an improvement in a DC-DC converter as a DC stabilized power supply used in various electronic communication devices.

(b) Background of the technology As a DC stabilized power supply that takes a DC power supply as input and outputs a stabilized DC voltage, there is a DC-DC power supply that controls the operating pulse width of the main switching transistor.
Converters are commonly used.

(c) Prior art and problems A conventional example and problems of a DC-DC converter that controls the operating pulse width of a pair of main switching transistors will be explained.

Fig. 1 is a circuit diagram of a conventional DC-DC converter, Fig. 2 is a time chart of waveforms at various parts in Fig. 1, and each waveform from B to D corresponds to points b to d in Fig. 1. .

In Figure 1, 1 is an operational amplifier, 2 is a comparator, 3 is a sawtooth wave generator, 4 is a flip-flop circuit (hereinafter abbreviated as FF circuit), 5 and 6 are AND circuits, 7 is a load, Tr1, Tr2 is the main switching transistor, Tr3 and Tr4 are the drive transistors, E is the DC input power supply, C1 to C3, Cf are the capacitors, R1,
R2 and Rf are resistors, D1 and D2 are rectifier diodes,
L is a chiyoke coil, T1 is a drive transformer, T2
is the main transformer, Vref is the reference voltage, and Vcc is the power supply voltage of the drive transistors Tr3 and Tr4, respectively.

First, the capacitor of operational amplifier 1 shown by the dotted line
When there is no Cf or resistor Rf and the response speed is fast to load fluctuations, for example, it is used in electronic communication equipment that handles digital signals whose load fluctuates periodically, and DC-DC
A case in which cyclic load fluctuations occur at a frequency close to the switching frequency of the converter will be explained.

When a cyclic load fluctuation occurs, the output voltage of the operational amplifier 1, which amplifies the error with respect to the reference voltage Vref, changes cyclically as shown at 2 in FIG. 2A. This voltage is compared with the sawtooth wave voltage shown in 1 in Figure 2A from the sawtooth wave generator by the comparator 2, and a pulse whose pulse width is the period in which the sawtooth wave voltage is higher is output. . This pulse is sent to the FF circuit 4,
AND circuits 5, 6, drive transistors Tr3, Tr
4. Via the drive transformer T1, the drive pulse voltages shown in FIG. 2B and C are applied to the main switching transistors Tr1 and Tr2, respectively.
Switching operations are performed with different pulse widths.
As a result, the voltage shown in FIG. 2D is applied to the main transformer T2, and currents with different positive and negative magnitudes as shown in FIG. 2E flow through the main transformer T2.
2 is biased.

This biased magnetization means that the pulse voltage width shown in FIG. 2B that drives transistor Tr1 is
The width of the pulse voltage shown in FIG. 2C that drives the main transformer T2 is wider than the width of the pulse voltage shown in FIG.
This occurs because the current-time product of B is larger than the current-time product of C and D, and this is accumulated on the B side, so a large current flows through the transistor Tr1.
This may cause damage.

In order to prevent this biased magnetization, there is a method of providing the operational amplifier 1 with a feedback circuit consisting of a capacitor Cf and a resistor Rf, which are shown by dotted lines.As a result, the response speed of the operational amplifier 1 becomes slow, so the output voltage of the operational amplifier 1 becomes
As shown by 3 in FIG. 2A, the pulse voltages are approximately straight, and the pulse voltage widths applied to the main switching transistors Tr1 and Tr2 are approximately equal, thereby preventing biased magnetization of the main transformer T2.

However, for example, in the power supply of a high-speed printer, the printer hammer operates periodically, and the load current flows rapidly during operation.If the response speed is slow at this time, the output voltage will drop suddenly and the printer may not operate satisfactorily. will occur.

As described above, in the conventional DC-DC converter, if the response speed is made fast, there is a problem of biased magnetization, and even if the response speed is made slow, the above-mentioned problem occurs.

(d) Purpose of the Invention In view of the above-mentioned problems, the purpose of the present invention is to provide a device that has a fast response speed to load fluctuations and does not cause unbalanced magnetization.
Our goal is to provide DC-DC converters.

(e) Structure of the Invention The above object is to provide a stabilized power supply device that detects an output voltage and controls a pair of main switching transistors on and off alternately using drive pulses whose width is controlled to keep the output voltage constant. , a comparison circuit that compares the error voltage between the output voltage and the reference voltage with a sawtooth wave voltage, a rise detection circuit that detects the rising point of the sawtooth wave voltage, and a level inversion by the output pulse of the rise detection circuit. a first flip-flop circuit that outputs a first output pulse and a second output pulse that is an inverted pulse of the first output pulse; a first flip-flop circuit that outputs a first output pulse of the first flip-flop circuit; a first AND circuit that generates a first drive pulse for driving one of the main switching transistors by performing an AND operation on the output pulse, and a second output pulse of the first flip-flop circuit; a second flip-flop circuit that sends out an output pulse using a set signal and stops the output pulse using a reset signal; and a second flip-flop circuit that counts up the first drive pulse period and counts down the period of the first drive pulse using a set signal of the second flip-flop circuit. an up-down counter that sends the reset signal to the second flip-flop circuit when the up count value and the down count value become equal; and a second AND circuit that performs an AND operation with a second output pulse of the circuit to generate a second drive pulse that drives the other main switching transistor. This is accomplished by a converter.

According to the configuration of the present invention, since the pair of main switching transistors can be driven and controlled with pulses of the same width, a DC-DC converter can be obtained that has a fast response speed and does not cause biased magnetization.

(f) Embodiment of the invention Hereinafter, an embodiment of the invention will be described based on the drawings.

FIG. 3 is a circuit diagram of a DC-DC converter according to an embodiment of the present invention, and FIG. 4 is a time chart of waveforms of each part in FIG. Corresponds to point k. In Figure 3, parts with the same functions as the conventional example in Figure 1 are indicated by the same symbols, and 8 and 12 are
FF circuit, 9 and 10 are differentiating circuits, 11 is a comparator,
13 is an up-down counter, and V1 is a reference voltage almost at zero potential as shown at 4 in FIG. 4A. Further, the clock frequency supplied to the clock terminal CLK of the up-down counter 13 is sufficiently higher than the frequency of the sawtooth wave of the sawtooth wave generator 3.
While a high level is applied to the up terminal U, the clock is counted up, while a high level is applied to the down terminal D, the clock is counted down, and when the count value reaches 0, a pulse is sent from the output terminal 0. is generated.

As in the conventional example, when a cyclical load fluctuation occurs, the operational amplifier 1 responds quickly, so as in the conventional example, the output voltage of the operational amplifier 1 fluctuates cyclically as shown in 2 in Fig. 4A. As a result, pulses having greatly different widths as shown in FIG.

The rising detection circuit for detecting the rising point of the sawtooth wave voltage is composed of a comparator 11 and a differentiating circuit 10. Wave voltage and Figure 4A
The rising point of the sawtooth wave voltage is detected by comparing it with the reference voltage V1 shown in 4, which is almost 0 potential, and is differentiated by the differentiating circuit 10 to generate the edge pulse shown in FIG. 4C.

This edge pulse is input to the FF circuit 8, and one output terminal Q generates a pulse shown in FIG. 4D that is inverted for each edge pulse, and blocks the output of the AND circuit 6 when it is at a low level.

The other output terminal of the FF circuit 8 generates an inverted pulse at the output terminal Q as shown in FIG. That is, the output of the AND circuit 5 is as shown in FIG. 4B during the period when the output pulse of the output terminal of the FF circuit 8 shown in FIG. 4E is at a high level.
A pulse with the same width as the output pulse of comparator 2 shown in is sent out. This pulse serves as a first drive pulse to drive and control one main switching transistor Tr1 via the drive transistor Tr3 and the like.

Further, the output pulse of the output terminal Q is differentiated by the differentiating circuit 9 to generate an edge pulse at the rising edge as shown in FIG. The output from the output terminal Q is set to a high level at the point G in FIG. 4, and is applied to the down terminal D of the up/down counter 13 and the AND circuit 6.

In the up/down counter 13, the up terminal U
The FF circuit 1 shown in FIG. 4G counts up one pulse period of the output pulse of the comparator 2 shown in FIG.
Start counting down with the second output pulse,
When the down count value becomes equal to the up count value and the count value reaches 0, a pulse shown in FIG. 4H is generated from the output terminal O, and the FF circuit 12
Reset.

That is, from the output terminal Q of the FF circuit 12, the fourth
As shown in FIG. The output pulse shown in FIG. 4J is sent out by the drive transistor as the second drive pulse.
The other main switching transistor Tr2 is driven and controlled via Tr4 and the like.

Therefore, a pair of main switching transistors
Since Tr1 and Tr2 are driven and controlled by pulses with the same width, voltages with the same pulse width are applied to the main transformer T2 on both the + and - sides as shown in Figure 4K, causing biased magnetization. Never.

(g) Effects of the Invention As explained in detail above, according to the present invention, since delay elements such as capacitors are not used, the response speed to load fluctuations is fast, the main transformer is not biased, and The up-down counter measures the pulse period with high accuracy, and the logic circuit generates a pair of drive pulses of equal width, making it possible to create a highly accurate and reliable DC-DC converter.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of a conventional DC-DC converter, Fig. 2 is a time chart of waveforms of various parts in Fig. 1, Fig. 3 is a circuit diagram of a DC-DC converter according to an embodiment of the present invention, and Fig. 4 is a circuit diagram of a DC-DC converter according to an embodiment of the present invention. The figure is a time chart of waveforms of various parts in FIG. 3. In the figure, 1 is an operational amplifier, 2 and 11 are comparators, 3 is a sawtooth wave generator, 4, 8, and 12 are flip-flop circuits, 5 and 6 are AND circuits, 7 is a load, and 9 and 1 are flip-flop circuits.
0 is a differential circuit, Tr1 and Tr2 are main switching transistors, Tr3 and Tr4 are drive transistors,
T1 is a drive transformer, T2 is a main transformer, C1~
C3, Cf are capacitors, R1, R2, Rf are resistors,
E represents a DC input power supply, D1 and D2 represent rectifier diodes, and L represents a chiyoke coil.

Claims (1)

[Scope of Claims] 1. A stabilized power supply device that detects an output voltage and controls a pair of main switching transistors on and off alternately using width-controlled drive pulses to keep the output voltage constant, comprising: a comparison circuit that compares the error voltage between the reference voltage and the sawtooth voltage; a rise detection circuit that detects the rising point of the sawtooth voltage; and a first output whose level is inverted by the output pulse of the rise detection circuit. a first flip-flop circuit that outputs a pulse and a second output pulse that is an inverted pulse of the first output pulse; a first output pulse of the first flip-flop circuit and an output pulse of the comparator circuit; a first AND circuit that performs an AND operation to generate a first drive pulse for driving one of the main switching transistors, and a rise time of a second output pulse of the first flip-flop circuit as a set signal; a second flip-flop circuit that sends out an output pulse and stops the output pulse in response to a reset signal; and a second flip-flop circuit that counts up the first drive pulse period and starts counting down in response to a set signal from the second flip-flop circuit; an up-down counter that sends the reset signal to the second flip-flop circuit when the up-count value and the down-count value become equal; an output pulse of the second flip-flop circuit; and a second reset signal of the first flip-flop circuit. and a second AND circuit that generates a second drive pulse for driving the other of the main switching transistors by performing an AND operation on the output pulse of the main switching transistor.